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C2000 real-time microcontrollers

TMS320F280037C

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C2000™ 32-bit MCU 120-MHz 256-KB flash, FPU, TMU with CLA, CLB, AES and CAN-FD

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TMS320F280037C

ACTIVE
Data sheet Order now

Product details

CPU C28x, CLA Frequency (MHz) 120 Flash memory (kByte) 256 RAM (kByte) 69 ADC resolution (Bps) 12 Total processing (MIPS) 240 Features CAN FD, Configurable logic block, Dual security zones, FPU32 UART 4 CAN (#) 2 Sigma-delta filter 8 PWM (Ch) 16 TI functional safety category Functional Safety-Compliant Number of ADC channels 14, 16, 18, 23 Direct memory access (Ch) 6 SPI 2 QEP 2 USB No Operating temperature range (°C) -40 to 125 Rating Catalog Communication interface CAN, CAN FD, FSI, I2C, LIN, PMBUS, SCI, SPI, UART
CPU C28x, CLA Frequency (MHz) 120 Flash memory (kByte) 256 RAM (kByte) 69 ADC resolution (Bps) 12 Total processing (MIPS) 240 Features CAN FD, Configurable logic block, Dual security zones, FPU32 UART 4 CAN (#) 2 Sigma-delta filter 8 PWM (Ch) 16 TI functional safety category Functional Safety-Compliant Number of ADC channels 14, 16, 18, 23 Direct memory access (Ch) 6 SPI 2 QEP 2 USB No Operating temperature range (°C) -40 to 125 Rating Catalog Communication interface CAN, CAN FD, FSI, I2C, LIN, PMBUS, SCI, SPI, UART
LQFP (PM) 64 144 mm² 12 x 12 LQFP (PN) 80 196 mm² 14 x 14 LQFP (PT) 48 81 mm² 9 x 9 LQFP (PZ) 100 256 mm² 16 x 16
  • TMS320C28x 32-bit DSP core at 120 MHz
    • IEEE 754 Floating-Point Unit (FPU)
      • Support for Fast Integer Division (FINTDIV)
    • Trigonometric Math Unit (TMU)
      • Support for Nonlinear Proportional Integral Derivative (NLPID) control
    • CRC Engine and Instructions (VCRC)
    • Ten hardware breakpoints (with ERAD)
  • Programmable Control Law Accelerator (CLA)
    • 120 MHz
    • IEEE 754 single-precision floating-point instructions
    • Executes code independently of main CPU
  • On-chip memory
    • 384KB (192KW) of flash (ECC-protected) across three independent banks
    • 69KB (34.5KW) of RAM (ECC-protected)
    • Security
      • JTAGLOCK
      • Zero-pin boot
      • Dual-zone security
  • Clock and system control
    • Two internal 10-MHz oscillators
    • Crystal oscillator or external clock input
    • Windowed watchdog timer module
    • Missing clock detection circuitry
    • Dual-clock Comparator (DCC)
  • 3.3-V I/O design
    • Internal VREG generation allows for single-supply design
    • Brownout reset (BOR) circuit
  • System peripherals
    • 6-channel Direct Memory Access (DMA) controller
    • 55 individually programmable multiplexed General-Purpose Input/Output (GPIO) pins
    • 23 digital inputs on analog pins
    • 2 digital inputs/outputs on analog pins (AGPIO)
    • Enhanced Peripheral Interrupt Expansion (ePIE)
    • Multiple low-power mode (LPM) support
    • Embedded Real-time Analysis and Diagnostic (ERAD)
    • Unique Identification (UID) number
  • Communications peripherals
    • One Power-Management Bus (PMBus) interface
    • Two Inter-integrated Circuit (I2C) interfaces
    • One Controller Area Network (CAN/DCAN) bus port
    • One Controller Area Network with Flexible Data-Rate (CAN FD/MCAN) bus port
    • Two Serial Peripheral Interface (SPI) ports
    • Two UART-compatible Serial Communication Interface (SCI)
    • Two UART-compatible Local Interconnect Network (LIN) interfaces
    • Fast Serial Interface (FSI) with one transmitter and one receiver (up to 200Mbps)
  • Analog system
    • Three 4-MSPS, 12-bit Analog-to-Digital Converters (ADCs)
      • Up to 23 external channels (includes the two gpdac outputs)
      • Four integrated Post-Processing Blocks (PPB) per ADC
    • Four windowed comparators (CMPSS) with 12-bit reference Digital-to-Analog Converters (DACs)
      • Digital glitch filters
    • Two 12-bit buffered DAC outputs
  • Enhanced control peripherals
    • 16 ePWM channels with eight channels that have high-resolution capability (150-ps resolution)
      • Integrated dead-band support
      • Integrated hardware trip zones (TZs)
    • Three Enhanced Capture (eCAP) modules
      • High-resolution Capture (HRCAP) available on one of the three eCAP modules
    • Two Enhanced Quadrature Encoder Pulse (eQEP) modules with support for CW/CCW operation modes
    • Eight Sigma-Delta Filter Module (SDFM) input channels (two parallel filters per channel)
      • Standard SDFM data filtering
      • Comparator filter for fast action for overvalue or undervalue condition
    • Embedded Pattern Generator (EPG)
  • Configurable Logic Block (CLB)
    • 4 tiles
    • Augments existing peripheral capability
    • Supports position manager solutions
  • Host Interface Controller (HIC)
    • Access to internal memory from an external host
  • Background CRC (BGCRC)
    • One cycle CRC computation on 32 bits of data
  • Advanced Encryption Standard (AES) accelerator
  • Live Firmware Update (LFU)
    • Fast context switching from old to new firmware
    • Flash bank erase time improvements
  • Diagnostic features
    • Memory Power On Self Test (MPOST)
    • Hardware Built-in Self Test (HWBIST)
  • Functional Safety-Compliant (PZ and Q100 PM packages only)
  • Safety-related certification
  • Package options:
    • 100-pin Low-profile Quad Flatpack (LQFP) [PZ suffix]
    • 80-pin Low-profile Quad Flatpack (LQFP) [PN suffix]
    • 64-pin (LQFP) [PM suffix]
    • 48-pin (LQFP) [PT suffix]
  • Temperature options:
    • Free-air (T A): –40°C to 125°C
    • Junction (T J): –40°C to 150°C
  • TMS320C28x 32-bit DSP core at 120 MHz
    • IEEE 754 Floating-Point Unit (FPU)
      • Support for Fast Integer Division (FINTDIV)
    • Trigonometric Math Unit (TMU)
      • Support for Nonlinear Proportional Integral Derivative (NLPID) control
    • CRC Engine and Instructions (VCRC)
    • Ten hardware breakpoints (with ERAD)
  • Programmable Control Law Accelerator (CLA)
    • 120 MHz
    • IEEE 754 single-precision floating-point instructions
    • Executes code independently of main CPU
  • On-chip memory
    • 384KB (192KW) of flash (ECC-protected) across three independent banks
    • 69KB (34.5KW) of RAM (ECC-protected)
    • Security
      • JTAGLOCK
      • Zero-pin boot
      • Dual-zone security
  • Clock and system control
    • Two internal 10-MHz oscillators
    • Crystal oscillator or external clock input
    • Windowed watchdog timer module
    • Missing clock detection circuitry
    • Dual-clock Comparator (DCC)
  • 3.3-V I/O design
    • Internal VREG generation allows for single-supply design
    • Brownout reset (BOR) circuit
  • System peripherals
    • 6-channel Direct Memory Access (DMA) controller
    • 55 individually programmable multiplexed General-Purpose Input/Output (GPIO) pins
    • 23 digital inputs on analog pins
    • 2 digital inputs/outputs on analog pins (AGPIO)
    • Enhanced Peripheral Interrupt Expansion (ePIE)
    • Multiple low-power mode (LPM) support
    • Embedded Real-time Analysis and Diagnostic (ERAD)
    • Unique Identification (UID) number
  • Communications peripherals
    • One Power-Management Bus (PMBus) interface
    • Two Inter-integrated Circuit (I2C) interfaces
    • One Controller Area Network (CAN/DCAN) bus port
    • One Controller Area Network with Flexible Data-Rate (CAN FD/MCAN) bus port
    • Two Serial Peripheral Interface (SPI) ports
    • Two UART-compatible Serial Communication Interface (SCI)
    • Two UART-compatible Local Interconnect Network (LIN) interfaces
    • Fast Serial Interface (FSI) with one transmitter and one receiver (up to 200Mbps)
  • Analog system
    • Three 4-MSPS, 12-bit Analog-to-Digital Converters (ADCs)
      • Up to 23 external channels (includes the two gpdac outputs)
      • Four integrated Post-Processing Blocks (PPB) per ADC
    • Four windowed comparators (CMPSS) with 12-bit reference Digital-to-Analog Converters (DACs)
      • Digital glitch filters
    • Two 12-bit buffered DAC outputs
  • Enhanced control peripherals
    • 16 ePWM channels with eight channels that have high-resolution capability (150-ps resolution)
      • Integrated dead-band support
      • Integrated hardware trip zones (TZs)
    • Three Enhanced Capture (eCAP) modules
      • High-resolution Capture (HRCAP) available on one of the three eCAP modules
    • Two Enhanced Quadrature Encoder Pulse (eQEP) modules with support for CW/CCW operation modes
    • Eight Sigma-Delta Filter Module (SDFM) input channels (two parallel filters per channel)
      • Standard SDFM data filtering
      • Comparator filter for fast action for overvalue or undervalue condition
    • Embedded Pattern Generator (EPG)
  • Configurable Logic Block (CLB)
    • 4 tiles
    • Augments existing peripheral capability
    • Supports position manager solutions
  • Host Interface Controller (HIC)
    • Access to internal memory from an external host
  • Background CRC (BGCRC)
    • One cycle CRC computation on 32 bits of data
  • Advanced Encryption Standard (AES) accelerator
  • Live Firmware Update (LFU)
    • Fast context switching from old to new firmware
    • Flash bank erase time improvements
  • Diagnostic features
    • Memory Power On Self Test (MPOST)
    • Hardware Built-in Self Test (HWBIST)
  • Functional Safety-Compliant (PZ and Q100 PM packages only)
  • Safety-related certification
  • Package options:
    • 100-pin Low-profile Quad Flatpack (LQFP) [PZ suffix]
    • 80-pin Low-profile Quad Flatpack (LQFP) [PN suffix]
    • 64-pin (LQFP) [PM suffix]
    • 48-pin (LQFP) [PT suffix]
  • Temperature options:
    • Free-air (T A): –40°C to 125°C
    • Junction (T J): –40°C to 150°C

The TMS320F28003x (F28003x) is a member of the C2000™ real-time microcontroller family of scalable, ultra-low latency devices designed for efficiency in power electronics, including but not limited to: high power density, high switching frequencies, and supporting the use of GaN and SiC technologies.

These include such applications as:

The real-time control subsystem is based on TI’s 32-bit C28x DSP core, which provides 120 MHz of signal-processing performance for floating- or fixed-point code running from either on-chip flash or SRAM. The C28x CPU is further boosted by the Floating-Point Unit (FPU), Trigonometric Math Unit (TMU), and VCRC (Cyclical Redundancy Check) extended instruction sets, speeding up common algorithms key to real-time control systems.

The CLA allows significant offloading of common tasks from the main C28x CPU. The CLA is an independent 32-bit floating-point math accelerator that executes in parallel with the CPU. Additionally, the CLA has its own dedicated memory resources and it can directly access the key peripherals that are required in a typical control system. Support of a subset of ANSI C is standard, as are key features like hardware breakpoints and hardware task-switching.

The F28003x supports up to 384KB (192KW) of flash memory divided into three 128KB (64KW) banks, which enable programming and execution in parallel. Up to 69KB (34.5KW) of on-chip SRAM is also available to supplement the flash memory.

The Live Firmware Update hardware enhancements on F28003x allow fast context switching from the old firmware to the new firmware to minimize application downtime when updating the device firmware.

High-performance analog blocks are integrated on the F28003x real-time microcontroller (MCU) and are closely coupled with the processing and PWM units to provide optimal real-time signal chain performance. Sixteen PWM channels, all supporting frequency-independent resolution modes, enable control of various power stages from a 3-phase inverter to power factor correction and advanced multilevel power topologies.

The inclusion of the Configurable Logic Block (CLB) allows the user to add custom logic and potentially integrate FPGA-like functions into the C2000 real-time MCU.

Interfacing is supported through various industry-standard communication ports (such as SPI, SCI, I2C, PMBus, LIN, CAN and CAN FD) and offers multiple pin-muxing options for optimal signal placement. The Fast Serial Interface (FSI) enables up to 200Mbps of robust communications across an isolation boundary.

New to the C2000 platform is the Host Interface Controller (HIC), a high-throughput interface that allows an external host to access the resources of the TMS320F28003x directly.

Want to learn more about features that make C2000 Real-Time MCUs the right choice for your real-time control system? Check out The Essential Guide for Developing With C2000™ Real-Time Microcontrollers and visit the C2000™ real-time control MCUs page.

The Getting Started With C2000™ Real-Time Control Microcontrollers (MCUs) Getting Started Guide covers all aspects of development with C2000 devices from hardware to support resources. In addition to key reference documents, each section provides relevant links and resources to further expand on the information covered.

Ready to get started? Check out the TMDSCNCD280039C evaluation board and download C2000Ware.

The TMS320F28003x (F28003x) is a member of the C2000™ real-time microcontroller family of scalable, ultra-low latency devices designed for efficiency in power electronics, including but not limited to: high power density, high switching frequencies, and supporting the use of GaN and SiC technologies.

These include such applications as:

The real-time control subsystem is based on TI’s 32-bit C28x DSP core, which provides 120 MHz of signal-processing performance for floating- or fixed-point code running from either on-chip flash or SRAM. The C28x CPU is further boosted by the Floating-Point Unit (FPU), Trigonometric Math Unit (TMU), and VCRC (Cyclical Redundancy Check) extended instruction sets, speeding up common algorithms key to real-time control systems.

The CLA allows significant offloading of common tasks from the main C28x CPU. The CLA is an independent 32-bit floating-point math accelerator that executes in parallel with the CPU. Additionally, the CLA has its own dedicated memory resources and it can directly access the key peripherals that are required in a typical control system. Support of a subset of ANSI C is standard, as are key features like hardware breakpoints and hardware task-switching.

The F28003x supports up to 384KB (192KW) of flash memory divided into three 128KB (64KW) banks, which enable programming and execution in parallel. Up to 69KB (34.5KW) of on-chip SRAM is also available to supplement the flash memory.

The Live Firmware Update hardware enhancements on F28003x allow fast context switching from the old firmware to the new firmware to minimize application downtime when updating the device firmware.

High-performance analog blocks are integrated on the F28003x real-time microcontroller (MCU) and are closely coupled with the processing and PWM units to provide optimal real-time signal chain performance. Sixteen PWM channels, all supporting frequency-independent resolution modes, enable control of various power stages from a 3-phase inverter to power factor correction and advanced multilevel power topologies.

The inclusion of the Configurable Logic Block (CLB) allows the user to add custom logic and potentially integrate FPGA-like functions into the C2000 real-time MCU.

Interfacing is supported through various industry-standard communication ports (such as SPI, SCI, I2C, PMBus, LIN, CAN and CAN FD) and offers multiple pin-muxing options for optimal signal placement. The Fast Serial Interface (FSI) enables up to 200Mbps of robust communications across an isolation boundary.

New to the C2000 platform is the Host Interface Controller (HIC), a high-throughput interface that allows an external host to access the resources of the TMS320F28003x directly.

Want to learn more about features that make C2000 Real-Time MCUs the right choice for your real-time control system? Check out The Essential Guide for Developing With C2000™ Real-Time Microcontrollers and visit the C2000™ real-time control MCUs page.

The Getting Started With C2000™ Real-Time Control Microcontrollers (MCUs) Getting Started Guide covers all aspects of development with C2000 devices from hardware to support resources. In addition to key reference documents, each section provides relevant links and resources to further expand on the information covered.

Ready to get started? Check out the TMDSCNCD280039C evaluation board and download C2000Ware.

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Similar products you might be interested in

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Pin-for-pin with same functionality to the compared device
TMS320F280034 ACTIVE C2000™ 32-bit MCU 120-MHz 128-KB flash, FPU, TMU with CLA, AES and CAN-FD This product is the 128-KB flash equivalent without CLB.
TMS320F280037 ACTIVE C2000™ 32-bit MCU 120-MHz 256-KB flash, FPU, TMU with CLA, AES and CAN-FD This product is the equivalent without CLB.
TMS320F280037C-Q1 ACTIVE Automotive C2000™ 32-bit MCU 120-MHz 256-KB flash, FPU, TMU with CLA, CLB, AES and CAN-FD This product is the automotive grade equivalent.
TMS320F280039C ACTIVE C2000™ 32-bit MCU 120-MHz 384-KB flash, FPU, TMU with CLA, CLB, AES and CAN-FD This product is the 384-KB flash equivalent.

Technical documentation

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Type Title Date
* Data sheet TMS320F28003x Real-Time Microcontrollers datasheet (Rev. C) PDF | HTML 07 Dec 2023
* Errata TMS320F28003x Real-Time MCUs Silicon Errata (Rev. D) PDF | HTML 29 May 2024
* User guide TMS320F28003x Real-Time Microcontrollers Technical Reference Manual (Rev. C) PDF | HTML 28 Mar 2024
Certificate Certificate of Compliance UL-CA-2340465-0 23 May 2024
White paper Understanding Functional Safety FIT Base Failure Rate Estimates per IEC 62380 and SN 29500 (Rev. A) PDF | HTML 30 Apr 2024
Application note Power Supply and Monitoring Solution for C2000 MCU Automotive Applications PDF | HTML 17 Apr 2024
Application note Serial Flash Programming of C2000 Microcontrollers (Rev. H) PDF | HTML 09 Apr 2024
Application note VREFHI Input Driver Design for C2000 MCUs PDF | HTML 18 Jan 2024
Application note Clock Edge Delay Compensation With Isolated Modulators Digital Interface to MCUs (Rev. A) PDF | HTML 12 Jan 2024
Application note Hardware-Based Synchronous Rectification Control with CLB PDF | HTML 15 Dec 2023
Product overview C2000™ Safety Package for Automotive and Industrial Real-Time Microcontrollers (Rev. D) PDF | HTML 12 Dec 2023
Cybersecurity advisory C2000 DCSM ROM Gadget/ROP Vulnerability PDF | HTML 13 Nov 2023
User guide TMS320F28003x Flash API Version 1.58.10.00 Reference Guide (Rev. C) PDF | HTML 13 Nov 2023
Functional safety information TUV SUD Certificate No. Z10 084071 0025 Rev. 00 (Rev. A) 13 Nov 2023
Product overview Industrial Functional Safety for C2000™ Real-Time Microcontrollers (Rev. D) 08 Nov 2023
Functional safety information Functional Safety Manual for TMS320F28003x Real-Time Microcontrollers PDF | HTML 01 Nov 2023
Product overview Implementing IEC 60730 / UL 1998 Compliance for C2000 Real-Time Microcontrollers PDF | HTML 12 Oct 2023
Application note Optimized Control Schemes for Totem Pole PFC With Digital Controller PDF | HTML 22 Sep 2023
White paper Simplifying Robotics Motor Drive Safety Assessments PDF | HTML 19 May 2023
Application note ADC Input Circuit Evaluation for C2000 MCUs (using TINA-TI simulation tool) (Rev. A) PDF | HTML 24 Mar 2023
Application note ADC Input Circuit Evaluation for C2000 Real-Time MCUs (using PSPICE-FOR-TI) PDF | HTML 24 Mar 2023
Application note Charge-Sharing Driving Circuits for C2000 ADCs (using PSPICE-FOR-TI) (Rev. A) PDF | HTML 24 Mar 2023
Application note Charge-Sharing Driving Circuits for C2000 ADCs (using TINA-TI simulation tool) (Rev. A) PDF | HTML 24 Mar 2023
Application note Methods for Mitigating ADC Memory Cross-Talk (Rev. A) PDF | HTML 24 Mar 2023
Application note ADC Oversampling PDF | HTML 13 Mar 2023
Application note C2000 ePWM Developer’s Guide (Rev. A) PDF | HTML 24 Feb 2023
Application note How to Implement Custom Serial Interfaces Using Configurable Logic Block (CLB) PDF | HTML 03 Feb 2023
Application note C2000 SysConfig Linker Command Tool PDF | HTML 26 Jan 2023
Application note Using the Fast Serial Interface (FSI) With Multiple Devices in an Application (Rev. E) PDF | HTML 25 Jan 2023
Application note Hardware Design Guide for F2800x C2000™ Real-Time MCU Series (Rev. A) PDF | HTML 21 Dec 2022
User guide Live Firmware Update Without Device Reset on C2000™ MCUs (Rev. B) PDF | HTML 29 Sep 2022
User guide Getting Started With C2000™ Real-Time Control Microcontrollers (MCUs) (Rev. C) PDF | HTML 29 Jun 2022
Application note Intelligent LLC SR Control Using C2000 and UCD7138 (Rev. A) PDF | HTML 27 Jun 2022
Application note Interfacing EEPROM Using PMBus in I2C Mode PDF | HTML 06 May 2022
Technical article What is “real-time control” and why do you need it? PDF | HTML 06 Apr 2022
Application note Implement three-phase interleaved LLC on C2000 Type-4 PWM PDF | HTML 30 Mar 2022
Application note The Essential Guide for Developing With C2000 Real-Time Microcontrollers (Rev. F) PDF | HTML 03 Mar 2022
Application note Real-Time Benchmarks Showcasing C2000™ Control MCU's Optimized Signal Chain (Rev. A) PDF | HTML 15 Dec 2021
More literature New Product Update: Latest cost-optimized C2000 real-time MCU family: F28003x 09 Dec 2021
E-book Real-Time Control Reference Guide PDF | HTML 29 Oct 2021
Application note C2000 SysConfig PDF | HTML 20 Oct 2021
Application note Designing With the C2000™ Embedded Pattern Generator (EPG) PDF | HTML 20 Oct 2021
Application note Getting Started with the MCAN (CAN FD) Module PDF | HTML 20 Oct 2021
User guide Migration Between TMS320F28002x and TMS320F28003x PDF | HTML 20 Oct 2021
White paper Speed Up Development With C2000™ Real-Time MCUs Using SysConfig 20 Oct 2021
More literature C2000™ F28003x Real-Time Microcontrollers 14 Oct 2021
White paper Prototype Motor Drive System for Autonomous Industrial Mobile Robots PDF | HTML 29 Sep 2021
Application note Leverage New Type ePWM Features for Multiple Phase Control PDF | HTML 11 May 2021
Application note C2000™ DCSM Security Tool (Rev. A) PDF | HTML 10 May 2021
More literature Maximize density, power, and reliability with TI GaN and C2000™ real-time MCUs 15 Dec 2020
Application note Secure BOOT On C2000 Device 21 Jul 2020
User guide Migration Between TMS320F28004x and TMS320F28003x PDF | HTML 25 Jun 2020
Application note How to Migrate Custom Logic From an FPGA/CPLD to C2000 Microcontrollers (Rev. A) 15 Jun 2020
Application note Configurable Error Generator for Controller Area Network PDF | HTML 19 Dec 2019
User guide C2000 Real-Time Control Peripheral Reference Guide (Rev. S) PDF | HTML 30 Aug 2001

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