ADS5294
- Maximum Sample Rate: 80 MSPS/14-Bit
- High Signal-to-Noise Ratio
- 75.5-dBFS SNR at 5 MHz / 80 MSPS
- 78.2-dBFS SNR at 5 MHz / 80 MSPS and Decimation Filter Enabled
- 84-dBc SFDR at 5 MHz / 80 MSPS
- Low Power Consumption
- 58 mW/CH at 50 MSPS
- 77 mW/CH at 80 MSPS (2-LVDS Wire Per Channel)
- Digital Processing Block
- Programmable FIR Decimation Filter and Oversampling to Minimize Harmonic Interference
- Programmable IIR High-Pass Filter to Minimize DC Offset
- Programmable Digital Gain: 0 dB to 12 dB
- 2-Channel or 4-Channel Averaging
- Flexible Serialized LVDS Outputs:
- One or Two Wires of LVDS Output Lines Per Channel Depending on ADC Sampling Rate
- Programmable Mapping Between ADC Input Channels and LVDS Output Pins-Eases Board Design
- Variety of Test Patterns to Verify Data Capture by FPGA/Receiver
- Internal and External References
- 1.8-V Operation for Low Power Consumption
- Low-Frequency Noise Suppression
- Recovery From 6-dB Overload Within 1 Clock Cycle
- Package: 12-mm × 12-mm 80-Pin QFP
The ADS5294 is a low-power 80-MSPS 8-Channel ADC that uses CMOS process technology and innovative circuit techniques. Low power consumption, high SNR, low SFDR, and consistent overload recovery allow users to design high-performance systems.
The digital processing block of the ADS5294 integrates several commonly used digital functions for improving system performance. The device includes a digital filter module that has built-in decimation filters (with lowpass, highpass and bandpass characteristics). The decimation rate is also programmable (by 2, by 4, or by 8). This rate is useful for narrow-band applications, where the filters are used to conveniently improve SNR and knock-off harmonics, while at the same time reducing the output data rate. The device includes an averaging mode where two channels (or even four channels) are averaged to improve SNR.
Serial LVDS outputs reduce the number of interface lines and enable the highest system integration. The digital data from each channel ADC is output over one or two wires of LVDS output lines depending on the ADC sampling rate. This 2-wire interface maintains a low serial-data rate, allowing low-cost FPGA-based receivers to be used even at a high sample rate. The ADC resolution is programmed to 12-bit or 14-bit through registers. A unique feature is the programmable-mapping module that allows flexible mapping between the input channels and the LVDS output pins. This module greatly reduces the complexity of LVDS-output routing, and by reducing the number of PCB layers, potentially results in cheaper system boards.
The device integrates an internal reference trimmed to accurately match across devices. Internal reference mode achieves the best performance. External references can also drive the device.
The device is available in a 12-mm × 12-mm 80-pin QFP package. The device is specified over a –40°C to 85°C operating temperature range. ADS5294 is completely pin-to-pin and register compatible to ADS5292.
Technical documentation
Type | Title | Date | ||
---|---|---|---|---|
* | Data sheet | Octal-Channel 14-Bit 80-MSPS High-SNR and Low-Power ADC datasheet (Rev. E) | 23 Apr 2018 | |
Application note | High Speed ADCs and Amplifiers for Flow Cytometry Applications | 12 Oct 2020 | ||
Application note | Design Considerations for Avoiding Timing Errors during High-Speed ADC, LVDS Dat (Rev. A) | 22 May 2015 | ||
User guide | ADS5294, 8-Channel ADC Evaluation Module (Rev. A) | 05 Mar 2015 | ||
Application note | Why Use Oversampling when Undersampling Can Do the Job? (Rev. A) | 19 Jul 2013 | ||
Application note | Understanding Serial LVDS Capture in High-Speed ADCs | 10 Jul 2013 |
Design & development
For additional terms or required resources, click any title below to view the detail page where available.
ADS5294EVM — ADS5294 evaluation module
The ADS5294 evaluation module (EVM) provides a flexible environment for testing the ADS5294 under a variety of clock and input conditions. This EVM allows customers to design their own filters, populate the EVM with the corresponding components and verify the performance on the EVM itself.
ANALOG-ENGINEER-CALC — PC software analog engineer's calculator
The analog engineer’s calculator is designed to speed up many of the repetitive calculations that analog circuit design engineers use on a regular basis. This PC-based tool provides a graphical interface with a list of various common calculations ranging from setting operational-amplifier (...)
Supported products & hardware
Products
Precision op amps (Vos<1mV)
General-purpose op amps
Audio op amps
Transimpedance amplifiers
High-speed op amps (GBW ≥ 50 MHz)
Power op amps
Video amplifiers
Line drivers
Transconductance amplifiers & laser drivers
Fully differential amplifiers
Precision ADCs
Biosensing AFEs
High-speed ADCs (≥10 MSPS)
Receivers
Touchscreen controllers
Difference amplifiers
Instrumentation amplifiers
Audio line receivers
Analog current-sense amplifiers
Digital power monitors
Analog current-sense amplifiers with integrated shunt resistor
Digital power monitors with integrated shunt resistor
Die & wafer services
PSPICE-FOR-TI — PSpice® for TI design and simulation tool
Package | Pins | CAD symbols, footprints & 3D models |
---|---|---|
HTQFP (PFP) | 80 | Ultra Librarian |
Ordering & quality
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- MSL rating/Peak reflow
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- Material content
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