LowLevelFunc430X.c
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33 /*==========================================================================*\
34 | |
35 | LowLevelFunc430X.c |
36 | |
37 | Low Level Functions regarding user's hardware |
38 |----------------------------------------------------------------------------|
39 | Project: MSP430 Replicator |
40 | Developed using: IAR Embedded Workbench 6.20 |
41 | and: Code Composer Studio 6.0 |
42 |----------------------------------------------------------------------------|
43 | Version history: |
44 | 1.0 04/02 FRGR Initial version. |
45 | 1.1 04/02 FRGR Included SPI mode to speed up shifting function by 2.|
46 | 1.2 06/02 ALB2 Formatting changes, added comments. |
47 | 1.3 08/02 ALB2 Initial code release with Lit# SLAA149. |
48 | 1.4 09/05 SUN1 Software delays redesigned to use TimerA harware; |
49 | see MsDelay() routine. Added TA setup |
50 | 1.5 12/05 STO Adapted for 2xx devices with SpyBiWire using 4JTAG |
51 | 1.6 08/08 WLUT Adapted InitTarget() for SpyBiWire capable devices |
52 | 1.7 08/08 WLUT Replaced Shift() and Shift_430X() with a common shift|
53 | function AllShifts(). |
54 | Added Spy-Bi-Wire capability, can be switched with |
55 | preprocessor definition SPYBIWIRE_MODE between |
56 | 4-wire or 2-wire functionality. |
57 | 1.8 05/09 GC (Elprotronic) Added support for the new hardware - REP430F |
58 | 1.9 05/12 RL Updated commentaries |
59 |----------------------------------------------------------------------------|
60 | Designed 2002 by Texas Instruments Germany |
61 \*==========================================================================*/
64 /****************************************************************************/
65 /* INCLUDES */
66 /****************************************************************************/
67 
68 #include "LowLevelFunc430X.h"
69 
70 /****************************************************************************/
71 /* GLOBAL VARIABLES */
72 /****************************************************************************/
73 
75 byte tdo_bit;
78 
79 /****************************************************************************/
80 /* FUNCTIONS */
81 /****************************************************************************/
82 
83 #ifdef SPYBIWIRE_MODE
84 // Combinations of SBW-cycles (TMS, TDI, TDO)
85 //----------------------------------------------------------------------------
87 void TMSL_TDIL(void)
88 {
90 }
91 //----------------------------------------------------------------------------
93 void TMSH_TDIL(void)
94 {
96 }
97 //----------------------------------------------------------------------------
99 void TMSL_TDIH(void)
100 {
102 }
103 //----------------------------------------------------------------------------
105 void TMSH_TDIH(void)
106 {
108 }
109 //----------------------------------------------------------------------------
111 void TMSL_TDIH_TDOrd(void)
112 {
114 }
115 //----------------------------------------------------------------------------
117 void TMSL_TDIL_TDOrd(void)
118 {
120 }
121 //----------------------------------------------------------------------------
123 void TMSH_TDIH_TDOrd(void)
124 {
126 }
127 //----------------------------------------------------------------------------
129 void TMSH_TDIL_TDOrd(void)
130 {
132 }
133 
134 //----------------------------------------------------------------------------
137 void ClrTCLK_sbw(void)
138 {
139  if (TCLK_saved & SBWDATO)
140  {
141  TMSLDH
142  }
143  else
144  {
145  TMSL
146  }
147 
148  JTAGOUT &= ~SBWDATO;
149 
150  TDIL TDOsbw //ExitTCLK
151  TCLK_saved = (byte)(~SBWDATO);
152 }
153 
154 //----------------------------------------------------------------------------
157 void SetTCLK_sbw(void)
158 {
159  if (TCLK_saved & SBWDATO)
160  {
161  TMSLDH
162  }
163  else
164  {
165  TMSL
166  }
167 
168  JTAGOUT |= SBWDATO;
169 
170  TDIH TDOsbw //ExitTCLK
171  TCLK_saved = SBWDATO;
172 }
173 
174 //----------------------------------------------------------------------------
181 unsigned long AllShifts(word Format, unsigned long Data)
182 {
183  unsigned long TDOword = 0x00000000;
184 
185  unsigned long MSB = 0x00000000;
186  word i;
187 
188 
189  switch(Format)
190  {
191  case F_BYTE: MSB = 0x00000080;
192  break;
193  case F_WORD: MSB = 0x00008000;
194  break;
195  case F_ADDR: MSB = 0x00080000;
196  break;
197  case F_LONG: MSB = 0x80000000;
198  break;
199  default: // this is an unsupported format, function will just return 0
200  return TDOword;
201  }
202  // shift in bits
203  for (i = Format; i > 0; i--)
204  {
205  if (i == 1) // last bit requires TMS=1; TDO one bit before TDI
206  {
207  ((Data & MSB) == 0) ? TMSH_TDIL_TDOrd() : TMSH_TDIH_TDOrd();
208  }
209  else
210  {
211  ((Data & MSB) == 0) ? TMSL_TDIL_TDOrd() : TMSL_TDIH_TDOrd();
212  }
213  Data <<= 1;
214  if (tdo_bit & SBWDATI)
215  TDOword++;
216  if (i > 1)
217  TDOword <<= 1; // TDO could be any port pin
218  }
219  TMSH_TDIH(); // update IR
220  if (TCLK_saved & SBWDATO)
221  {
222  TMSL_TDIH();
223  }
224  else
225  {
226  TMSL_TDIL();
227  }
228 
229  // de-scramble bits on a 20bit shift
230  if(Format == F_ADDR)
231  {
232  TDOword = ((TDOword << 16) + (TDOword >> 4)) & 0x000FFFFF;
233  }
234 
235  return(TDOword);
236 }
237 
238 #else
239 //----------------------------------------------------------------------------
246 unsigned long AllShifts(word Format, unsigned long Data)
247 {
248  word tclk = StoreTCLK(); // Store TCLK state;
249 
250 
251  unsigned long TDOword = 0x00000000;
252  unsigned long MSB = 0x00000000;
253  word i;
254 
255 
256 
257 
258  switch(Format)
259  {
260  case F_BYTE: MSB = 0x00000080;
261  break;
262  case F_WORD: MSB = 0x00008000;
263  break;
264  case F_ADDR: MSB = 0x00080000;
265  break;
266  case F_LONG: MSB = 0x80000000;
267  break;
268  default: // this is an unsupported format, function will just return 0
269  return TDOword;
270  }
271  for (i = Format; i > 0; i--)
272 
273  {
274  ((Data & MSB) == 0) ? ClrTDI() : SetTDI();
275  Data <<= 1;
276  if (i == 1)
277  { // Last bit requires TMS=1
278 
279  SetTMS();
280 
281  }
282  ClrTCK();
283  SetTCK();
284  TDOword <<= 1; // TDO could be any port pin
285  if (ScanTDO() != 0)
286 
287  {
288  TDOword++;
289 
290  }
291  }
292  // common exit
293  RestoreTCLK(tclk); // restore TCLK state
294 
295 
296  // JTAG FSM = Exit-DR
297  ClrTCK();
298  SetTCK();
299  // JTAG FSM = Update-DR
300  ClrTMS();
301  ClrTCK();
302  SetTCK();
303  // JTAG FSM = Run-Test/Idle
304  return(TDOword);
305 }
306 #endif
307 
308 //----------------------------------------------------------------------------
310 void InitController(void)
311 {
312  // Stop watchdog timer to prevent time out reset
313  WDTCTL = WDTPW + WDTHOLD;
314 
315  // Set higher Vcoree, to be able to handle the MCLK freq = 18 MHz
316  SetVCoreUp( 2 );
317 
318  //****** set XT1 clock - crystal 12 MHz **********
319 
320  P7SEL = 3; // Port select XT1
321  UCSCTL5 = 0; // DIVPA, DIVA, DIVS, DIVM -> all direct (DIV=1)
322  UCSCTL6 = XT2OFF+XT1DRIVE_1+XTS;
323  // XT2 OFF, XT1-ON
324  // Drive strength - 8-16MHz LFXT1 HF mode
325  // Loop until XT1,XT2 & DCO stabilizes
326  do{
327  // Clear XT2,XT1,DCO fault flags
328  UCSCTL7 &= ~(XT2OFFG + XT1LFOFFG + XT1HFOFFG + DCOFFG);
329  // Clear fault flags
330  SFRIFG1 &= ~OFIFG;
331  }while( SFRIFG1 & OFIFG );
332  // Select ACLK = LFXT1 = 12MHz
333  // SMCLK = LFXT1 = 12MHz
334  // MCLK = LFXT1 = 12MHz
335  UCSCTL4 = SELA_0+SELS_0+SELM_0;
336 
337 #ifdef MCLK_18MHZ
338  // DCO-freq range up to min 39MHz (must be higher than 18MHz*2 = 36 MHz)
339  UCSCTL1 = 6*DCORSEL0_L;
340  // DCO-DIV/2, PLL MULTI*(23+1), freq = 24*0.75 = 18 MHz
341  UCSCTL2 = FLLD0 + 23*FLLN0;
342  // Reference - XT1-CLK, XT1/16 = 0.75MHz
343  UCSCTL3 = FLLREFDIV_5;
344  // Loop until XT1,XT2 & DCO stabilizes
345  do{
346  // Clear XT2,XT1,DCO fault flags
347  UCSCTL7 &= ~(XT2OFFG + XT1LFOFFG + XT1HFOFFG + DCOFFG);
348  // Clear fault flags
349  SFRIFG1 &= ~OFIFG;
350  }while( SFRIFG1 & OFIFG );
351 
352  UCSCTL4 = SELA__XT1CLK + SELS__DCOCLKDIV + SELM__DCOCLKDIV;
353 #endif
354 
355  // Setup timer_A for hardware delay
356  TA0CTL = 0; // STOP Timer
357  TA0CTL = ID_3+TASSEL_1; // Timer_A source: ACLK/8 = 1.5 MHz
358  TA0CCR0 = ONEMS; // Load CCR0 with delay... (1ms delay)
359 
360  //****** clock setup is done **********
361 
362 #if(0) // can be enabled for test /debug
363  // SMCLK (18 or 12 MHz) freq test on the S1 switch (open) - test time ~ 10ms
364  P1SEL = 0x40; // SMCLK - to P1.6 (S1 - button)
365  P1DIR = 0x40; // for clk test only - must be disabled later
366  MsDelay( 5 );
367 
368 
369  P1SEL = 0;
370  // END OF SMCLK freq test on the S1 switch
371 #endif
372 
373  TRSLDIR = 0;
374  // set port to output from MSPF5437 to I/O translators
375  TRSL_CDIR = TEST_DIR + RST_DIR + TCK_DIR + TMS_DIR + TDOI_DIR + TDI_DIR;
376  // set all directions from I/O translators to MSP430F5437
377  // (all I/O JTAG lines to input)
378  TRSLDIR = TEST_DIR + RST_DIR + TCK_DIR + TMS_DIR + TDOI_DIR + TDI_DIR;
379 
380  // set LED ports direction
382  // TURN-ON all LEDs at the startup
384 
385  // set SW ports pull-ups
386  SW_PULLUP |= SW_MODE0+SW_MODE1+SW_1; // set pull-up/pull-down
387  SW_OUT |= SW_MODE0+SW_MODE1+SW_1; // select pull-up
388 
389  SetTargetVcc (0);
390  SetVpp( 0 );
391 }
392 
393 //----------------------------------------------------------------------------
396 void SetVCoreUp (word level)
397 {
398  // Open PMM registers for write access
399  PMMCTL0_H = 0xA5;
400  // Set SVS/SVM high side new level
401  SVSMHCTL = SVSHE + SVSHRVL0 * level + SVMHE + SVSMHRRL0 * level;
402  // Set SVM low side to new level
403  SVSMLCTL = SVSLE + SVMLE + SVSMLRRL0 * level;
404  // Wait till SVM is settled
405  while ((PMMIFG & SVSMLDLYIFG) == 0);
406  // Clear already set flags
407  PMMIFG &= ~(SVMLVLRIFG + SVMLIFG);
408  // Set VCore to new level
409  PMMCTL0_L = PMMCOREV0 * level;
410  // Wait till new level reached
411  if ((PMMIFG & SVMLIFG))
412  {
413  while ((PMMIFG & SVMLVLRIFG) == 0);
414  }
415  // Set SVS/SVM low side to new level
416  SVSMLCTL = SVSLE + SVSLRVL0 * level + SVMLE + SVSMLRRL0 * level;
417  // Lock PMM registers for write access
418  PMMCTL0_H = 0x00;
419 }
420 
421 //----------------------------------------------------------------------------
426 void SetTargetVcc (word level) // level - requested Vcc * 10
427 {
428  if( level == 0 )
429  TVCC_EN_OUT |= TVCC_DIS_BIT;
430  else
431  TVCC_EN_OUT &= ~TVCC_DIS_BIT;
432  TVCC_EN_DIR |= TVCC_DIS_BIT;
433 
434  if( level < 21 ) level = 21;
435  if( level > 36 ) level = 36;
436  level = TVCC_MASK & ((level - 21)<<TVCC_SHIFT);
437  TVCC_DIR |= TVCC_MASK;
438  TVCC_OUT |= TVCC_MASK; // set min.Vcc ( 0xF0 )
439  TVCC_OUT &= ~level; // set desired Vcc - clear desired bits
440  MsDelay( 50 );
441 }
442 
443 //----------------------------------------------------------------------------
446 word Get_target_Vcc(void)
447 {
448  return( Get_Vx( ADC12INCH_14 ));
449 }
450 
451 //----------------------------------------------------------------------------
454 word Get_Ext_Vcc(void)
455 {
456  return( Get_Vx( ADC12INCH_15 ));
457 }
458 
459 //----------------------------------------------------------------------------
462 word Get_Vx(word index)
463 {
464  word y,x;
465 
466  // ADC12 initialization
467  UCSCTL8 |= MODOSCREQEN; // Enable osc for ADC12
468  // (in the Unifield Clock System)
469 
470  ADC12CTL0 |= ADC12SHT0_8 + ADC12REFON + ADC12ON; // Internal reference =1.5V
471  ADC12CTL1 = ADC12SHP;
472  ADC12MCTL0 = ADC12SREF_1 + index; // Input A14 or A15
473 
474  // Delay for needed ref start-up.
475  MsDelay( 5 );
476 
477  ADC12CTL0 |= ADC12ENC; // Enable conversions
478  ADC12CTL0 |= ADC12SC; // Start conversion - sw trigger
479  ADC12IFG &= ~BIT0;
480  do{
481  }while( (ADC12IFG & BIT0) == 0 );
482  ADC12CTL0 &= ~ADC12ENC; // Disable ADC12
483 
484  // Vcc hardware divider - Vcc/ADCin = 3/1;
485  // Ref Vcc = 1.5
486  // x = x * 3 * 1.5 = x * 4.5 = x * 9 /2
487 
488  x = (ADC12MEM0 * 9)>>1;
489 
490  // result Vcc = x * 1000/4096 in mV
491  // y = x * 1000/(4000+96) ~= x * 0.25 * 4000/(4000+96)
492  // = x * 0.25 * 1/(1+96/4000) != x * 0.25 * (1 - 96/4000)
493  // y = x * 0.25 * (1 - 96/4000) ~= x/4 - x * 24/4000
494  // = x/4 - x/167 ~= x/4 - 3*x/512 = x/4 - x/256 - x/512
495 
496 
497  y = x>>2; // y = x/4
498  x = x>>8; // x = x/256
499  y -= x + (x>>1); // y = x/4 - x/256 - x/512;
500  return(y);
501 }
502 
503 //----------------------------------------------------------------------------
506 void TDI_dir(word dir)
507 {
508  JTAGDIR |= TDI; // Always set to output in the F5437
509  if( dir == 0 ) // Direction IN - from target to REP430F
510  TRSLDIR |= TDI_DIR;
511  else
512  TRSLDIR &= ~TDI_DIR;
513 }
514 
515 //----------------------------------------------------------------------------
518 void TDOI_dir(word dir)
519 {
520  JTAGDIR &= ~TDO; // Always set to input in the F5437
521  if( dir == 0 ) // Direction IN - from target to REP430
522  TRSLDIR |= TDOI_DIR;
523  else
524  TRSLDIR &= ~TDOI_DIR;
525 }
526 
527 //----------------------------------------------------------------------------
530 void TEST_dir(word dir)
531 {
532  if( dir == 0 ) // Direction IN - from target to REP430
533  {
534  JTAGDIR &= ~TEST; // Switch MSP port to input first - to avoid two outputs on the line
535  TRSLDIR |= TEST_DIR;
536  }
537  else
538  {
539  TRSLDIR &= ~TEST_DIR; // Switch translator to output first - to avoid two outputs on the line
540  JTAGDIR |= TEST; // Switch MSP port to output
541  }
542 }
543 
544 //----------------------------------------------------------------------------
547 void TMS_dir(word dir)
548 {
549  if( dir == 0 ) // Direction IN - from target to REP430
550  {
551  JTAGDIR &= ~TMS; // Switch MSP port to input first - to avoid two outputs on the line
552  TRSLDIR |= TMS_DIR;
553  }
554  else
555  {
556  TRSLDIR &= ~TMS_DIR; // Switch translator to output first - to avoid two outputs on the line
557  JTAGDIR |= TMS; // Switch MSP port to output
558  }
559 }
560 
561 //----------------------------------------------------------------------------
564 void RST_dir(word dir)
565 {
566  if( dir == 0 ) // Direction IN - from target to REP430
567  {
568  JTAGDIR &= ~RST; // Switch MSP port to input first - to avoid two outputs on the line
569  TRSLDIR |= RST_DIR;
570  }
571  else
572  {
573  TRSLDIR &= ~RST_DIR; // Switch translator to output first - to avoid two outputs on the line
574  JTAGDIR |= RST; // Switch MSP port to output
575  }
576 }
577 
578 //----------------------------------------------------------------------------
581 void TCK_dir(word dir)
582 {
583  JTAGDIR |= TCK; // Always set to output in the F5437
584  if( dir == 0 ) // Direction IN - from target to REP430
585  TRSLDIR |= TCK_DIR;
586  else
587  TRSLDIR &= ~TCK_DIR;
588 }
589 
590 //----------------------------------------------------------------------------
593 
594 void SetVpp(word source)
595 {
596  if( source & (VPPONTEST | VPPONTDI )) Enable_Vpp();
597  if(( source & (VPPONTEST | VPPONTDI )) == 0 ) Disable_Vpp();
598 
599  if( source & VPPONTEST ) TEST_dir( 0 );
600  if( source & VPPONTDI ) TDI_dir( 0 );
601 
602  VPPOUT &= ~( VPPONTDI | VPPONTEST );
603  source &= VPPONTDI | VPPONTEST;
604  VPPOUT |= source;
605  VPPDIR |= VPPONTDI | VPPONTEST;
606  MsDelay( 2 );
607  if(( source & VPPONTEST ) == 0 ) TEST_dir( 1 );
608  if(( source & VPPONTDI ) == 0 ) TDI_dir( 1 );
609 }
610 
611 //----------------------------------------------------------------------------
613 void Enable_Vpp(void)
614 {
615  SW_DIR |= SW_VPPEN;
616  SW_OUT &= ~SW_VPPEN;
617  MsDelay( 20 );
618 }
619 
620 //----------------------------------------------------------------------------
622 void Disable_Vpp(void)
623 {
624  SW_OUT |= SW_VPPEN;
625  SW_DIR &= ~SW_VPPEN;
626 }
627 
628 //----------------------------------------------------------------------------
631 {
632  TDI_dir( 1 );
633 
634  TEST_dir( 1 );
635  TMS_dir( 1 );
636  RST_dir( 1 );
637  TCK_dir( 1 );
638 }
639 
640 //----------------------------------------------------------------------------
643 {
644  TDOI_dir( 1 );
645  TCK_dir( 1 );
646 }
647 
648 //----------------------------------------------------------------------------
650 void IO_3state(void)
651 {
652  TDI_dir( 0 );
653  TDOI_dir( 0 );
654  TEST_dir( 0 );
655  TMS_dir( 0 );
656  RST_dir( 0 );
657  TCK_dir( 0 );
658 }
659 
660 //----------------------------------------------------------------------------
662 void TDOisInput(void)
663 {
664  TDI_dir( 0 ); // Release TDI pin on target
665  TDOI_dir( 1 ); // Switch TDI --> TDO
666 }
667 
668 //----------------------------------------------------------------------------
670 void DrvSignals(void)
671 {
672  SetVpp( 0 );
673  IO_3state();
674  JTAGSEL = 0x00; // Pins all I/Os
675 #if ( INTERFACE == SPYBIWIRE_IF )
676  JTAGOUT = TDI | TCK;
678 
679 #else
680  JTAGOUT = TEST | TDI | TMS | TCK | TCLK | RST;
682 #endif
683 }
684 
685 //----------------------------------------------------------------------------
687 void RlsSignals(void)
688 {
689  SetVpp( 0 );
690  Disable_Vpp();
691  IO_3state();
692 }
693 
694 //----------------------------------------------------------------------------
699 void InitTarget(void)
700 {
701  DrvSignals();
702  SetTargetVcc( VCC_LEVEL ); //level - requested Vcc * 10
703 }
704 
705 //----------------------------------------------------------------------------
707 void ReleaseTarget(void)
708 {
709  RlsSignals();
710  SetTargetVcc( 0 );
711 }
712 
713 //----------------------------------------------------------------------------
716 void MsDelay(word milliseconds)
717 {
718  word i;
719  for(i = milliseconds; i > 0; i--)
720  {
721  TA0CCTL0 &= ~CCIFG; // Clear the interrupt flag
722  TA0CTL |= TACLR+MC_1; // Clear & start timer
723  while ((TA0CCTL0 & CCIFG)==0); // Wait until the Timer elapses
724  TA0CTL &= ~MC_1; // Stop Timer
725  }
726 }
727 
728 //----------------------------------------------------------------------------
731 void usDelay(word microseconds)
732 {
733  do
734  {
735  _NOP();
736  _NOP();
737  _NOP();
738  _NOP();
739  _NOP();
740  _NOP();
741  _NOP();
742  _NOP();
743 #ifdef MCLK_18MHZ
744  _NOP();
745  _NOP();
746  _NOP();
747  _NOP();
748  _NOP();
749  _NOP();
750 #endif
751  }
752  while (--microseconds > 0);
753 }
754 
755 
756 
757 
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759 
760 
761 
762 
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765 
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799 
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801 
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803 
804 
805 
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807 
808 
809 
810 
811 
812 
813 
814 
815 
816 
817 
818 
819 //----------------------------------------------------------------------------
827 void TCLKstrobes(word Amount)
828 {
829  volatile word i;
830 
831  // This implementation has 45 (MCLK=18MHz)
832  // or 30 (MCLK 12MHz) body cycles! -> 400kHz
833  // DO NOT MODIFY IT !
834 
835  for (i = Amount; i > 0; i--)
836  {
837  JTAGOUT |= TCLK; // Set TCLK
838  _NOP();
839  _NOP();
840  _NOP();
841  _NOP();
842  _NOP();
843  _NOP();
844  _NOP();
845  _NOP();
846  _NOP();
847  _NOP();
848 #ifdef MCLK_18MHZ
849  _NOP();
850  _NOP();
851  _NOP();
852  _NOP();
853  _NOP();
854  _NOP();
855  _NOP();
856  _NOP();
857 #endif
858  JTAGOUT &= ~TCLK; // Reset TCLK
859  _NOP();
860 #ifdef MCLK_18MHZ
861  _NOP();
862  _NOP();
863  _NOP();
864  _NOP();
865  _NOP();
866  _NOP();
867  _NOP();
868 #endif
869  }
870 }
871 
872 
873 //----------------------------------------------------------------------------
880 void ShowStatus(word status, word index)
881 {
882  All_LEDs_off();
883  switch (status)
884  {
885  case STATUS_ERROR:
886  LED_red_on(); // Switch red LED on
887  ReleaseTarget(); // Voltages off, JTAG HI-Z
888  while(index); // Stop program, index must be > 0
889  case STATUS_ACTIVE:; // Switch yellow LEDs on
890  LED_yellow_on();
891  break;
892  case STATUS_OK: // Switch green LED on
893  LED_green_on();
894  break;
895  case STATUS_IDLE:; // Keep LEDs switched off
896  }
897 } // return if active, idle, ok
898 
899 //----------------------------------------------------------------------------
902 #ifdef DEBUG
903 void TriggerPulse(word mode)
904 {
905  switch (mode)
906  {
907  case 1: LEDOUT |= TRIGGER; // mode = 1: set trigger
908  break;
909  case 2: LEDOUT |= TRIGGER; // mode = 2: set/reset trigger
910  case 0: LEDOUT &= ~TRIGGER; // mode = 0: reset trigger
911 
912  }
913 }
914 #endif
915 
916 /****************************************************************************/
917 /* END OF SOURCE FILE */
918 /****************************************************************************/
#define LED_GREEN
GREEN LED.
#define STATUS_ACTIVE
Replicator is active.
#define LED_yellow_on()
Switch on yellow LED.
#define JTAGDIR
JTAG direction register.
#define TCK_DIR
TCK Translator direction 0 - output from REP430F, 1 - input to REP430F.
#define TVCC_SHIFT
Value to shift up voltage level.
#define TDIL
SBW macro: clear TDI signal.
#define TMSL
SBW macro: clear TMS signal.
byte TCLK_saved
Holds the last value of TCLK before entering a JTAG sequence.
#define TVCC_DIR
VCC direction register.
void Disable_Vpp(void)
Disable fuse blow voltage Vpp.
unsigned long AllShifts(word Format, unsigned long Data)
Shift a value into TDI (MSB first) and simultaneously shift out a value from TDO (MSB first)...
#define TMS_DIR
TMS Translator direction 0 - output from REP430F, 1 - input to REP430F.
void configure_IO_JTAG(void)
Set JTAG pins to output direction - from REP430F to target.
#define SW_MODE1
Mode-1 switch.
#define SetTDI()
JTAG macro: set TDI signal.
void usDelay(word microseconds)
Delay function (resolution is ~1 us)
#define JTAGOUT
JTAG output register.
#define TMSLDH
SBW macro: clear TMS signal and immediately set it high again in the SBWTCK low phase to enter the TD...
#define STATUS_IDLE
Replicator is idling.
#define TDIH
SBW macro: Set TDI = 1.
#define VPPONTEST
P8.2 Fuse blow voltage switched to TEST.
byte tdo_bit
Holds the value of TDO-bit.
word Get_target_Vcc(void)
Determine target VCC.
#define ClrTMS()
JTAG macro: clear TMS signal.
#define SW_VPPEN
Switch-Vpp Enable - test and set/clr.
void TDOisInput(void)
This function switches TDO to Input (used for fuse blowing)
#define SBWDATI
JTAG data in pin in SBW mode - separate pin in MSP430F5437 - common IO translator.
#define STATUS_OK
return 1 = no error
#define TDI
P5.7 JTAG TDI input pin.
void InitTarget(void)
Initialization of the Target Board (switch voltages on, preset JTAG pins)
#define TDOI_DIR
TDO/TDI Translator direction 0 - output from REP430F, 1 - input to REP430F.
#define VPPOUT
Fuse blow voltage (Vpp) output register.
#define LED_red_on()
Switch on red LED.
#define TDO
P5.6 JTAG TDO output pin.
void MsDelay(word milliseconds)
Delay function (resolution is 1 ms)
#define LED_YELLOW
YELLOW LED.
void TDI_dir(word dir)
Set the direction for the TDI pin.
#define TDOsbw
SBW macro: TDO cycle without reading TDO.
Low Level function prototypes, macros, and pin-to-signal.
word Get_Ext_Vcc(void)
Determine external VCC.
#define TVCC_MASK
Minimum VCC value.
#define VPPDIR
Fuse blow voltage (Vpp) direction register.
void DrvSignals(void)
Set up I/O pins for JTAG communication.
#define SW_1
SW-1 TEST.
#define SW_MODE0
Mode-0 switch.
#define ONEMS
Constant for setting up Timer A.
void Enable_Vpp(void)
Enable fuse blow voltage Vpp.
void ReleaseTarget(void)
Release Target Board (switch voltages off, JTAG pins are HI-Z)
void IO_3state(void)
Set all JTAG pins to input direction - from target to REP430F.
#define TMS
P5.5 JTAG TMS input pin.
void TCLKstrobes(word Amount)
This function generates Amount strobes with the Flash Timing Generator.
#define TDI_DIR
TDI Translator direction 0 - output from REP430F, 1 - input to REP430F.
#define StoreTCLK()
JTAG macro: return current TCLK signal (on TDI pin)
void TCK_dir(word dir)
Set the direction for the TCK pin.
#define LED_green_on()
Switch on green LED.
#define TDO_RD
SBW macro: TDO cycle with TDO read.
void TEST_dir(word dir)
Set the direction for the TEST pin.
#define RestoreTCLK(x)
JTAG macro: restore TCLK signal on TDI pin (based on input: x)
#define JTAGSEL
JTAG select register.
void TMS_dir(word dir)
Set the direction for the TMS pin.
#define SetTMS()
JTAG macro: set TMS signal.
#define SBWDATO
JTAG data_out pin in SBW mode -separate pin in MSP430F5437 - common IO translator.
#define STATUS_ERROR
return 0 = error
void configure_IO_SBW(void)
Set SBW pins to output direction - from REP430F to target.
void InitController(void)
Initialization of the Controller Board.
#define LED_RED
RED LED.
#define TVCC_OUT
VCC output register.
#define LED_DIR
LED direction register.
#define TMSH
SBW macro: set TMS signal.
void RlsSignals(void)
Release I/O pins.
void ShowStatus(word status, word index)
This function controls the status LEDs depending on the status argument. It stops program in error ca...
#define TEST_DIR
TEST Translator direction 0 - output from REP430F, 1 - input to REP430F.
#define All_LEDs_off()
Switch off all LEDs.
#define RST
P5.3 Hardware RESET input pin.
#define VCC_LEVEL
Set the target's Vcc level supplied by REP430F.
Definition: Config430X.h:70
#define ClrTDI()
JTAG macro: clear TDI signal.
#define ScanTDO()
JTAG macro: return TDO value (result 0 or TDO (0x40))
#define RST_DIR
RESET Translator direction 0 - output from REP430F, 1 - input to REP430F.
#define TEST
P5.2 JTAG Test input pin.
#define LED_OUT
LED output register.
#define TCLK
P5.7 TDI (former XOUT) receives TCLK.
void SetTargetVcc(word level)
Set target Vcc (supplied from REP430F)
#define TCK
P5.4 JTAG TCK input pin.
#define SetTCK()
JTAG macro: set TCK signal.
#define ClrTCK()
JTAG macro: clear TCK signal.
void SetVCoreUp(word level)
Function to set a specific voltage level via the PMM.
void SetVpp(word source)
function to set the fuse blow voltage Vpp
void TDOI_dir(word dir)
Set the direction for the TDO pin.
#define VPPONTDI
P8.1 Fuse blow voltage switched to TDI.
word Get_Vx(word index)
Measure different voltages via ADC12.
void RST_dir(word dir)
Set the direction for the RST pin.

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