JTAGfunc430X.c
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33 /*==========================================================================*\
34 | |
35 | JTAGfunc430X.c |
36 | |
37 | JTAG Control Sequences for Erasing / Programming / Fuse Burning |
38 |----------------------------------------------------------------------------|
39 | Project: JTAG Functions |
40 | Developed using: IAR Embedded Workbench 6.20 |
41 | and: Code Composer Studio 6.0 |
42 |----------------------------------------------------------------------------|
43 | VersionFs history: |
44 | 1.0 04/02 FRGR Initial version. |
45 | 1.1 04/02 ALB2 Formatting changes, added comments. |
46 | 1.2 08/02 ALB2 Initial code release with Lit# SLAA149. |
47 | 1.3 09/05 JDI 'ResetTAP': added SetTDI for fuse check |
48 | search for F2xxx to find respective modifications in |
49 | 'SetPC', 'HaltCPU', 'VerifyPSA', 'EraseFLASH' |
50 | 'WriteFLASH' |
51 | SUN1 Software delays redesigned to use TimerA harware; |
52 | see MsDelay() routine. |
53 | 1.4 01/06 STO Added entry sequence for SBW devices |
54 | Minor cosmetic changes |
55 | 1.5 03/06 STO BlowFuse() make correct fuse check after blowing. |
56 | 1.6 07/06 STO Loop in WriteFLASH() changed. |
57 | 1.7 04/06 WLUT 'VerifyPSA','ReadMemQuick changed to TCLK high. |
58 | WriteFLASHallSections changed due to spec of srec_cat|
59 | Renamed 'ExecutePUC' to 'ExecutePOR' |
60 | 1.8 01/08 WLUT Added usDelay(5) in ResetTAP() to ensure at least |
61 | 5us low phase of TMS during JTAG fuse check. |
62 | 1.9 08/08 WLUT Removed references to Shift() and Shift_430X() |
63 | functions and replaced with AllShifts() reference. |
64 | 2.0 06/12 RL Updated commentaries |
65 | 2.1 03/13 RL/MD Added unlock function for Info A |
66 |----------------------------------------------------------------------------|
67 | Designed 2002 by Texas Instruments Germany |
68 \*==========================================================================*/
71 /****************************************************************************/
72 /* INCLUDES */
73 /****************************************************************************/
74 
75 #include "JTAGfunc430X.h"
76 #include "LowLevelFunc430X.h"
77 #include "Devices430X.h"
78 
79 /****************************************************************************/
80 /* Low level routines for accessing the target device via JTAG: */
81 /****************************************************************************/
82 
83 //----------------------------------------------------------------------------
88 static word DR_Shift16(word data)
89 {
90 #ifdef SPYBIWIRE_MODE
91 
92  // JTAG FSM state = Run-Test/Idle
93  if (TCLK_saved & SBWDATO)
94  {
95  TMSH_TDIH();
96  }
97  else
98  {
99  TMSH_TDIL();
100  }
101  // JTAG FSM state = Select DR-Scan
102  TMSL_TDIH();
103  // JTAG FSM state = Capture-DR
104  TMSL_TDIH();
105 #else
106  // JTAG FSM state = Run-Test/Idle
107  SetTMS();
108  ClrTCK();
109  SetTCK();
110 
111  // JTAG FSM state = Select DR-Scan
112  ClrTMS();
113  ClrTCK();
114  SetTCK();
115  // JTAG FSM state = Capture-DR
116  ClrTCK();
117  SetTCK();
118 #endif
119  // JTAG FSM state = Shift-DR, Shift in TDI (16-bit)
120  return((word)AllShifts(F_WORD, data));
121  // JTAG FSM state = Run-Test/Idle
122 }
123 
124 //----------------------------------------------------------------------------
129 static unsigned long DR_Shift20(unsigned long address)
130 {
131 #ifdef SPYBIWIRE_MODE
132  // JTAG FSM state = Run-Test/Idle
133  if (TCLK_saved & SBWDATO)
134  {
135  TMSH_TDIH();
136  }
137  else
138  {
139  TMSH_TDIL();
140  }
141  // JTAG FSM state = Select DR-Scan
142  TMSL_TDIH();
143  // JTAG FSM state = Capture-DR
144  TMSL_TDIH();
145 #else
146  // JTAG FSM state = Run-Test/Idle
147  SetTMS();
148  ClrTCK();
149  SetTCK();
150 
151  // JTAG FSM state = Select DR-Scan
152  ClrTMS();
153  ClrTCK();
154  SetTCK();
155  // JTAG FSM state = Capture-DR
156  ClrTCK();
157  SetTCK();
158 #endif
159  // JTAG FSM state = Shift-DR, Shift in TDI (16-bit)
160  return(AllShifts(F_ADDR, address));
161  // JTAG FSM state = Run-Test/Idle
162 }
163 
164 //----------------------------------------------------------------------------
170 static word IR_Shift(byte instruction)
171 {
172 #ifdef SPYBIWIRE_MODE
173  // JTAG FSM state = Run-Test/Idle
174  if (TCLK_saved & SBWDATO)
175  {
176  TMSH_TDIH();
177  }
178  else
179  {
180  TMSH_TDIL();
181  }
182  // JTAG FSM state = Select DR-Scan
183  TMSH_TDIH();
184 
185  // JTAG FSM state = Select IR-Scan
186  TMSL_TDIH();
187  // JTAG FSM state = Capture-IR
188  TMSL_TDIH();
189 #else
190  // JTAG FSM state = Run-Test/Idle
191  SetTMS();
192  ClrTCK();
193  SetTCK();
194  // JTAG FSM state = Select DR-Scan
195  ClrTCK();
196  SetTCK();
197 
198  // JTAG FSM state = Select IR-Scan
199  ClrTMS();
200  ClrTCK();
201  SetTCK();
202  // JTAG FSM state = Capture-IR
203  ClrTCK();
204  SetTCK();
205 #endif
206  // JTAG FSM state = Shift-IR, Shift in TDI (8-bit)
207  return(AllShifts(F_BYTE, instruction));
208  // JTAG FSM state = Run-Test/Idle
209 }
210 
211 //----------------------------------------------------------------------------
213 static void ResetTAP(void)
214 {
215  word i;
216 
217 #ifdef SPYBIWIRE_MODE
218  // Reset JTAG FSM
219  for (i = 6; i > 0; i--)
220  {
221  TMSH_TDIH();
222  }
223  // JTAG FSM is in Test-Logic-Reset now
224 
225  TMSL_TDIH();
226 
227  // JTAG FSM is in Run-Test/IDLE now
228 
229  // Perform fuse check
230  TMSH_TDIH();
231  TMSL_TDIH();
232  TMSH_TDIH();
233  TMSL_TDIH();
234  TMSH_TDIH();
235  // In every TDI slot a TCK for the JTAG machine is generated.
236  // Thus we need to get TAP in Run/Test Idle state back again.
237  TMSH_TDIH();
238  TMSL_TDIH();
239 #else
240  // process TDI first to settle fuse current
241  SetTDI();
242  SetTMS();
243  SetTCK();
244 
245  // Reset JTAG FSM
246  for (i = 6; i > 0; i--)
247  {
248  ClrTCK();
249  SetTCK();
250  }
251  // JTAG FSM is now in Test-Logic-Reset
252  ClrTCK();
253  ClrTMS();
254  SetTCK();
255  SetTMS();
256  // JTAG FSM is now in Run-Test/IDLE
257 
258  // Perform fuse check
259  ClrTMS();
260  usDelay(5); // at least 5us low required
261  SetTMS();
262  ClrTMS();
263  usDelay(5); // at least 5us low required
264  SetTMS();
265 #endif
266 }
267 
268 //----------------------------------------------------------------------------
273 static word ExecutePOR_430X(void)
274 {
275  word JtagVersion;
276 
277  // Perform Reset
278  IR_Shift(IR_CNTRL_SIG_16BIT);
279  DR_Shift16(0x2C01); // Apply Reset
280  DR_Shift16(0x2401); // Remove Reset
281  ClrTCLK();
282  SetTCLK();
283  ClrTCLK();
284  SetTCLK();
285  ClrTCLK();
286  JtagVersion = IR_Shift(IR_ADDR_CAPTURE); // read JTAG ID, checked at function end
287  SetTCLK();
288 
289  WriteMem_430X(F_WORD, 0x0120, 0x5A80); // Disable Watchdog on target device
290 
291  if (JtagVersion != JTAG_ID)
292  {
293  return(STATUS_ERROR);
294  }
295  return(STATUS_OK);
296 }
297 
298 //----------------------------------------------------------------------------
301 static word SetInstrFetch(void)
302 {
303  word i;
304 
305  IR_Shift(IR_CNTRL_SIG_CAPTURE);
306 
307  // Wait until CPU is in instr. fetch state, timeout after limited attempts
308  for (i = 50; i > 0; i--)
309  {
310  if (DR_Shift16(0x0000) & 0x0080)
311  {
312  return(STATUS_OK);
313  }
314  ClrTCLK();
315  SetTCLK();
316  }
317  return(STATUS_ERROR);
318 }
319 
320 //----------------------------------------------------------------------------
323 static void SetPC_430X(unsigned long Addr)
324 {
325  SetInstrFetch(); // Set CPU into instruction fetch mode, TCLK=1
326 
327  // Load PC with address
328  IR_Shift(IR_CNTRL_SIG_16BIT);
329  DR_Shift16(0x3401); // CPU has control of RW & BYTE.
330  IR_Shift(IR_DATA_16BIT);
331  DR_Shift16((word)(0x0080 | (((Addr)>>8) & 0x0F00))); // "mova #addr20,PC" instruction
332 
333  ClrTCLK();
334  SetTCLK();
335  DR_Shift16(Addr); // second word of "mova #addr20,PC" instruction
336  ClrTCLK();
337  SetTCLK();
338  IR_Shift(IR_ADDR_CAPTURE);
339  ClrTCLK(); // Now the PC should be on Addr
340  IR_Shift(IR_CNTRL_SIG_16BIT);
341  DR_Shift16(0x2401); // JTAG has control of RW & BYTE.
342 }
343 
344 //----------------------------------------------------------------------------
346 static void HaltCPU(void)
347 {
348  SetInstrFetch(); // Set CPU into instruction fetch mode
349 
350  IR_Shift(IR_DATA_16BIT);
351  DR_Shift16(0x3FFF); // Send JMP $ instruction
352  ClrTCLK();
353  IR_Shift(IR_CNTRL_SIG_16BIT);
354  DR_Shift16(0x2409); // Set JTAG_HALT bit
355  SetTCLK();
356 }
357 
358 //----------------------------------------------------------------------------
360 static void ReleaseCPU(void)
361 {
362  ClrTCLK();
363  IR_Shift(IR_CNTRL_SIG_16BIT);
364  DR_Shift16(0x2401); // Clear the HALT_JTAG bit
365  IR_Shift(IR_ADDR_CAPTURE);
366  SetTCLK();
367 }
368 
369 
370 //----------------------------------------------------------------------------
378 word VerifyPSA_430X(unsigned long StartAddr, unsigned long Length, word *DataArray)
379 {
380  word TDOword;
381  unsigned int i;
382  const word POLY = 0x0805; // Polynom value for PSA calculation
383  word PSA_CRC = (word)(StartAddr-2); // Start value for PSA calculation
384 
385  ExecutePOR_430X();
386 
387  if(DeviceHas_EnhVerify())
388  {
389  SetPC_430X(StartAddr-4);
390  HaltCPU();
391  ClrTCLK();
392  IR_Shift(IR_DATA_16BIT);
393  DR_Shift20(StartAddr-2);
394  }
395  else
396  {
397  SetPC_430X(StartAddr-2);
398  SetTCLK();
399  ClrTCLK();
400  }
401 
402  IR_Shift(IR_DATA_PSA);
403 
404  for (i = 0; i < Length; i++)
405  {
406  // Calculate the PSA (Pseudo Signature Analysis) value
407  if ((PSA_CRC & 0x8000) == 0x8000)
408  {
409  PSA_CRC ^= POLY;
410  PSA_CRC <<= 1;
411  PSA_CRC |= 0x0001;
412  }
413  else
414  {
415  PSA_CRC <<= 1;
416  }
417  // if pointer is 0 then use erase check mask, otherwise data
418  &DataArray[0] == 0 ? (PSA_CRC ^= 0xFFFF) : (PSA_CRC ^= DataArray[i]);
419 
420  // Clock through the PSA
421  SetTCLK();
422 
423 #ifdef SPYBIWIRE_MODE
424 
425  TMSH_TDIH();
426  TMSL_TDIH();
427  TMSL_TDIH();
428  TMSH_TDIH();
429  TMSH_TDIH();
430  TMSL_TDIH();
431 
432 #else
433  //ClrTCLK(); // set here -> Fixes problem with F123 PSA in RAM
434 
435  ClrTCK();
436  MsDelay(1);
437  SetTMS();
438 
439  SetTCK(); // Select DR scan
440  ClrTCK();
441  ClrTMS();
442 
443  SetTCK(); // Capture DR
444  ClrTCK();
445 
446  SetTCK(); // Shift DR
447  ClrTCK();
448  SetTMS();
449 
450  SetTCK(); // Exit DR
451  ClrTCK();
452  SetTCK();
453  ClrTMS();
454  ClrTCK();
455  SetTCK();
456 #endif
457 
458  ClrTCLK(); // set here -> future purpose
459  MsDelay(10);
460  }
461  IR_Shift(IR_SHIFT_OUT_PSA);
462  TDOword = DR_Shift16(0x0000); // Read out the PSA value
463  SetTCLK();
464 
465  if(DeviceHas_EnhVerify())
466  {
467  ReleaseCPU();
468  }
469  ExecutePOR_430X();
470 
471  return((TDOword == PSA_CRC) ? STATUS_OK : STATUS_ERROR);
472 
473 }
474 
475 /****************************************************************************/
476 /* High level routines for accessing the target device via JTAG: */
477 /* */
478 /* From the following, the user is relieved from coding anything. */
479 /* To provide better understanding and clearness, some functionality is */
480 /* coded generously. (Code and speed optimization enhancements may */
481 /* be desired) */
482 /****************************************************************************/
483 static void CheckJtagFuse_SBW(void)
484 {
485  TMSL_TDIH(); // now in Run/Test Idle
486 
487  // Fuse check
488  TMSH_TDIH();
489  TMSL_TDIH();
490  TMSH_TDIH();
491  TMSL_TDIH();
492  TMSH_TDIH();
493  // In every TDI slot a TCK for the JTAG machine is generated.
494  // Thus we need to get TAP in Run/Test Idle state back again.
495  TMSH_TDIH();
496  TMSL_TDIH();
497 }
498 
499 static void CheckJtagFuse_JTAG(void)
500 {
501  // perform a JTAG fuse check
502  SetTMS();_NOP();_NOP();_NOP();
503  ClrTMS();_NOP();_NOP();_NOP();
504  usDelay(15);
505  SetTMS();_NOP();_NOP();_NOP();
506  ClrTMS();_NOP();_NOP();_NOP();
507  usDelay(15);
508  SetTMS();_NOP();_NOP();_NOP();
509 }
510 
513 static void EntrySequences_RstHigh_SBW()
514 {
515  ClrSBWTCK(); //1
516  MsDelay(4); // reset TEST logic
517 
518  SetSBWTDIO(); //2
519 
520  SetSBWTCK(); //3
521  MsDelay(20); // activate TEST logic
522 
523  // phase 1
524  SetSBWTDIO(); //4
525  usDelay(60);
526 
527  // phase 2 -> TEST pin to 0, no change on RST pin
528  // for Spy-Bi-Wire
529  _DINT();
530  //(*_Jtag.Out) &= ~_Jtag.TST; //5
531  ClrSBWTCK();
532 
533  // phase 3
534  usDelay(1);
535  // phase 4 -> TEST pin to 1, no change on RST pin
536  // for Spy-Bi-Wire
537  //(*_Jtag.Out) |= _Jtag.TST; //7
538  SetSBWTCK();
539  _EINT();
540  //_EINT_FET();
541  usDelay(60);
542 
543  // phase 5
544  MsDelay(5);
545 }
546 
549 static void EntrySequences_RstHigh_JTAG()
550 {
551  ClrTST(); //1
552  MsDelay(4); // reset TEST logic
553 
554  SetRST(); //2
555 
556  SetTST(); //3
557  MsDelay(20); // activate TEST logic
558 
559  // phase 1
560  ClrRST(); //4
561  usDelay(60);
562 
563  // phase 2 -> TEST pin to 0, no change on RST pin
564  // for 4-wire JTAG clear Test pin
565  ClrTST(); //5
566 
567  // phase 3
568  usDelay(1);
569 
570  // phase 4 -> TEST pin to 1, no change on RST pin
571  // for 4-wire JTAG
572  SetTST();//7
573  usDelay(60);
574 
575  // phase 5
576  SetRST();
577  MsDelay(5);
578 }
579 
580 //----------------------------------------------------------------------------
582 static word StartJtag(void)
583 {
584  // drive JTAG/TEST signals
585  DrvSignals();
586  MsDelay(10); // delay 10ms
587 
588  if(INTERFACE == SPYBIWIRE_IF)
589  {
590  EntrySequences_RstHigh_SBW();
591  }
592  else if(INTERFACE == SPYBIWIREJTAG_IF)
593  {
594  EntrySequences_RstHigh_JTAG();
595  }
596  else // JTAG_IF
597  {
598  SetRST();
599  SetTST();
600  }
601 
602  ResetTAP(); // reset TAP state machine -> Run-Test/Idle
603 
604  if(INTERFACE == SPYBIWIRE_IF)
605  {
606  CheckJtagFuse_SBW();
607  }
608  else
609  {
610  CheckJtagFuse_JTAG();
611  }
612  return IR_Shift(IR_BYPASS);
613 }
614 
615 //----------------------------------------------------------------------------
617 static void StopJtag (void)
618 {
619  // release JTAG/TEST signals
620  {
621  RlsSignals();
622  MsDelay(10); // delay 10ms
623  }
624 }
625 
626 //----------------------------------------------------------------------------
632 word GetDevice_430X(void)
633 {
634  word i = 0, JtagId = 0; // Initialize JtagId with an invalid value
635 
636  for (i = 0; i < MAX_ENTRY_TRY; i++)
637  {
638  StopJtag(); // Release JTAG/TEST signals to savely reset the test logic
639  JtagId = StartJtag(); // Establish the physical connection to the JTAG interface
640  if(JtagId == JTAG_ID) // Break if a valid JTAG ID is being returned
641  break;
642  }
643  if(i >= MAX_ENTRY_TRY)
644  {
645  return(STATUS_ERROR);
646  }
647 
648  ResetTAP(); // Reset JTAG state machine, check fuse HW
649 
650  if (IsFuseBlown()) // Stop here if fuse is already blown
651  {
652  return(STATUS_FUSEBLOWN);
653  }
654  IR_Shift(IR_CNTRL_SIG_16BIT);
655  DR_Shift16(0x2401); // Set device into JTAG mode + read
656  if (IR_Shift(IR_CNTRL_SIG_CAPTURE) != JTAG_ID)
657  {
658  return(STATUS_ERROR);
659  }
660 
661  // Wait until CPU is synchronized, timeout after a limited # of attempts
662  for (i = 50; i > 0; i--)
663  {
664  if (DR_Shift16(0x0000) & 0x0200)
665  {
666  word DeviceId;
667  DeviceId = ReadMem(F_WORD, 0x0FF0);// Get target device type
668  //(bytes are interchanged)
669  DeviceId = (DeviceId << 8) + (DeviceId >> 8); // swop bytes
670  //Set Device index, which is used by functions in Device.c
671  SetDevice(DeviceId);
672  break;
673  }
674  else
675  {
676  if (i == 1)
677  {
678  return(STATUS_ERROR); // Timeout reached, return false
679  }
680  }
681  }
682  if (!ExecutePOR_430X()) // Perform PUC, Includes
683  {
684  return(STATUS_ERROR); // target Watchdog disable.
685  }
686  return(STATUS_OK);
687 }
688 
689 //----------------------------------------------------------------------------
693 void ReleaseDevice_430X(unsigned long Addr)
694 {
695  if (Addr == V_RESET)
696  {
697  IR_Shift(IR_CNTRL_SIG_16BIT);
698  DR_Shift16(0x2C01); // Perform a reset
699  DR_Shift16(0x2401);
700  }
701  else
702  {
703  SetPC_430X(Addr); // Set target CPU's PC
704  }
705  IR_Shift(IR_CNTRL_SIG_RELEASE);
706 }
707 
708 //----------------------------------------------------------------------------
713 void WriteMem_430X(word Format, unsigned long Addr, word Data)
714 {
715  HaltCPU();
716 
717  ClrTCLK();
718  IR_Shift(IR_CNTRL_SIG_16BIT);
719  if (Format == F_WORD)
720  {
721  DR_Shift16(0x2408); // Set word write
722  }
723  else
724  {
725  DR_Shift16(0x2418); // Set byte write
726  }
727  IR_Shift(IR_ADDR_16BIT);
728  DR_Shift20(Addr); // Set addr
729  IR_Shift(IR_DATA_TO_ADDR);
730  DR_Shift16(Data); // Shift in 16 bits
731  SetTCLK();
732 
733  ReleaseCPU();
734 }
735 
736 //----------------------------------------------------------------------------
741 void WriteMemQuick_430X(unsigned long StartAddr, unsigned long Length, word *DataArray)
742 {
743  unsigned long i;
744 
745  // Initialize writing:
746  SetPC_430X(StartAddr-4);
747  HaltCPU();
748 
749  ClrTCLK();
750  IR_Shift(IR_CNTRL_SIG_16BIT);
751  DR_Shift16(0x2408); // Set RW to write
752  IR_Shift(IR_DATA_QUICK);
753  for (i = 0; i < Length; i++)
754  {
755  DR_Shift16(DataArray[i]); // Shift in the write data
756  SetTCLK();
757  ClrTCLK(); // Increment PC by 2
758  }
759  ReleaseCPU();
760 }
761 
762 //----------------------------------------------------------------------------
768 void WriteFLASH_430X(unsigned long StartAddr, unsigned long Length, word *DataArray)
769 {
770  word i; // Loop counter
771  unsigned long addr = StartAddr; // Address counter
772  word FCTL3_val = SegmentInfoAKey; // Lock/Unlock SegA InfoMem Seg.A, def=locked
773 
774  HaltCPU();
775 
776  ClrTCLK();
777  IR_Shift(IR_CNTRL_SIG_16BIT);
778  DR_Shift16(0x2408); // Set RW to write
779  IR_Shift(IR_ADDR_16BIT);
780  DR_Shift20(0x0128); // FCTL1 register
781  IR_Shift(IR_DATA_TO_ADDR);
782  DR_Shift16(0xA540); // Enable FLASH write
783  SetTCLK();
784 
785  ClrTCLK();
786  IR_Shift(IR_ADDR_16BIT);
787  DR_Shift20(0x012A); // FCTL2 register
788  IR_Shift(IR_DATA_TO_ADDR);
789  DR_Shift16(0xA540); // Select MCLK as source, DIV=1
790  SetTCLK();
791 
792  ClrTCLK();
793  IR_Shift(IR_ADDR_16BIT);
794  DR_Shift20(0x012C); // FCTL3 register
795  IR_Shift(IR_DATA_TO_ADDR);
796  DR_Shift16(FCTL3_val); // Clear FCTL3; F2xxx: Unlock Info-Seg.
797  // A by toggling LOCKA-Bit if required,
798  SetTCLK();
799 
800  ClrTCLK();
801  IR_Shift(IR_CNTRL_SIG_16BIT);
802 
803  for (i = 0; i < Length; i++, addr += 2)
804  {
805  DR_Shift16(0x2408); // Set RW to write
806  IR_Shift(IR_ADDR_16BIT);
807  DR_Shift20(addr); // Set address
808  IR_Shift(IR_DATA_TO_ADDR);
809  DR_Shift16(DataArray[i]); // Set data
810  SetTCLK();
811  ClrTCLK();
812  IR_Shift(IR_CNTRL_SIG_16BIT);
813  DR_Shift16(0x2409); // Set RW to read
814 
815  TCLKstrobes(35); // Provide TCLKs, min. 33 for F149 and F449
816  // F2xxx: 29 are ok
817  }
818 
819  IR_Shift(IR_CNTRL_SIG_16BIT);
820  DR_Shift16(0x2408); // Set RW to write
821  IR_Shift(IR_ADDR_16BIT);
822  DR_Shift20(0x0128); // FCTL1 register
823  IR_Shift(IR_DATA_TO_ADDR);
824  DR_Shift16(0xA500); // Disable FLASH write
825  SetTCLK();
826 
827  // set LOCK-Bits again
828  ClrTCLK();
829  IR_Shift(IR_ADDR_16BIT);
830  DR_Shift20(0x012C); // FCTL3 address
831  IR_Shift(IR_DATA_TO_ADDR);
832  DR_Shift16(FCTL3_val | 0x0010); // Lock Inf-Seg. A by toggling LOCKA and set LOCK again
833  SetTCLK();
834 
835  ReleaseCPU();
836 }
837 
838 //----------------------------------------------------------------------------
848 word WriteFLASHallSections_430X(const unsigned int *data, const unsigned long *address, const unsigned long *length_of_sections, const unsigned long sections)
849 {
850  int i, init = 1;
851 
852  for(i = 0; i < sections; i++)
853  {
854  // Write/Verify(PSA) one FLASH section
855  WriteFLASH(address[i], length_of_sections[i], (word*)&data[init-1]);
856  if (!VerifyMem(address[i], length_of_sections[i], (word*)&data[init-1]))
857  {
858  return(STATUS_ERROR);
859  }
860  init += length_of_sections[i];
861  }
862 
863  return(STATUS_OK);
864 }
865 
866 //----------------------------------------------------------------------------
871 word ReadMem_430X(word Format, unsigned long Addr)
872 {
873  word TDOword;
874 
875  HaltCPU();
876 
877  ClrTCLK();
878  IR_Shift(IR_CNTRL_SIG_16BIT);
879  if (Format == F_WORD)
880  {
881  DR_Shift16(0x2409); // Set word read
882  }
883  else
884  {
885  DR_Shift16(0x2419); // Set byte read
886  }
887  IR_Shift(IR_ADDR_16BIT);
888  DR_Shift20(Addr); // Set address
889  IR_Shift(IR_DATA_TO_ADDR);
890  SetTCLK();
891  ClrTCLK();
892  TDOword = DR_Shift16(0x0000); // Shift out 16 bits
893  ReleaseCPU();
894  return(Format == F_WORD ? TDOword : TDOword & 0x00FF);
895 }
896 
897 //----------------------------------------------------------------------------
902 void ReadMemQuick_430X(unsigned long StartAddr, unsigned long Length, word *DataArray)
903 {
904  unsigned long i;
905 
906  // Initialize reading:
907  SetPC_430X(StartAddr-4);
908  HaltCPU();
909 
910  ClrTCLK();
911  IR_Shift(IR_CNTRL_SIG_16BIT);
912  DR_Shift16(0x2409); // Set RW to read
913  IR_Shift(IR_DATA_QUICK);
914 
915  for (i = 0; i < Length; i++)
916  {
917  SetTCLK();
918  DataArray[i] = DR_Shift16(0x0000); // Shift out the data
919  // from the target.
920  ClrTCLK();
921  }
922  ReleaseCPU();
923 }
924 
925 //----------------------------------------------------------------------------
932 void EraseFLASH_430X(word EraseMode, unsigned long EraseAddr)
933 {
934  word StrobeAmount = 4820; // default for Segment Erase
935  volatile word i, loopcount = 1; // erase cycle repeating for Mass Erase
936  word FCTL3_val = SegmentInfoAKey; // Lock/Unlock SegA InfoMem Seg.A, def=locked
937 
938  if ((EraseMode == ERASE_MASS) ||
939  (EraseMode == ERASE_MAIN) ||
940  (EraseMode == ERASE_ALLMAIN) ||
941  (EraseMode == ERASE_GLOB)
942  )
943  {
944  if(DeviceHas_FastFlash())
945  {
946  StrobeAmount = 10600; // Larger Flash memories require
947  }
948  else
949  {
950  StrobeAmount = 5300; // Larger Flash memories require
951  loopcount = 19; // additional cycles for erase.
952  }
953  }
954  HaltCPU();
955 
956  for (i = loopcount; i > 0; i--)
957  {
958  ClrTCLK();
959  IR_Shift(IR_CNTRL_SIG_16BIT);
960  DR_Shift16(0x2408); // set RW to write
961  IR_Shift(IR_ADDR_16BIT);
962  DR_Shift20(0x0128); // FCTL1 address
963  IR_Shift(IR_DATA_TO_ADDR);
964  DR_Shift16(EraseMode); // Enable erase mode
965  SetTCLK();
966 
967  ClrTCLK();
968  IR_Shift(IR_ADDR_16BIT);
969  DR_Shift20(0x012A); // FCTL2 address
970  IR_Shift(IR_DATA_TO_ADDR);
971  DR_Shift16(0xA540); // MCLK is source, DIV=1
972  SetTCLK();
973 
974  ClrTCLK();
975  IR_Shift(IR_ADDR_16BIT);
976  DR_Shift20(0x012C); // FCTL3 address
977  IR_Shift(IR_DATA_TO_ADDR);
978  DR_Shift16(FCTL3_val); // Clear FCTL3; F2xxx: Unlock Info-Seg. A by toggling LOCKA-Bit if required,
979  SetTCLK();
980 
981  ClrTCLK();
982  IR_Shift(IR_ADDR_16BIT);
983  DR_Shift20(EraseAddr); // Set erase address
984  IR_Shift(IR_DATA_TO_ADDR);
985  DR_Shift16(0x55AA); // Dummy write to start erase
986  SetTCLK();
987 
988  ClrTCLK();
989  IR_Shift(IR_CNTRL_SIG_16BIT);
990  DR_Shift16(0x2409); // Set RW to read
991  TCLKstrobes(StrobeAmount); // Provide TCLKs
992  IR_Shift(IR_CNTRL_SIG_16BIT);
993  DR_Shift16(0x2408); // Set RW to write
994  IR_Shift(IR_ADDR_16BIT);
995  DR_Shift20(0x0128); // FCTL1 address
996  IR_Shift(IR_DATA_TO_ADDR);
997  DR_Shift16(0xA500); // Disable erase
998  SetTCLK();
999 
1000  }
1001  // set LOCK-Bits again
1002  ClrTCLK();
1003  IR_Shift(IR_ADDR_16BIT);
1004  DR_Shift20(0x012C); // FCTL3 address
1005  IR_Shift(IR_DATA_TO_ADDR);
1006  DR_Shift16(FCTL3_val | 0x0010); // Lock Inf-Seg. A by toggling LOCKA (F2xxx) and set LOCK again
1007  SetTCLK();
1008 
1009  ReleaseCPU();
1010 }
1011 
1012 //----------------------------------------------------------------------------
1018 word EraseCheck_430X(unsigned long StartAddr, unsigned long Length)
1019 {
1020  return (VerifyPSA_430X(StartAddr, Length, 0));
1021 }
1022 
1023 //----------------------------------------------------------------------------
1030 word VerifyMem_430X(unsigned long StartAddr, unsigned long Length, word *DataArray)
1031 {
1032  return (VerifyPSA_430X(StartAddr, Length, DataArray));
1033 }
1034 
1035 //------------------------------------------------------------------------
1038 word BlowFuse(void)
1039 {
1040  word mode = VPP_ON_TEST; // Devices with TEST pin: VPP to TEST
1041 
1042  if(!DeviceHas_TestPin())
1043  {
1044  // Devices without TEST pin
1045  IR_Shift(IR_CNTRL_SIG_16BIT);// TDO becomes TDI functionality
1046  DR_Shift16(0x7201);
1047  TDOisInput();
1048  mode = VPP_ON_TDI; // Enable VPP on TDI
1049  }
1050 
1051  IR_Shift(IR_PREPARE_BLOW); // Initialize fuse blowing
1052  MsDelay(1);
1053  VPPon(mode); // Switch VPP onto selected pin
1054  MsDelay(5);
1055  IR_Shift(IR_EX_BLOW); // Execute fuse blowing
1056  MsDelay(1);
1057 
1058  // Switch off power to target and wait
1059  ReleaseTarget(); // switch VPP and VCC target off
1060  MsDelay(200);
1061 
1062  // Check fuse: switch power on, simulate an initial JTAG entry
1063  InitTarget(); // Supply and preset Target Board
1064 
1065  // Return result of "is fuse blown?"
1066  return(GetDevice() == STATUS_FUSEBLOWN);
1067 }
1068 
1069 //------------------------------------------------------------------------
1072 word IsFuseBlown(void)
1073 {
1074  word i;
1075 
1076  for (i = 3; i > 0; i--) // First trial could be wrong
1077  {
1078  IR_Shift(IR_CNTRL_SIG_CAPTURE);
1079  if (DR_Shift16(0xAAAA) == 0x5555)
1080  {
1081  return(STATUS_OK); // Fuse is blown
1082  }
1083  }
1084  return(STATUS_ERROR); // fuse is not blown
1085 }
1086 
1087 //------------------------------------------------------------------------
1089 void UnlockInfoA(void)
1090 {
1091  SegmentInfoAKey = 0xA540;
1092 }
1093 
1094 /****************************************************************************/
1095 /* END OF SOURCE FILE */
1096 /****************************************************************************/
#define IR_ADDR_CAPTURE
Read out the MAB data on the next 16/20-bit data access.
Definition: JTAGfunc430X.h:115
#define IR_DATA_TO_ADDR
Set the MSP430 MDB with a specific 16-bit value and write it to the memory address which is currently...
Definition: JTAGfunc430X.h:118
void WriteMem_430X(word Format, unsigned long Addr, word Data)
This function writes one byte/word at a given address ( <0xA00)
Definition: JTAGfunc430X.c:713
#define ClrTCLK()
clear the TCLK signal
void WriteMemQuick_430X(unsigned long StartAddr, unsigned long Length, word *DataArray)
This function writes an array of words into the target memory.
Definition: JTAGfunc430X.c:741
#define IR_ADDR_16BIT
Set the MSP430 MAB to a specific 16-bit value.
Definition: JTAGfunc430X.h:113
byte TCLK_saved
Holds the last value of TCLK before entering a JTAG sequence.
unsigned long AllShifts(word Format, unsigned long Data)
Shift a value into TDI (MSB first) and simultaneously shift out a value from TDO (MSB first)...
#define SetTDI()
JTAG macro: set TDI signal.
word EraseCheck_430X(unsigned long StartAddr, unsigned long Length)
This function performs an Erase Check over the given memory range.
JTAG Function Prototypes and Definitions.
void usDelay(word microseconds)
Delay function (resolution is ~1 us)
bool DeviceHas_FastFlash(void)
Function to check if current device supports FastFlash.
Definition: Devices430X.c:170
word VerifyMem_430X(unsigned long StartAddr, unsigned long Length, word *DataArray)
This function performs a Verification over the given memory range.
#define ClrTMS()
JTAG macro: clear TMS signal.
#define INTERFACE
Select the interface to be used to communicate with the device.
Definition: Config430X.h:64
bool DeviceHas_TestPin(void)
Function to check if current device has a test pin.
Definition: Devices430X.c:149
#define IR_CNTRL_SIG_CAPTURE
Read out the JTAG control signal register.
Definition: JTAGfunc430X.h:87
#define IR_DATA_16BIT
Set the MSP430 MDB to a specific 16-bit value with the next 16-bit data access.
Definition: JTAGfunc430X.h:100
void TDOisInput(void)
This function switches TDO to Input (used for fuse blowing)
#define STATUS_OK
return 1 = no error
#define ClrSBWTCK()
SBW macro: clear TCK signal.
void InitTarget(void)
Initialization of the Target Board (switch voltages on, preset JTAG pins)
#define JTAG_ID
JTAG identification value for 430X architecture devices.
Definition: JTAGfunc430X.h:124
void EraseFLASH_430X(word EraseMode, unsigned long EraseAddr)
This function performs a mass erase (with and w/o info memory) or a segment erase of a FLASH module s...
Definition: JTAGfunc430X.c:932
word GetDevice_430X(void)
Function to take target device under JTAG control. Disables the target watchdog. Sets the global DEVI...
Definition: JTAGfunc430X.c:632
#define SetTST()
JTAG macro: set TST signal.
#define SetSBWTCK()
SBW macro: set TCK signal.
void MsDelay(word milliseconds)
Delay function (resolution is 1 ms)
#define IR_CNTRL_SIG_16BIT
Set the JTAG control signal register.
Definition: JTAGfunc430X.h:85
word BlowFuse(void)
This function blows the security fuse.
#define IR_CNTRL_SIG_RELEASE
Release the CPU from JTAG control.
Definition: JTAGfunc430X.h:89
#define IR_DATA_PSA
Switch JTAG data register to PSA mode.
Definition: JTAGfunc430X.h:106
void WriteFLASH_430X(unsigned long StartAddr, unsigned long Length, word *DataArray)
This function programs/verifies an array of words into the FLASH memory by using the FLASH controller...
Definition: JTAGfunc430X.c:768
Low Level function prototypes, macros, and pin-to-signal.
void ReleaseDevice_430X(unsigned long Addr)
Function to release the target device from JTAG control.
Definition: JTAGfunc430X.c:693
bool DeviceHas_EnhVerify(void)
Function to check if current device supports EnhVerify.
Definition: Devices430X.c:177
word VerifyPSA_430X(unsigned long StartAddr, unsigned long Length, word *DataArray)
This function compares the computed PSA (Pseudo Signature Analysis) value to the PSA value shifted ou...
Definition: JTAGfunc430X.c:378
void DrvSignals(void)
Set up I/O pins for JTAG communication.
#define SPYBIWIRE_IF
Spy-Bi-Wire interface.
#define STATUS_FUSEBLOWN
GetDevice returns this if the security fuse is blown.
Device Function Prototypes and Definitions for FLASH programming.
void ReleaseTarget(void)
Release Target Board (switch voltages off, JTAG pins are HI-Z)
void TCLKstrobes(word Amount)
This function generates Amount strobes with the Flash Timing Generator.
#define ERASE_MAIN
Constant for flash erase: main of SELECTED mem arrays.
Definition: Devices430X.h:78
#define ERASE_GLOB
Constant for flash erase: main & info of ALL mem arrays.
Definition: Devices430X.h:72
#define SetTMS()
JTAG macro: set TMS signal.
#define SBWDATO
JTAG data_out pin in SBW mode -separate pin in MSP430F5437 - common IO translator.
#define STATUS_ERROR
return 0 = error
#define ClrTST()
JTAG macro: clear TST signal.
#define ClrRST()
JTAG macro: clear RST signal.
#define ERASE_ALLMAIN
Constant for flash erase: main of ALL mem arrays.
Definition: Devices430X.h:74
#define SPYBIWIREJTAG_IF
JTAG interface on a device that supports JTAG and SBW.
word WriteFLASHallSections_430X(const unsigned int *data, const unsigned long *address, const unsigned long *length_of_sections, const unsigned long sections)
This function programs/verifies a set of data arrays of words into a FLASH memory by using the "Write...
Definition: JTAGfunc430X.c:848
#define VPPon(x)
Supply fuse blow voltage based on TEST or TDI pin (based on input: x(.
void RlsSignals(void)
Release I/O pins.
#define IR_SHIFT_OUT_PSA
Shift out the PSA pattern generated by IR_DATA_PSA.
Definition: JTAGfunc430X.h:108
#define IR_PREPARE_BLOW
Prepare for JTAG fuse blow.
Definition: JTAGfunc430X.h:93
word IsFuseBlown(void)
This function checks if the JTAG access security fuse is blown.
#define IR_EX_BLOW
Perform JTAG fuse blow.
Definition: JTAGfunc430X.h:95
#define SetRST()
JTAG macro: set RST signal.
word ReadMem_430X(word Format, unsigned long Addr)
This function reads one byte/word from a given address in memory.
Definition: JTAGfunc430X.c:871
#define SetTCLK()
set the TCLK signal
void UnlockInfoA(void)
This function unlocks segment A of the InfoMemory (Flash)
#define ERASE_MASS
Constant for flash erase: main & info of SELECTED mem arrays.
Definition: Devices430X.h:76
#define MAX_ENTRY_TRY
Maximum number of tries for the determination of the core identification info.
Definition: Config430X.h:86
#define IR_BYPASS
Bypass instruction - TDI input is shifted to TDO as an output.
Definition: JTAGfunc430X.h:120
void ReadMemQuick_430X(unsigned long StartAddr, unsigned long Length, word *DataArray)
This function reads an array of words from the memory.
Definition: JTAGfunc430X.c:902
#define SetTCK()
JTAG macro: set TCK signal.
#define ClrTCK()
JTAG macro: clear TCK signal.
void SetDevice(word wDeviceId)
This function accepts a Device ID and extracts the corresponding device information from the sDeviceF...
Definition: Devices430X.c:136
#define SetSBWTDIO()
SBW macro: set TDIO signal.
#define IR_DATA_QUICK
Set the MSP430 MDB to a specific 16-bit value (RAM only)
Definition: JTAGfunc430X.h:102

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