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flash.c
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1 /******************************************************************************
2 * Filename: flash.c
3 * Revised: 2014-12-22 14:02:25 +0100 (ma, 22 des 2014)
4 * Revision: 42272
5 *
6 * Description: Driver for on chip Flash.
7 *
8 * Copyright (c) 2015, Texas Instruments Incorporated
9 * All rights reserved.
10 *
11 * Redistribution and use in source and binary forms, with or without
12 * modification, are permitted provided that the following conditions are met:
13 *
14 * 1) Redistributions of source code must retain the above copyright notice,
15 * this list of conditions and the following disclaimer.
16 *
17 * 2) Redistributions in binary form must reproduce the above copyright notice,
18 * this list of conditions and the following disclaimer in the documentation
19 * and/or other materials provided with the distribution.
20 *
21 * 3) Neither the name of the ORGANIZATION nor the names of its contributors may
22 * be used to endorse or promote products derived from this software without
23 * specific prior written permission.
24 *
25 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
26 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
27 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
28 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
29 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
30 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
31 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
32 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
33 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
34 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
35 * POSSIBILITY OF SUCH DAMAGE.
36 *
37 ******************************************************************************/
38 
39 #include <inc/hw_types.h>
40 #include <driverlib/flash.h>
41 #include <driverlib/rom.h>
42 #include <driverlib/chipinfo.h>
43 
44 //*****************************************************************************
45 //
46 // Handle support for DriverLib in ROM:
47 // This section will undo prototype renaming made in the header file
48 //
49 //*****************************************************************************
50 #ifndef DRIVERLIB_GENERATE_ROM
51  #undef FlashPowerModeSet
52  #define FlashPowerModeSet NOROM_FlashPowerModeSet
53  #undef FlashPowerModeGet
54  #define FlashPowerModeGet NOROM_FlashPowerModeGet
55  #undef FlashProtectionSet
56  #define FlashProtectionSet NOROM_FlashProtectionSet
57  #undef FlashProtectionGet
58  #define FlashProtectionGet NOROM_FlashProtectionGet
59  #undef FlashProtectionSave
60  #define FlashProtectionSave NOROM_FlashProtectionSave
61  #undef FlashSectorErase
62  #define FlashSectorErase NOROM_FlashSectorErase
63  #undef FlashProgram
64  #define FlashProgram NOROM_FlashProgram
65  #undef FlashProgramNowait
66  #define FlashProgramNowait NOROM_FlashProgramNowait
67  #undef FlashEfuseReadRow
68  #define FlashEfuseReadRow NOROM_FlashEfuseReadRow
69  #undef FlashDisableSectorsForWrite
70  #define FlashDisableSectorsForWrite NOROM_FlashDisableSectorsForWrite
71 #endif
72 
73 //*****************************************************************************
74 //
75 // Default values for security control in customer configuration area in flash
76 // top sector.
77 //
78 //*****************************************************************************
79 const uint8_t g_pui8CcfgDefaultSec[] = {0xFF, 0xFF, 0xFF, 0xC5,
80  0xFF, 0xFF, 0xFF, 0xFF,
81  0xC5, 0xFF, 0xFF, 0xFF,
82  0xC5, 0xC5, 0xC5, 0xFF,
83  0xC5, 0xC5, 0xC5, 0xFF
84  };
85 
86 typedef uint32_t (* FlashPrgPointer_t) (uint8_t *, uint32_t, uint32_t);
87 
88 typedef uint32_t (* FlashSectorErasePointer_t) (uint32_t);
89 
90 //*****************************************************************************
91 //
92 // Function prototypes for static functions
93 //
94 //*****************************************************************************
95 static void SetReadMode(void);
96 
97 //*****************************************************************************
98 //
100 //
101 //*****************************************************************************
102 void
103 FlashPowerModeSet(uint32_t ui32PowerMode, uint32_t ui32BankGracePeriode,
104  uint32_t ui32PumpGracePeriode)
105 {
106  //
107  // Check the arguments.
108  //
109  ASSERT(ui32PowerMode == FLASH_PWR_ACTIVE_MODE ||
110  ui32PowerMode == FLASH_PWR_OFF_MODE ||
111  ui32PowerMode == FLASH_PWR_DEEP_STDBY_MODE);
112  ASSERT(ui32BankGracePeriode <= 0xFF);
113  ASSERT(ui32PumpGracePeriode <= 0xFFFF);
114 
115  switch(ui32PowerMode)
116  {
118  //
119  // Set bank power mode to ACTIVE.
120  //
121  HWREG(FLASH_BASE + FLASH_O_FBFALLBACK) =
122  (HWREG(FLASH_BASE + FLASH_O_FBFALLBACK) &
124 
125  //
126  // Set charge pump power mode to ACTIVE mode.
127  //
128  HWREG(FLASH_BASE + FLASH_O_FPAC1) =
130  break;
131 
132  case FLASH_PWR_OFF_MODE:
133  //
134  // Set bank grace periode.
135  //
136  HWREG(FLASH_BASE + FLASH_O_FBAC) =
137  (HWREG(FLASH_BASE + FLASH_O_FBAC) & (~FLASH_FBAC_BAGP_M)) |
138  ((ui32BankGracePeriode << FLASH_FBAC_BAGP_S) & FLASH_FBAC_BAGP_M);
139 
140  //
141  // Set pump grace periode.
142  //
143  HWREG(FLASH_BASE + FLASH_O_FPAC2) =
145  ((ui32PumpGracePeriode << FLASH_FPAC2_PAGP_S) & FLASH_FPAC2_PAGP_M);
146 
147  //
148  // Set bank power mode to SLEEP.
149  //
151 
152  //
153  // Set charge pump power mode to SLEEP mode.
154  //
156  break;
157 
159  //
160  // Set bank grace periode.
161  //
162  HWREG(FLASH_BASE + FLASH_O_FBAC) =
163  (HWREG(FLASH_BASE + FLASH_O_FBAC) & (~FLASH_FBAC_BAGP_M)) |
164  ((ui32BankGracePeriode << FLASH_FBAC_BAGP_S) & FLASH_FBAC_BAGP_M);
165 
166  //
167  // Set pump grace periode.
168  //
169  HWREG(FLASH_BASE + FLASH_O_FPAC2) =
171  ((ui32PumpGracePeriode << FLASH_FPAC2_PAGP_S) & FLASH_FPAC2_PAGP_M);
172 
173  //
174  // Set bank power mode to DEEP STANDBY mode.
175  //
176  HWREG(FLASH_BASE + FLASH_O_FBFALLBACK) =
177  (HWREG(FLASH_BASE + FLASH_O_FBFALLBACK) &
179 
180  //
181  // Set charge pump power mode to STANDBY mode.
182  //
184  break;
185  }
186 }
187 
188 //*****************************************************************************
189 //
191 //
192 //*****************************************************************************
193 uint32_t
195 {
196  uint32_t ui32PowerMode;
197  uint32_t ui32BankPwrMode;
198 
199  ui32BankPwrMode = HWREG(FLASH_BASE + FLASH_O_FBFALLBACK) &
201 
202  if(ui32BankPwrMode == FBFALLBACK_SLEEP)
203  {
204  ui32PowerMode = FLASH_PWR_OFF_MODE;
205  }
206  else if(ui32BankPwrMode == FBFALLBACK_DEEP_STDBY)
207  {
208  ui32PowerMode = FLASH_PWR_DEEP_STDBY_MODE;
209  }
210  else
211  {
212  ui32PowerMode = FLASH_PWR_ACTIVE_MODE;
213  }
214 
215  //
216  // Return power mode.
217  //
218  return(ui32PowerMode);
219 }
220 
221 //*****************************************************************************
222 //
224 //
225 //*****************************************************************************
226 void
227 FlashProtectionSet(uint32_t ui32SectorAddress, uint32_t ui32ProtectMode)
228 {
229  uint32_t ui32SectorNumber;
230 
231  //
232  // Check the arguments.
233  //
234  ASSERT(ui32SectorAddress <= (FLASHMEM_BASE + FlashSizeGet() -
235  FlashSectorSizeGet()));
236  ASSERT((ui32SectorAddress & (FlashSectorSizeGet() - 1)) == 00);
237 
238  if(ui32ProtectMode == FLASH_WRITE_PROTECT)
239  {
240  ui32SectorNumber = (ui32SectorAddress - FLASHMEM_BASE) /
243 
244  if(ui32SectorNumber <= 31)
245  {
246  HWREG(FLASH_BASE + FLASH_O_FSM_BSLE0) |= (1 << ui32SectorNumber);
247  HWREG(FLASH_BASE + FLASH_O_FSM_BSLP0) |= (1 << ui32SectorNumber);
248  }
249  else if(ui32SectorNumber <= 63)
250  {
251  HWREG(FLASH_BASE + FLASH_O_FSM_BSLE1) |=
252  (1 << (ui32SectorNumber & 0x1F));
253  HWREG(FLASH_BASE + FLASH_O_FSM_BSLP1) |=
254  (1 << (ui32SectorNumber & 0x1F));
255  }
256 
258  }
259 }
260 
261 //*****************************************************************************
262 //
264 //
265 //*****************************************************************************
266 uint32_t
267 FlashProtectionGet(uint32_t ui32SectorAddress)
268 {
269  uint32_t ui32SectorProtect;
270  uint32_t ui32SectorNumber;
271 
272  //
273  // Check the arguments.
274  //
275  ASSERT(ui32SectorAddress <= (FLASHMEM_BASE + FlashSizeGet() -
276  FlashSectorSizeGet()));
277  ASSERT((ui32SectorAddress & (FlashSectorSizeGet() - 1)) == 00);
278 
279  ui32SectorProtect = FLASH_NO_PROTECT;
280  ui32SectorNumber = (ui32SectorAddress - FLASHMEM_BASE) / FlashSectorSizeGet();
281 
282  if(ui32SectorNumber <= 31)
283  {
284  if((HWREG(FLASH_BASE + FLASH_O_FSM_BSLE0) & (1 << ui32SectorNumber)) &&
285  (HWREG(FLASH_BASE + FLASH_O_FSM_BSLP0) & (1 << ui32SectorNumber)))
286  {
287  ui32SectorProtect = FLASH_WRITE_PROTECT;
288  }
289  }
290  else if(ui32SectorNumber <= 63)
291  {
292  if((HWREG(FLASH_BASE + FLASH_O_FSM_BSLE1) &
293  (1 << (ui32SectorNumber & 0x1F))) &&
294  (HWREG(FLASH_BASE + FLASH_O_FSM_BSLP1) &
295  (1 << (ui32SectorNumber & 0x1F))))
296  {
297  ui32SectorProtect = FLASH_WRITE_PROTECT;
298  }
299  }
300 
301  return(ui32SectorProtect);
302 }
303 
304 //*****************************************************************************
305 //
307 //
308 //*****************************************************************************
309 uint32_t
310 FlashProtectionSave(uint32_t ui32SectorAddress)
311 {
312  uint32_t ui32ErrorReturn;
313  uint32_t ui32SectorNumber;
314  uint32_t ui32CcfgSectorAddr;
315  uint8_t pui8ProgBuf[4];
316 
317  ui32ErrorReturn = FAPI_STATUS_SUCCESS;
318 
319  //
320  // Check the arguments.
321  //
322  ASSERT(ui32SectorAddress <= (FLASHMEM_BASE + FlashSizeGet() -
323  FlashSectorSizeGet()));
324  ASSERT((ui32SectorAddress & (FlashSectorSizeGet() - 1)) == 00);
325 
326  if(FlashProtectionGet(ui32SectorAddress) == FLASH_WRITE_PROTECT)
327  {
328  //
329  // Find sector number for specified sector.
330  //
331  ui32SectorNumber = (ui32SectorAddress - FLASHMEM_BASE) / FlashSectorSizeGet();
332  ui32CcfgSectorAddr = FLASHMEM_BASE + FlashSizeGet() - FlashSectorSizeGet();
333 
334  //
335  // Adjust CCFG address to the 32-bit CCFG word holding the
336  // protect-bit for the specified sector.
337  //
338  ui32CcfgSectorAddr += (((ui32SectorNumber >> 5) * 4) + CCFG_OFFSET_SECT_PROT);
339 
340  //
341  // Find value to program by setting the protect-bit which
342  // corresponds to specified sector number, to 0.
343  // Leave other protect-bits unchanged.
344  //
345  *(uint32_t *)pui8ProgBuf = (~(1 << (ui32SectorNumber & 0x1F))) &
346  *(uint32_t *)ui32CcfgSectorAddr;
347 
348  ui32ErrorReturn = FlashProgram(pui8ProgBuf, ui32CcfgSectorAddr,
350  }
351 
352  //
353  // Return status.
354  //
355  return(ui32ErrorReturn);
356 }
357 
358 //*****************************************************************************
359 //
361 //
362 //*****************************************************************************
363 uint32_t
364 FlashSectorErase(uint32_t ui32SectorAddress)
365 {
366  uint32_t ui32ErrorReturn;
367  FlashSectorErasePointer_t FuncPointer;
368 
369  //
370  // Check the arguments.
371  //
372  ASSERT(ui32SectorAddress <= (FLASHMEM_BASE + FlashSizeGet() -
373  FlashSectorSizeGet()));
374  ASSERT((ui32SectorAddress & (FlashSectorSizeGet() - 1)) == 00);
375 
376  //
377  // Call ROM function
378  //
379  FuncPointer = (uint32_t (*)(uint32_t)) (ROM_FLASHTABLE[5]);
380  ui32ErrorReturn = FuncPointer(ui32SectorAddress);
381 
382  //
383  // Enable standby in flash bank since ROM function migth have disabled it
384  //
386 
387  //
388  // Return status of operation.
389  //
390  return(ui32ErrorReturn);
391 
392 }
393 
394 
395 //*****************************************************************************
396 //
398 //
399 //*****************************************************************************
400 uint32_t
401 FlashProgram(uint8_t *pui8DataBuffer, uint32_t ui32Address, uint32_t ui32Count)
402 {
403  uint32_t ui32ErrorReturn;
404  FlashPrgPointer_t FuncPointer;
405 
406  //
407  // Check the arguments.
408  //
409  ASSERT((ui32Address + ui32Count) <= (FLASHMEM_BASE + FlashSizeGet()));
410 
411  //
412  // Call ROM function
413  //
414  FuncPointer = (uint32_t (*)(uint8_t *, uint32_t, uint32_t)) (ROM_FLASHTABLE[6]);
415  ui32ErrorReturn = FuncPointer( pui8DataBuffer, ui32Address, ui32Count);
416 
417  //
418  // Enable standby in flash bank since ROM function migth have disabled it
419  //
421 
422  //
423  // Return status of operation.
424  //
425  return(ui32ErrorReturn);
426 
427 }
428 
429 //*****************************************************************************
430 //
432 //
433 //*****************************************************************************
434 bool
435 FlashEfuseReadRow(uint32_t *pui32EfuseData, uint32_t ui32RowAddress)
436 {
437  bool bStatus;
438 
439  //
440  // Make sure the clock for the efuse is enabled
441  //
443 
444  //
445  // Set timing for EFUSE read operations.
446  //
449 
450  //
451  // Clear status register.
452  //
453  HWREG(FLASH_BASE + FLASH_O_EFUSEERROR) = 0;
454 
455  //
456  // Select the FuseROM block 0.
457  //
458  HWREG(FLASH_BASE + FLASH_O_EFUSEADDR) = 0x00000000;
459 
460  //
461  // Start the read operation.
462  //
463  HWREG(FLASH_BASE + FLASH_O_EFUSE) =
465  (ui32RowAddress & FLASH_EFUSE_DUMPWORD_M);
466 
467  //
468  // Wait for operation to finish.
469  //
471  {
472  }
473 
474  //
475  // Check if error reported.
476  //
478  {
479  //
480  // Set error status.
481  //
482  bStatus = 1;
483 
484  //
485  // Clear data.
486  //
487  *pui32EfuseData = 0;
488  }
489  else
490  {
491  //
492  // Set ok status.
493  //
494  bStatus = 0;
495 
496  //
497  // No error. Get data from data register.
498  //
499  *pui32EfuseData = HWREG(FLASH_BASE + FLASH_O_DATALOWER);
500  }
501 
502  //
503  // Disable the efuse clock to conserve power
504  //
506 
507  //
508  // Return the data.
509  //
510  return(bStatus);
511 }
512 
513 
514 //*****************************************************************************
515 //
517 //
518 //*****************************************************************************
519 void
521 {
522  //
523  // Configure flash back to read mode
524  //
525  SetReadMode();
526 
527  //
528  // Disable Level 1 Protection.
529  //
531 
532  //
533  // Disable all sectors for erase and programming.
534  //
535  HWREG(FLASH_BASE + FLASH_O_FBSE) = 0x0000;
536 
537  //
538  // Enable Level 1 Protection.
539  //
540  HWREG(FLASH_BASE + FLASH_O_FBPROT) = 0;
541 
542  //
543  // Protect sectors from sector erase.
544  //
546  HWREG(FLASH_BASE + FLASH_O_FSM_SECTOR1) = 0xFFFFFFFF;
547  HWREG(FLASH_BASE + FLASH_O_FSM_SECTOR2) = 0xFFFFFFFF;
549 }
550 
551 //*****************************************************************************
552 //
560 //
561 //*****************************************************************************
562 static void
563 SetReadMode(void)
564 {
565  uint32_t ui32TrimValue;
566  uint32_t ui32Value;
567 
568  //
569  // Configure the STANDBY_MODE_SEL, STANDBY_PW_SEL, DIS_STANDBY, DIS_IDLE,
570  // VIN_AT_X and VIN_BY_PASS for read mode
571  //
574  {
575  // Select trim values for external regulator mode:
576  // Configure STANDBY_MODE_SEL (OTP offset 0x308 bit 7)
577  // COnfigure STANDBY_PW_SEL (OTP offset 0x308 bit 6:5)
578  // Must be done while the register bit field CONFIG.DIS_STANDBY = 1
580 
581  ui32TrimValue =
582  HWREG(FLASH_CFG_BASE + FCFG1_OFFSET + FCFG1_O_FLASH_OTP_DATA4);
583 
584  ui32Value = ((ui32TrimValue &
588 
589  ui32Value |= ((ui32TrimValue &
593 
594  // Configure DIS_STANDBY (OTP offset 0x308 bit 4).
595  // Configure DIS_IDLE (OTP offset 0x308 bit 3).
596  ui32Value |= ((ui32TrimValue &
601 
602  HWREG(FLASH_BASE + FLASH_O_CFG) = (HWREG(FLASH_BASE + FLASH_O_CFG) &
606  FLASH_CFG_DIS_IDLE_M)) | ui32Value;
607 
608  // Check if sample and hold functionality is disabled.
610  {
611  //
612  // Wait for disabled sample and hold functionality to be stable.
613  //
614  while(!(HWREG(FLASH_BASE + FLASH_O_STAT) & FLASH_STAT_SAMHOLD_DIS))
615  {
616  }
617  }
618 
619  // Configure VIN_AT_X (OTP offset 0x308 bits 2:0)
620  ui32Value = ((ui32TrimValue &
624 
625  // Configure VIN_BY_PASS which is dependent on the VIN_AT_X value.
626  // If VIN_AT_X = 7 then VIN_BY_PASS should be 0 otherwise
627  // VIN_BY_PASS should be 1
628  if(((ui32Value & FLASH_FSEQPMP_VIN_AT_X_M) >>
629  FLASH_FSEQPMP_VIN_AT_X_S) != 0x7)
630  {
631  ui32Value |= FLASH_FSEQPMP_VIN_BY_PASS;
632  }
633 
634  HWREG(FLASH_BASE + FLASH_O_FLOCK) = 0xAAAA;
635  HWREG(FLASH_BASE + FLASH_O_FSEQPMP) =
636  (HWREG(FLASH_BASE + FLASH_O_FSEQPMP) &
638  FLASH_FSEQPMP_VIN_AT_X_M)) | ui32Value;
639  HWREG(FLASH_BASE + FLASH_O_FLOCK) = 0x55AA;
640  }
641  else
642  {
643  // Select trim values for internal regulator mode:
644  // Configure STANDBY_MODE_SEL (OTP offset 0x308 bit 15)
645  // COnfigure STANDBY_PW_SEL (OTP offset 0x308 bit 14:13)
646  // Must be done while the register bit field CONFIG.DIS_STANDBY = 1
648 
649  ui32TrimValue =
650  HWREG(FLASH_CFG_BASE + FCFG1_OFFSET + FCFG1_O_FLASH_OTP_DATA4);
651 
652  ui32Value = ((ui32TrimValue &
656 
657  ui32Value |= ((ui32TrimValue &
661 
662  // Configure DIS_STANDBY (OTP offset 0x308 bit 12).
663  // Configure DIS_IDLE (OTP offset 0x308 bit 11).
664  ui32Value |= ((ui32TrimValue &
669 
670  HWREG(FLASH_BASE + FLASH_O_CFG) = (HWREG(FLASH_BASE + FLASH_O_CFG) &
674  FLASH_CFG_DIS_IDLE_M)) | ui32Value;
675 
676  // Check if sample and hold functionality is disabled.
678  {
679  //
680  // Wait for disabled sample and hold functionality to be stable.
681  //
682  while(!(HWREG(FLASH_BASE + FLASH_O_STAT) & FLASH_STAT_SAMHOLD_DIS))
683  {
684  }
685  }
686 
687  // Configure VIN_AT_X (OTP offset 0x308 bits 10:8)
688  ui32Value = (((ui32TrimValue &
692 
693  // Configure VIN_BY_PASS which is dependent on the VIN_AT_X value.
694  // If VIN_AT_X = 7 then VIN_BY_PASS should be 0 otherwise
695  // VIN_BY_PASS should be 1
696  if(((ui32Value & FLASH_FSEQPMP_VIN_AT_X_M) >>
697  FLASH_FSEQPMP_VIN_AT_X_S) != 0x7)
698  {
699  ui32Value |= FLASH_FSEQPMP_VIN_BY_PASS;
700  }
701 
702  HWREG(FLASH_BASE + FLASH_O_FLOCK) = 0xAAAA;
703  HWREG(FLASH_BASE + FLASH_O_FSEQPMP) =
704  (HWREG(FLASH_BASE + FLASH_O_FSEQPMP) &
706  FLASH_FSEQPMP_VIN_AT_X_M)) | ui32Value;
707  HWREG(FLASH_BASE + FLASH_O_FLOCK) = 0x55AA;
708  }
709 }
710 
711 //*****************************************************************************
712 //
713 // HAPI Flash program function
714 //
715 //*****************************************************************************
716 uint32_t
717 MemBusWrkAroundHapiProgramFlash(uint8_t *pui8DataBuffer, uint32_t ui32Address,
718  uint32_t ui32Count)
719 {
720  uint32_t ui32ErrorReturn;
721  FlashPrgPointer_t FuncPointer;
722  uint32_t ui32RomAddr = HWREG(ROM_HAPI_TABLE_ADDR + (5 * 4));
723 
724  //
725  // Call ROM function
726  //
727  FuncPointer = (uint32_t (*)(uint8_t *, uint32_t, uint32_t)) (ui32RomAddr);
728  ui32ErrorReturn = FuncPointer( pui8DataBuffer, ui32Address, ui32Count);
729 
730  //
731  // Enable standby in flash bank since ROM function migth have disabled it
732  //
734 
735  //
736  // Return status of operation.
737  //
738  return(ui32ErrorReturn);
739 }
740 
741 //*****************************************************************************
742 //
743 // HAPI Flash sector erase function
744 //
745 //*****************************************************************************
746 uint32_t
747 MemBusWrkAroundHapiEraseSector(uint32_t ui32Address)
748 {
749  uint32_t ui32ErrorReturn;
750 
751  FlashSectorErasePointer_t FuncPointer;
752  uint32_t ui32RomAddr = HWREG(ROM_HAPI_TABLE_ADDR + (3 * 4));
753 
754  //
755  // Call ROM function
756  //
757  FuncPointer = (uint32_t (*)(uint32_t)) (ui32RomAddr);
758  ui32ErrorReturn = FuncPointer(ui32Address);
759 
760  //
761  // Enable standby in flash bank since ROM function migth have disabled it
762  //
764 
765  //
766  // Return status of operation.
767  //
768  return(ui32ErrorReturn);
769 }
#define FLASH_PWR_OFF_MODE
Definition: flash.h:126
__STATIC_INLINE uint32_t FlashSectorSizeGet(void)
Get size of a flash sector in number of bytes.
Definition: flash.h:260
#define CCFG_SIZE_SECT_PROT
Definition: flash.h:248
#define DUMPWORD_INSTR
Definition: flash.h:231
#define FBFALLBACK_DEEP_STDBY
Definition: flash.h:193
uint32_t(* FlashSectorErasePointer_t)(uint32_t)
Definition: flash.c:88
uint32_t FlashProtectionGet(uint32_t ui32SectorAddress)
Get sector protection.
Definition: flash.c:267
uint32_t(* FlashPrgPointer_t)(uint8_t *, uint32_t, uint32_t)
Definition: flash.c:86
void FlashPowerModeSet(uint32_t ui32PowerMode, uint32_t ui32BankGracePeriode, uint32_t ui32PumpGracePeriode)
Set power mode.
Definition: flash.c:103
void FlashDisableSectorsForWrite(void)
Disables all sectors for erase and programming on the active bank.
Definition: flash.c:520
#define FCFG1_OFFSET
Definition: flash.h:151
#define ASSERT(expr)
Definition: debug.h:65
#define FSM_REG_WRT_DISABLE
Definition: flash.h:185
uint32_t FlashPowerModeGet(void)
Get current configured power mode.
Definition: flash.c:194
__STATIC_INLINE uint32_t FlashSizeGet(void)
Get the size of the flash.
Definition: flash.h:284
#define FLASH_NO_PROTECT
Definition: flash.h:135
#define FAPI_STATUS_SUCCESS
Definition: flash.h:104
uint32_t MemBusWrkAroundHapiEraseSector(uint32_t ui32Address)
Definition: flash.c:747
#define FBFALLBACK_SLEEP
Definition: flash.h:192
uint32_t FlashSectorErase(uint32_t ui32SectorAddress)
Erase a flash sector.
Definition: flash.c:364
#define FSM_REG_WRT_ENABLE
Definition: flash.h:184
#define FBFALLBACK_ACTIVE
Definition: flash.h:194
bool FlashEfuseReadRow(uint32_t *pui32EfuseData, uint32_t ui32RowAddress)
Reads efuse data from specified row.
Definition: flash.c:435
uint32_t MemBusWrkAroundHapiProgramFlash(uint8_t *pui8DataBuffer, uint32_t ui32Address, uint32_t ui32Count)
Definition: flash.c:717
#define ROM_FLASHTABLE
Definition: rom.h:272
#define ROM_HAPI_TABLE_ADDR
Definition: rom.h:61
uint32_t FlashProtectionSave(uint32_t ui32SectorAddress)
Save sector protection to make it permanent.
Definition: flash.c:310
#define FLASH_PWR_ACTIVE_MODE
Definition: flash.h:125
#define FLASH_WRITE_PROTECT
Definition: flash.h:136
#define CCFG_OFFSET_SECT_PROT
Definition: flash.h:246
void FlashProtectionSet(uint32_t ui32SectorAddress, uint32_t ui32ProtectMode)
Set sector protection.
Definition: flash.c:227
#define FLASH_PWR_DEEP_STDBY_MODE
Definition: flash.h:127
uint32_t FlashProgram(uint8_t *pui8DataBuffer, uint32_t ui32Address, uint32_t ui32Count)
Programs unprotected main bank flash sectors.
Definition: flash.c:401
const uint8_t g_pui8CcfgDefaultSec[]
Definition: flash.c:79