47 #ifndef DRIVERLIB_GENERATE_ROM
48 #undef PRCMInfClockConfigureSet
49 #define PRCMInfClockConfigureSet NOROM_PRCMInfClockConfigureSet
50 #undef PRCMInfClockConfigureGet
51 #define PRCMInfClockConfigureGet NOROM_PRCMInfClockConfigureGet
52 #undef PRCMClockConfigureSet
53 #define PRCMClockConfigureSet NOROM_PRCMClockConfigureSet
54 #undef PRCMClockConfigureGet
55 #define PRCMClockConfigureGet NOROM_PRCMClockConfigureGet
56 #undef PRCMAudioClockConfigSet
57 #define PRCMAudioClockConfigSet NOROM_PRCMAudioClockConfigSet
58 #undef PRCMAudioClockConfigSetOverride
59 #define PRCMAudioClockConfigSetOverride NOROM_PRCMAudioClockConfigSetOverride
60 #undef PRCMPowerDomainOn
61 #define PRCMPowerDomainOn NOROM_PRCMPowerDomainOn
62 #undef PRCMPowerDomainOff
63 #define PRCMPowerDomainOff NOROM_PRCMPowerDomainOff
64 #undef PRCMPeripheralRunEnable
65 #define PRCMPeripheralRunEnable NOROM_PRCMPeripheralRunEnable
66 #undef PRCMPeripheralRunDisable
67 #define PRCMPeripheralRunDisable NOROM_PRCMPeripheralRunDisable
68 #undef PRCMPeripheralSleepEnable
69 #define PRCMPeripheralSleepEnable NOROM_PRCMPeripheralSleepEnable
70 #undef PRCMPeripheralSleepDisable
71 #define PRCMPeripheralSleepDisable NOROM_PRCMPeripheralSleepDisable
72 #undef PRCMPeripheralDeepSleepEnable
73 #define PRCMPeripheralDeepSleepEnable NOROM_PRCMPeripheralDeepSleepEnable
74 #undef PRCMPeripheralDeepSleepDisable
75 #define PRCMPeripheralDeepSleepDisable NOROM_PRCMPeripheralDeepSleepDisable
76 #undef PRCMPowerDomainStatus
77 #define PRCMPowerDomainStatus NOROM_PRCMPowerDomainStatus
79 #define PRCMDeepSleep NOROM_PRCMDeepSleep
80 #undef PRCMRetentionEnable
81 #define PRCMRetentionEnable NOROM_PRCMRetentionEnable
82 #undef PRCMRetentionDisable
83 #define PRCMRetentionDisable NOROM_PRCMRetentionDisable
96 static const uint32_t g_pui32RCGCRegs[] =
108 static const uint32_t g_pui32SCGCRegs[] =
120 static const uint32_t g_pui32DCGCRegs[] =
136 #define PRCM_PERIPH_INDEX(a) (((a) >> 8) & 0xf)
143 #define PRCM_PERIPH_MASKBIT(a) (0x00000001 << ((a) & 0xf))
154 uint32_t ui32Divisor;
215 uint32_t ui32Divisor;
246 if(ui32ClkDiv == 0x0)
250 else if(ui32ClkDiv == 0x1)
254 else if(ui32ClkDiv == 0x2)
258 else if(ui32ClkDiv == 0x3)
301 if(ui32Domains & PRCM_DOMAIN_SYSBUS)
306 if(ui32Domains & PRCM_DOMAIN_CPU)
311 if(ui32Domains & PRCM_DOMAIN_PERIPH)
316 if(ui32Domains & PRCM_DOMAIN_SERIAL)
321 if(ui32Domains & PRCM_DOMAIN_TIMER)
391 uint32_t ui32WordDiv;
414 switch(ui32SampleRate)
470 uint32_t ui32BitDiv, uint32_t ui32WordDiv)
528 if(ui32Domains & PRCM_DOMAIN_RFCORE)
534 if(ui32Domains & PRCM_DOMAIN_SERIAL)
539 if(ui32Domains & PRCM_DOMAIN_PERIPH)
544 if(ui32Domains & PRCM_DOMAIN_VIMS)
549 if(ui32Domains & PRCM_DOMAIN_CPU)
575 if(ui32Domains & PRCM_DOMAIN_RFCORE)
581 if(ui32Domains & PRCM_DOMAIN_SERIAL)
586 if(ui32Domains & PRCM_DOMAIN_PERIPH)
591 if(ui32Domains & PRCM_DOMAIN_VIMS)
596 if(ui32Domains & PRCM_DOMAIN_CPU)
613 ASSERT(PRCMPeripheralValid(ui32Peripheral));
633 ASSERT(PRCMPeripheralValid(ui32Peripheral));
653 ASSERT(PRCMPeripheralValid(ui32Peripheral));
673 ASSERT(PRCMPeripheralValid(ui32Peripheral));
693 ASSERT(PRCMPeripheralValid(ui32Peripheral));
713 ASSERT(PRCMPeripheralValid(ui32Peripheral));
731 uint32_t ui32StatusRegister0;
732 uint32_t ui32StatusRegister1;
780 HWREG(NVIC_SYS_CTRL) |= NVIC_SYS_CTRL_SLEEPDEEP;
790 HWREG(NVIC_SYS_CTRL) &= ~(NVIC_SYS_CTRL_SLEEPDEEP);
801 uint32_t ui32Retention;
866 uint32_t ui32Retention;
#define PRCM_CLOCK_DIV_64
__STATIC_INLINE void PRCMAudioClockDisable(void)
Disable the audio clock generation.
#define I2S_SAMPLE_RATE_48K
#define I2S_SAMPLE_RATE_16K
uint32_t PRCMClockConfigureGet(uint32_t ui32Domain)
Get the clock configuration for a specific sub system in the MCU Voltage Domain.
uint32_t PRCMInfClockConfigureGet(uint32_t ui32PowerMode)
Use this function to retreive the set infrastructure clock configuration.
#define I2S_SAMPLE_RATE_24K
#define PRCM_DEEP_SLEEP_MODE
uint32_t PRCMPowerDomainStatus(uint32_t ui32Domains)
Get the status for a specific power domain.
#define PRCM_CLOCK_DIV_256
#define PRCM_WCLK_SINGLE_PHASE
void PRCMPeripheralSleepEnable(uint32_t ui32Peripheral)
Enables a peripheral in sleep mode.
void PRCMPeripheralSleepDisable(uint32_t ui32Peripheral)
Disables a peripheral in sleep mode.
#define PRCM_DOMAIN_PERIPH
#define PRCM_PERIPH_MASKBIT(a)
#define I2S_SAMPLE_RATE_32K
void PRCMAudioClockConfigSetOverride(uint32_t ui32ClkConfig, uint32_t ui32MstDiv, uint32_t ui32BitDiv, uint32_t ui32WordDiv)
Configure the audio clock generation with manual setting of clock divider.
#define PRCM_CLOCK_DIV_32
#define PRCM_CLOCK_DIV_128
#define PRCM_DOMAIN_TIMER
#define PRCM_PERIPH_INDEX(a)
__STATIC_INLINE void CPUwfi(void)
Wait for interrupt.
#define PRCM_DOMAIN_SYSBUS
void PRCMRetentionEnable(uint32_t ui32PowerDomain)
Enable retention on specific power domains.
void PRCMDeepSleep(void)
Put the processor into deep-sleep mode.
void PRCMInfClockConfigureSet(uint32_t ui32ClkDiv, uint32_t ui32PowerMode)
Configure the infrastructure clock.
#define PRCM_DOMAIN_POWER_ON
void PRCMPowerDomainOn(uint32_t ui32Domains)
Turn power on in power domains in the MCU domain.
#define PRCM_DOMAIN_SERIAL
#define PRCM_DOMAIN_RFCORE
void PRCMRetentionDisable(uint32_t ui32PowerDomain)
Disable retention on power domains.
void PRCMPeripheralRunDisable(uint32_t ui32Peripheral)
Disables a peripheral in Run mode.
void PRCMClockConfigureSet(uint32_t ui32Domains, uint32_t ui32ClkDiv)
Setup the clock division factor for a subsystem in the MCU voltage domain.
void PRCMPeripheralRunEnable(uint32_t ui32Peripheral)
Enables a peripheral in Run mode.
void PRCMPeripheralDeepSleepEnable(uint32_t ui32Peripheral)
Enables a peripheral in deep-sleep mode.
void PRCMPowerDomainOff(uint32_t ui32Domains)
Turn off a specific power domain.
void PRCMPeripheralDeepSleepDisable(uint32_t ui32Peripheral)
Disables a peripheral in deep-sleep mode.
void PRCMAudioClockConfigSet(uint32_t ui32ClkConfig, uint32_t ui32SampleRate)
Configure the audio clock generation.
#define PRCM_CLOCK_DIV_16
#define PRCM_DOMAIN_POWER_OFF