Instance: CPU_FPB
Component: CPU_FPB
Base address: 0xe0002000
Cortex-M's Flash Patch and Breakpoint (FPB)
Register Name |
Type |
Register Width (Bits) |
Register Reset |
Address Offset |
Physical Address |
RW |
32 |
0x0000 0260 |
0x0000 0000 |
0xE000 2000 |
|
RW |
32 |
0x2000 0000 |
0x0000 0004 |
0xE000 2004 |
|
RW |
32 |
0x0000 0000 |
0x0000 0008 |
0xE000 2008 |
|
RW |
32 |
0x0000 0000 |
0x0000 000C |
0xE000 200C |
|
RW |
32 |
0x0000 0000 |
0x0000 0010 |
0xE000 2010 |
|
RW |
32 |
0x0000 0000 |
0x0000 0014 |
0xE000 2014 |
|
RW |
32 |
0x0000 0000 |
0x0000 0018 |
0xE000 2018 |
|
RW |
32 |
0x0000 0000 |
0x0000 001C |
0xE000 201C |
|
RW |
32 |
0x0000 0000 |
0x0000 0020 |
0xE000 2020 |
|
RW |
32 |
0x0000 0000 |
0x0000 0024 |
0xE000 2024 |
Address offset |
0x0000 0000 |
||
Physical address |
0xE000 2000 |
Instance |
CPU_FPB |
Description |
Flash Patch Control Register |
||
Type |
RW |
Bits |
Field Name |
Description |
Type |
Reset |
||
31:14 |
RESERVED14 |
Software should not rely on the value of a reserved. Writing any other value than the reset value may result in undefined behavior. |
RO |
0x0 0000 |
||
13:12 |
NUM_CODE2 |
Number of full banks of code comparators, sixteen comparators per bank. Where less than sixteen code comparators are provided, the bank count is zero, and the number present indicated by NUM_CODE1. This read only field contains 3'b000 to indicate 0 banks for Cortex-M processor. |
RO |
0x0 |
||
11:8 |
NUM_LIT |
Number of literal slots field. |
RO |
0x2 |
||
7:4 |
NUM_CODE1 |
Number of code slots field. |
RO |
0x6 |
||
3:2 |
RESERVED2 |
Software should not rely on the value of a reserved. Writing any other value than the reset value may result in undefined behavior. |
RO |
0x0 |
||
1 |
KEY |
Key field. In order to write to this register, this bit-field must be written to '1'. This bit always reads 0. |
WO |
0 |
||
0 |
ENABLE |
Flash patch unit enable bit |
RW |
0 |
Address offset |
0x0000 0004 |
||
Physical address |
0xE000 2004 |
Instance |
CPU_FPB |
Description |
Flash Patch Remap Register |
||
Type |
RW |
Bits |
Field Name |
Description |
Type |
Reset |
||
31:29 |
RESERVED29 |
This field always reads 3'b001. Writing to this field is ignored. |
RO |
0x1 |
||
28:5 |
REMAP |
Remap base address field. |
RW |
0x00 0000 |
||
4:0 |
RESERVED0 |
This field always reads 0. Writing to this field is ignored. |
RO |
0x00 |
Address offset |
0x0000 0008 |
||
Physical address |
0xE000 2008 |
Instance |
CPU_FPB |
Description |
Flash Patch Comparator Register 0 |
||
Type |
RW |
Bits |
Field Name |
Description |
Type |
Reset |
||
31:30 |
REPLACE |
This selects what happens when the COMP address is matched. Address remapping only takes place for the 0x0 setting. |
RW |
0x0 |
||
29 |
RESERVED29 |
Software should not rely on the value of a reserved. Writing any other value than the reset value may result in undefined behavior. |
RW |
0 |
||
28:2 |
COMP |
Comparison address. |
RW |
0x000 0000 |
||
1 |
RESERVED1 |
Software should not rely on the value of a reserved. Writing any other value than the reset value may result in undefined behavior. |
RW |
0 |
||
0 |
ENABLE |
Compare and remap enable comparator 0. CTRL.ENABLE must also be set to enable comparisons. |
RW |
0 |
Address offset |
0x0000 000C |
||
Physical address |
0xE000 200C |
Instance |
CPU_FPB |
Description |
Flash Patch Comparator Register 1 |
||
Type |
RW |
Bits |
Field Name |
Description |
Type |
Reset |
||
31:30 |
REPLACE |
This selects what happens when the COMP address is matched. Address remapping only takes place for the 0x0 setting. |
RW |
0x0 |
||
29 |
RESERVED29 |
Software should not rely on the value of a reserved. Writing any other value than the reset value may result in undefined behavior. |
RW |
0 |
||
28:2 |
COMP |
Comparison address. |
RW |
0x000 0000 |
||
1 |
RESERVED1 |
Software should not rely on the value of a reserved. Writing any other value than the reset value may result in undefined behavior. |
RW |
0 |
||
0 |
ENABLE |
Compare and remap enable comparator 1. CTRL.ENABLE must also be set to enable comparisons. |
RW |
0 |
Address offset |
0x0000 0010 |
||
Physical address |
0xE000 2010 |
Instance |
CPU_FPB |
Description |
Flash Patch Comparator Register 2 |
||
Type |
RW |
Bits |
Field Name |
Description |
Type |
Reset |
||
31:30 |
REPLACE |
This selects what happens when the COMP address is matched. Address remapping only takes place for the 0x0 setting. |
RW |
0x0 |
||
29 |
RESERVED29 |
Software should not rely on the value of a reserved. Writing any other value than the reset value may result in undefined behavior. |
RW |
0 |
||
28:2 |
COMP |
Comparison address. |
RW |
0x000 0000 |
||
1 |
RESERVED1 |
Software should not rely on the value of a reserved. Writing any other value than the reset value may result in undefined behavior. |
RW |
0 |
||
0 |
ENABLE |
Compare and remap enable comparator 2. CTRL.ENABLE must also be set to enable comparisons. |
RW |
0 |
Address offset |
0x0000 0014 |
||
Physical address |
0xE000 2014 |
Instance |
CPU_FPB |
Description |
Flash Patch Comparator Register 3 |
||
Type |
RW |
Bits |
Field Name |
Description |
Type |
Reset |
||
31:30 |
REPLACE |
This selects what happens when the COMP address is matched. Address remapping only takes place for the 0x0 setting. |
RW |
0x0 |
||
29 |
RESERVED29 |
Software should not rely on the value of a reserved. Writing any other value than the reset value may result in undefined behavior. |
RW |
0 |
||
28:2 |
COMP |
Comparison address. |
RW |
0x000 0000 |
||
1 |
RESERVED1 |
Software should not rely on the value of a reserved. Writing any other value than the reset value may result in undefined behavior. |
RW |
0 |
||
0 |
ENABLE |
Compare and remap enable comparator 3. CTRL.ENABLE must also be set to enable comparisons. |
RW |
0 |
Address offset |
0x0000 0018 |
||
Physical address |
0xE000 2018 |
Instance |
CPU_FPB |
Description |
Flash Patch Comparator Register 4 |
||
Type |
RW |
Bits |
Field Name |
Description |
Type |
Reset |
||
31:30 |
REPLACE |
This selects what happens when the COMP address is matched. Address remapping only takes place for the 0x0 setting. |
RW |
0x0 |
||
29 |
RESERVED29 |
Software should not rely on the value of a reserved. Writing any other value than the reset value may result in undefined behavior. |
RW |
0 |
||
28:2 |
COMP |
Comparison address. |
RW |
0x000 0000 |
||
1 |
RESERVED1 |
Software should not rely on the value of a reserved. Writing any other value than the reset value may result in undefined behavior. |
RW |
0 |
||
0 |
ENABLE |
Compare and remap enable comparator 4. CTRL.ENABLE must also be set to enable comparisons. |
RW |
0 |
Address offset |
0x0000 001C |
||
Physical address |
0xE000 201C |
Instance |
CPU_FPB |
Description |
Flash Patch Comparator Register 5 |
||
Type |
RW |
Bits |
Field Name |
Description |
Type |
Reset |
||
31:30 |
REPLACE |
This selects what happens when the COMP address is matched. Address remapping only takes place for the 0x0 setting. |
RW |
0x0 |
||
29 |
RESERVED29 |
Software should not rely on the value of a reserved. Writing any other value than the reset value may result in undefined behavior. |
RW |
0 |
||
28:2 |
COMP |
Comparison address. |
RW |
0x000 0000 |
||
1 |
RESERVED1 |
Software should not rely on the value of a reserved. Writing any other value than the reset value may result in undefined behavior. |
RW |
0 |
||
0 |
ENABLE |
Compare and remap enable comparator 5. CTRL.ENABLE must also be set to enable comparisons. |
RW |
0 |
Address offset |
0x0000 0020 |
||
Physical address |
0xE000 2020 |
Instance |
CPU_FPB |
Description |
Flash Patch Comparator Register 6 |
||
Type |
RW |
Bits |
Field Name |
Description |
Type |
Reset |
||
31:30 |
REPLACE |
This selects what happens when the COMP address is matched. Comparator 6 is a literal comparator and the only supported setting is 0x0. Other settings will be ignored. |
RW |
0x0 |
||
29 |
RESERVED29 |
Software should not rely on the value of a reserved. Writing any other value than the reset value may result in undefined behavior. |
RW |
0 |
||
28:2 |
COMP |
Comparison address. |
RW |
0x000 0000 |
||
1 |
RESERVED1 |
Software should not rely on the value of a reserved. Writing any other value than the reset value may result in undefined behavior. |
RW |
0 |
||
0 |
ENABLE |
Compare and remap enable comparator 6. CTRL.ENABLE must also be set to enable comparisons. |
RW |
0 |
Address offset |
0x0000 0024 |
||
Physical address |
0xE000 2024 |
Instance |
CPU_FPB |
Description |
Flash Patch Comparator Register 7 |
||
Type |
RW |
Bits |
Field Name |
Description |
Type |
Reset |
||
31:30 |
REPLACE |
This selects what happens when the COMP address is matched. Comparator 7 is a literal comparator and the only supported setting is 0x0. Other settings will be ignored. |
RW |
0x0 |
||
29 |
RESERVED29 |
Software should not rely on the value of a reserved. Writing any other value than the reset value may result in undefined behavior. |
RW |
0 |
||
28:2 |
COMP |
Comparison address. |
RW |
0x000 0000 |
||
1 |
RESERVED1 |
Software should not rely on the value of a reserved. Writing any other value than the reset value may result in undefined behavior. |
RW |
0 |
||
0 |
ENABLE |
Compare and remap enable comparator 7. CTRL.ENABLE must also be set to enable comparisons. |
RW |
0 |
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