Instance: AON_IOC
Component: AON_IOC
Base address: 0x40094000
Always On (AON) IO Controller - controls IO operation when the MCU IO Controller (IOC) is powered off and resides in the AON domain.
Note: This module only supports 32 bit Read/Write access from MCU.
Register Name |
Type |
Register Width (Bits) |
Register Reset |
Address Offset |
Physical Address |
RW |
32 |
0x0000 0003 |
0x0000 0000 |
0x4009 4000 |
|
RW |
32 |
0x0000 0006 |
0x0000 0004 |
0x4009 4004 |
|
RW |
32 |
0x0000 0005 |
0x0000 0008 |
0x4009 4008 |
|
RW |
32 |
0x0000 0001 |
0x0000 000C |
0x4009 400C |
|
RW |
32 |
0x0000 0001 |
0x0000 0010 |
0x4009 4010 |
Address offset |
0x0000 0000 |
||
Physical address |
0x4009 4000 |
Instance |
AON_IOC |
Description |
Internal Register. Customers can control this through TI provided API |
||
Type |
RW |
Bits |
Field Name |
Description |
Type |
Reset |
||
31:3 |
Reserved |
Software should not rely on the value of a reserved. Writing any other value than the reset value may result in undefined behavior.(RO std text) |
RO |
0x0000 0000 |
||
2:0 |
GRAY_CODE |
Internal |
RW |
0x3 |
Address offset |
0x0000 0004 |
||
Physical address |
0x4009 4004 |
Instance |
AON_IOC |
Description |
Internal Register. Customers can control this through TI provided API |
||
Type |
RW |
Bits |
Field Name |
Description |
Type |
Reset |
||
31:3 |
Reserved |
Software should not rely on the value of a reserved. Writing any other value than the reset value may result in undefined behavior.(RO std text) |
RO |
0x0000 0000 |
||
2:0 |
GRAY_CODE |
Internal |
RW |
0x6 |
Address offset |
0x0000 0008 |
||
Physical address |
0x4009 4008 |
Instance |
AON_IOC |
Description |
Internal Register. Customers can control this through TI provided API |
||
Type |
RW |
Bits |
Field Name |
Description |
Type |
Reset |
||
31:3 |
Reserved |
Software should not rely on the value of a reserved. Writing any other value than the reset value may result in undefined behavior.(RO std text) |
RO |
0x0000 0000 |
||
2:0 |
GRAY_CODE |
Internal |
RW |
0x5 |
Address offset |
0x0000 000C |
||
Physical address |
0x4009 400C |
Instance |
AON_IOC |
Description |
IO Latch Control |
||
Type |
RW |
Bits |
Field Name |
Description |
Type |
Reset |
|||||||||||||
31:1 |
Reserved |
Software should not rely on the value of a reserved. Writing any other value than the reset value may result in undefined behavior.(RO std text) |
RO |
0x0000 0000 |
|||||||||||||
0 |
EN |
Controls latches between MCU IOC and AON_IOC.
|
RW |
1 |
Address offset |
0x0000 0010 |
||
Physical address |
0x4009 4010 |
Instance |
AON_IOC |
Description |
SCLK_LF External Output Control |
||
Type |
RW |
Bits |
Field Name |
Description |
Type |
Reset |
||
31:1 |
Reserved |
Software should not rely on the value of a reserved. Writing any other value than the reset value may result in undefined behavior.(RO std text) |
RO |
0x0000 0000 |
||
0 |
OE_N |
0: Output enable active. SCLK_LF output on IO pin that has PORT_ID (e.g. IOC:IOCFG0.PORT_ID) set to AON_CLK32K. |
RW |
1 |
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