Instance: GPIO
Component: GPIO
Base address: 0x40022000
MCU GPIO - I/F for controlling and reading IO status and IO event status
Register Name |
Type |
Register Width (Bits) |
Register Reset |
Address Offset |
Physical Address |
RW |
32 |
0x0000 0000 |
0x0000 0000 |
0x4002 2000 |
|
RW |
32 |
0x0000 0000 |
0x0000 0004 |
0x4002 2004 |
|
RW |
32 |
0x0000 0000 |
0x0000 0008 |
0x4002 2008 |
|
RW |
32 |
0x0000 0000 |
0x0000 000C |
0x4002 200C |
|
RW |
32 |
0x0000 0000 |
0x0000 0010 |
0x4002 2010 |
|
RW |
32 |
0x0000 0000 |
0x0000 0014 |
0x4002 2014 |
|
RW |
32 |
0x0000 0000 |
0x0000 0018 |
0x4002 2018 |
|
RW |
32 |
0x0000 0000 |
0x0000 001C |
0x4002 201C |
|
RW |
32 |
0x0000 0000 |
0x0000 0080 |
0x4002 2080 |
|
WO |
32 |
0x0000 0000 |
0x0000 0090 |
0x4002 2090 |
|
WO |
32 |
0x0000 0000 |
0x0000 00A0 |
0x4002 20A0 |
|
RW |
32 |
0x0000 0000 |
0x0000 00B0 |
0x4002 20B0 |
|
RO |
32 |
0x0000 0000 |
0x0000 00C0 |
0x4002 20C0 |
|
RW |
32 |
0x0000 0000 |
0x0000 00D0 |
0x4002 20D0 |
|
RW |
32 |
0x0000 0000 |
0x0000 00E0 |
0x4002 20E0 |
Address offset |
0x0000 0000 |
||
Physical address |
0x4002 2000 |
Instance |
GPIO |
Description |
Data Out 0 to 3 |
||
Type |
RW |
Bits |
Field Name |
Description |
Type |
Reset |
||
31:25 |
Reserved |
Software should not rely on the value of a reserved. Writing any other value than the reset value may result in undefined behavior.(RO std text) |
RO |
0x00 |
||
24 |
DIO3 |
Sets the state of the pin that is configured as DIO#3, if the corresponding DOE31_0 bitfield is set. |
WO |
0 |
||
23:17 |
Reserved |
Software should not rely on the value of a reserved. Writing any other value than the reset value may result in undefined behavior.(RO std text) |
RO |
0x00 |
||
16 |
DIO2 |
Sets the state of the pin that is configured as DIO#2, if the corresponding DOE31_0 bitfield is set. |
WO |
0 |
||
15:9 |
Reserved |
Software should not rely on the value of a reserved. Writing any other value than the reset value may result in undefined behavior.(RO std text) |
RO |
0x00 |
||
8 |
DIO1 |
Sets the state of the pin that is configured as DIO#1, if the corresponding DOE31_0 bitfield is set. |
WO |
0 |
||
7:1 |
Reserved |
Software should not rely on the value of a reserved. Writing any other value than the reset value may result in undefined behavior.(RO std text) |
RO |
0x00 |
||
0 |
DIO0 |
Sets the state of the pin that is configured as DIO#0, if the corresponding DOE31_0 bitfield is set. |
WO |
0 |
Address offset |
0x0000 0004 |
||
Physical address |
0x4002 2004 |
Instance |
GPIO |
Description |
Data Out 4 to 7 |
||
Type |
RW |
Bits |
Field Name |
Description |
Type |
Reset |
||
31:25 |
Reserved |
Software should not rely on the value of a reserved. Writing any other value than the reset value may result in undefined behavior.(RO std text) |
RO |
0x00 |
||
24 |
DIO7 |
Sets the state of the pin that is configured as DIO#7, if the corresponding DOE31_0 bitfield is set. |
WO |
0 |
||
23:17 |
Reserved |
Software should not rely on the value of a reserved. Writing any other value than the reset value may result in undefined behavior.(RO std text) |
RO |
0x00 |
||
16 |
DIO6 |
Sets the state of the pin that is configured as DIO#6, if the corresponding DOE31_0 bitfield is set. |
WO |
0 |
||
15:9 |
Reserved |
Software should not rely on the value of a reserved. Writing any other value than the reset value may result in undefined behavior.(RO std text) |
RO |
0x00 |
||
8 |
DIO5 |
Sets the state of the pin that is configured as DIO#5, if the corresponding DOE31_0 bitfield is set. |
WO |
0 |
||
7:1 |
Reserved |
Software should not rely on the value of a reserved. Writing any other value than the reset value may result in undefined behavior.(RO std text) |
RO |
0x00 |
||
0 |
DIO4 |
Sets the state of the pin that is configured as DIO#4, if the corresponding DOE31_0 bitfield is set. |
WO |
0 |
Address offset |
0x0000 0008 |
||
Physical address |
0x4002 2008 |
Instance |
GPIO |
Description |
Data Out 8 to 11 |
||
Type |
RW |
Bits |
Field Name |
Description |
Type |
Reset |
||
31:25 |
Reserved |
Software should not rely on the value of a reserved. Writing any other value than the reset value may result in undefined behavior.(RO std text) |
RO |
0x00 |
||
24 |
DIO11 |
Sets the state of the pin that is configured as DIO#11, if the corresponding DOE31_0 bitfield is set. |
WO |
0 |
||
23:17 |
Reserved |
Software should not rely on the value of a reserved. Writing any other value than the reset value may result in undefined behavior.(RO std text) |
RO |
0x00 |
||
16 |
DIO10 |
Sets the state of the pin that is configured as DIO#10, if the corresponding DOE31_0 bitfield is set. |
WO |
0 |
||
15:9 |
Reserved |
Software should not rely on the value of a reserved. Writing any other value than the reset value may result in undefined behavior.(RO std text) |
RO |
0x00 |
||
8 |
DIO9 |
Sets the state of the pin that is configured as DIO#9, if the corresponding DOE31_0 bitfield is set. |
WO |
0 |
||
7:1 |
Reserved |
Software should not rely on the value of a reserved. Writing any other value than the reset value may result in undefined behavior.(RO std text) |
RO |
0x00 |
||
0 |
DIO8 |
Sets the state of the pin that is configured as DIO#8, if the corresponding DOE31_0 bitfield is set. |
WO |
0 |
Address offset |
0x0000 000C |
||
Physical address |
0x4002 200C |
Instance |
GPIO |
Description |
Data Out 12 to 15 |
||
Type |
RW |
Bits |
Field Name |
Description |
Type |
Reset |
||
31:25 |
Reserved |
Software should not rely on the value of a reserved. Writing any other value than the reset value may result in undefined behavior.(RO std text) |
RO |
0x00 |
||
24 |
DIO15 |
Sets the state of the pin that is configured as DIO#15, if the corresponding DOE31_0 bitfield is set. |
WO |
0 |
||
23:17 |
Reserved |
Software should not rely on the value of a reserved. Writing any other value than the reset value may result in undefined behavior.(RO std text) |
RO |
0x00 |
||
16 |
DIO14 |
Sets the state of the pin that is configured as DIO#14, if the corresponding DOE31_0 bitfield is set. |
WO |
0 |
||
15:9 |
Reserved |
Software should not rely on the value of a reserved. Writing any other value than the reset value may result in undefined behavior.(RO std text) |
RO |
0x00 |
||
8 |
DIO13 |
Sets the state of the pin that is configured as DIO#13, if the corresponding DOE31_0 bitfield is set. |
WO |
0 |
||
7:1 |
Reserved |
Software should not rely on the value of a reserved. Writing any other value than the reset value may result in undefined behavior.(RO std text) |
RO |
0x00 |
||
0 |
DIO12 |
Sets the state of the pin that is configured as DIO#12, if the corresponding DOE31_0 bitfield is set. |
WO |
0 |
Address offset |
0x0000 0010 |
||
Physical address |
0x4002 2010 |
Instance |
GPIO |
Description |
Data Out 16 to 19 |
||
Type |
RW |
Bits |
Field Name |
Description |
Type |
Reset |
||
31:25 |
Reserved |
Software should not rely on the value of a reserved. Writing any other value than the reset value may result in undefined behavior.(RO std text) |
RO |
0x00 |
||
24 |
DIO19 |
Sets the state of the pin that is configured as DIO#19, if the corresponding DOE31_0 bitfield is set. |
WO |
0 |
||
23:17 |
Reserved |
Software should not rely on the value of a reserved. Writing any other value than the reset value may result in undefined behavior.(RO std text) |
RO |
0x00 |
||
16 |
DIO18 |
Sets the state of the pin that is configured as DIO#18, if the corresponding DOE31_0 bitfield is set. |
WO |
0 |
||
15:9 |
Reserved |
Software should not rely on the value of a reserved. Writing any other value than the reset value may result in undefined behavior.(RO std text) |
RO |
0x00 |
||
8 |
DIO17 |
Sets the state of the pin that is configured as DIO#17, if the corresponding DOE31_0 bitfield is set. |
WO |
0 |
||
7:1 |
Reserved |
Software should not rely on the value of a reserved. Writing any other value than the reset value may result in undefined behavior.(RO std text) |
RO |
0x00 |
||
0 |
DIO16 |
Sets the state of the pin that is configured as DIO#16, if the corresponding DOE31_0 bitfield is set. |
WO |
0 |
Address offset |
0x0000 0014 |
||
Physical address |
0x4002 2014 |
Instance |
GPIO |
Description |
Data Out 20 to 23 |
||
Type |
RW |
Bits |
Field Name |
Description |
Type |
Reset |
||
31:25 |
Reserved |
Software should not rely on the value of a reserved. Writing any other value than the reset value may result in undefined behavior.(RO std text) |
RO |
0x00 |
||
24 |
DIO23 |
Sets the state of the pin that is configured as DIO#23, if the corresponding DOE31_0 bitfield is set. |
WO |
0 |
||
23:17 |
Reserved |
Software should not rely on the value of a reserved. Writing any other value than the reset value may result in undefined behavior.(RO std text) |
RO |
0x00 |
||
16 |
DIO22 |
Sets the state of the pin that is configured as DIO#22, if the corresponding DOE31_0 bitfield is set. |
WO |
0 |
||
15:9 |
Reserved |
Software should not rely on the value of a reserved. Writing any other value than the reset value may result in undefined behavior.(RO std text) |
RO |
0x00 |
||
8 |
DIO21 |
Sets the state of the pin that is configured as DIO#21, if the corresponding DOE31_0 bitfield is set. |
WO |
0 |
||
7:1 |
Reserved |
Software should not rely on the value of a reserved. Writing any other value than the reset value may result in undefined behavior.(RO std text) |
RO |
0x00 |
||
0 |
DIO20 |
Sets the state of the pin that is configured as DIO#20, if the corresponding DOE31_0 bitfield is set. |
WO |
0 |
Address offset |
0x0000 0018 |
||
Physical address |
0x4002 2018 |
Instance |
GPIO |
Description |
Data Out 24 to 27 |
||
Type |
RW |
Bits |
Field Name |
Description |
Type |
Reset |
||
31:25 |
Reserved |
Software should not rely on the value of a reserved. Writing any other value than the reset value may result in undefined behavior.(RO std text) |
RO |
0x00 |
||
24 |
DIO27 |
Sets the state of the pin that is configured as DIO#27, if the corresponding DOE31_0 bitfield is set. |
WO |
0 |
||
23:17 |
Reserved |
Software should not rely on the value of a reserved. Writing any other value than the reset value may result in undefined behavior.(RO std text) |
RO |
0x00 |
||
16 |
DIO26 |
Sets the state of the pin that is configured as DIO#26, if the corresponding DOE31_0 bitfield is set. |
WO |
0 |
||
15:9 |
Reserved |
Software should not rely on the value of a reserved. Writing any other value than the reset value may result in undefined behavior.(RO std text) |
RO |
0x00 |
||
8 |
DIO25 |
Sets the state of the pin that is configured as DIO#25, if the corresponding DOE31_0 bitfield is set. |
WO |
0 |
||
7:1 |
Reserved |
Software should not rely on the value of a reserved. Writing any other value than the reset value may result in undefined behavior.(RO std text) |
RO |
0x00 |
||
0 |
DIO24 |
Sets the state of the pin that is configured as DIO#24, if the corresponding DOE31_0 bitfield is set. |
WO |
0 |
Address offset |
0x0000 001C |
||
Physical address |
0x4002 201C |
Instance |
GPIO |
Description |
Data Out 28 to 31 |
||
Type |
RW |
Bits |
Field Name |
Description |
Type |
Reset |
||
31:25 |
Reserved |
Software should not rely on the value of a reserved. Writing any other value than the reset value may result in undefined behavior.(RO std text) |
RO |
0x00 |
||
24 |
DIO31 |
Sets the state of the pin that is configured as DIO#31, if the corresponding DOE31_0 bitfield is set. |
WO |
0 |
||
23:17 |
Reserved |
Software should not rely on the value of a reserved. Writing any other value than the reset value may result in undefined behavior.(RO std text) |
RO |
0x00 |
||
16 |
DIO30 |
Sets the state of the pin that is configured as DIO#30, if the corresponding DOE31_0 bitfield is set. |
WO |
0 |
||
15:9 |
Reserved |
Software should not rely on the value of a reserved. Writing any other value than the reset value may result in undefined behavior.(RO std text) |
RO |
0x00 |
||
8 |
DIO29 |
Sets the state of the pin that is configured as DIO#29, if the corresponding DOE31_0 bitfield is set. |
WO |
0 |
||
7:1 |
Reserved |
Software should not rely on the value of a reserved. Writing any other value than the reset value may result in undefined behavior.(RO std text) |
RO |
0x00 |
||
0 |
DIO28 |
Sets the state of the pin that is configured as DIO#28, if the corresponding DOE31_0 bitfield is set. |
WO |
0 |
Address offset |
0x0000 0080 |
||
Physical address |
0x4002 2080 |
Instance |
GPIO |
Description |
Data Output for DIO 0 to 31 |
||
Type |
RW |
Bits |
Field Name |
Description |
Type |
Reset |
||
31 |
DIO31 |
Data output for DIO 31 |
RW |
0 |
||
30 |
DIO30 |
Data output for DIO 30 |
RW |
0 |
||
29 |
DIO29 |
Data output for DIO 29 |
RW |
0 |
||
28 |
DIO28 |
Data output for DIO 28 |
RW |
0 |
||
27 |
DIO27 |
Data output for DIO 27 |
RW |
0 |
||
26 |
DIO26 |
Data output for DIO 26 |
RW |
0 |
||
25 |
DIO25 |
Data output for DIO 25 |
RW |
0 |
||
24 |
DIO24 |
Data output for DIO 24 |
RW |
0 |
||
23 |
DIO23 |
Data output for DIO 23 |
RW |
0 |
||
22 |
DIO22 |
Data output for DIO 22 |
RW |
0 |
||
21 |
DIO21 |
Data output for DIO 21 |
RW |
0 |
||
20 |
DIO20 |
Data output for DIO 20 |
RW |
0 |
||
19 |
DIO19 |
Data output for DIO 19 |
RW |
0 |
||
18 |
DIO18 |
Data output for DIO 18 |
RW |
0 |
||
17 |
DIO17 |
Data output for DIO 17 |
RW |
0 |
||
16 |
DIO16 |
Data output for DIO 16 |
RW |
0 |
||
15 |
DIO15 |
Data output for DIO 15 |
RW |
0 |
||
14 |
DIO14 |
Data output for DIO 14 |
RW |
0 |
||
13 |
DIO13 |
Data output for DIO 13 |
RW |
0 |
||
12 |
DIO12 |
Data output for DIO 12 |
RW |
0 |
||
11 |
DIO11 |
Data output for DIO 11 |
RW |
0 |
||
10 |
DIO10 |
Data output for DIO 10 |
RW |
0 |
||
9 |
DIO9 |
Data output for DIO 9 |
RW |
0 |
||
8 |
DIO8 |
Data output for DIO 8 |
RW |
0 |
||
7 |
DIO7 |
Data output for DIO 7 |
RW |
0 |
||
6 |
DIO6 |
Data output for DIO 6 |
RW |
0 |
||
5 |
DIO5 |
Data output for DIO 5 |
RW |
0 |
||
4 |
DIO4 |
Data output for DIO 4 |
RW |
0 |
||
3 |
DIO3 |
Data output for DIO 3 |
RW |
0 |
||
2 |
DIO2 |
Data output for DIO 2 |
RW |
0 |
||
1 |
DIO1 |
Data output for DIO 1 |
RW |
0 |
||
0 |
DIO0 |
Data output for DIO 0 |
RW |
0 |
Address offset |
0x0000 0090 |
||
Physical address |
0x4002 2090 |
Instance |
GPIO |
Description |
Data Out Set |
||
Type |
WO |
Bits |
Field Name |
Description |
Type |
Reset |
||
31 |
DIO31 |
Set bit 31 |
WO |
0 |
||
30 |
DIO30 |
Set bit 30 |
WO |
0 |
||
29 |
DIO29 |
Set bit 29 |
WO |
0 |
||
28 |
DIO28 |
Set bit 28 |
WO |
0 |
||
27 |
DIO27 |
Set bit 27 |
WO |
0 |
||
26 |
DIO26 |
Set bit 26 |
WO |
0 |
||
25 |
DIO25 |
Set bit 25 |
WO |
0 |
||
24 |
DIO24 |
Set bit 24 |
WO |
0 |
||
23 |
DIO23 |
Set bit 23 |
WO |
0 |
||
22 |
DIO22 |
Set bit 22 |
WO |
0 |
||
21 |
DIO21 |
Set bit 21 |
WO |
0 |
||
20 |
DIO20 |
Set bit 20 |
WO |
0 |
||
19 |
DIO19 |
Set bit 19 |
WO |
0 |
||
18 |
DIO18 |
Set bit 18 |
WO |
0 |
||
17 |
DIO17 |
Set bit 17 |
WO |
0 |
||
16 |
DIO16 |
Set bit 16 |
WO |
0 |
||
15 |
DIO15 |
Set bit 15 |
WO |
0 |
||
14 |
DIO14 |
Set bit 14 |
WO |
0 |
||
13 |
DIO13 |
Set bit 13 |
WO |
0 |
||
12 |
DIO12 |
Set bit 12 |
WO |
0 |
||
11 |
DIO11 |
Set bit 11 |
WO |
0 |
||
10 |
DIO10 |
Set bit 10 |
WO |
0 |
||
9 |
DIO9 |
Set bit 9 |
WO |
0 |
||
8 |
DIO8 |
Set bit 8 |
WO |
0 |
||
7 |
DIO7 |
Set bit 7 |
WO |
0 |
||
6 |
DIO6 |
Set bit 6 |
WO |
0 |
||
5 |
DIO5 |
Set bit 5 |
WO |
0 |
||
4 |
DIO4 |
Set bit 4 |
WO |
0 |
||
3 |
DIO3 |
Set bit 3 |
WO |
0 |
||
2 |
DIO2 |
Set bit 2 |
WO |
0 |
||
1 |
DIO1 |
Set bit 1 |
WO |
0 |
||
0 |
DIO0 |
Set bit 0 |
WO |
0 |
Address offset |
0x0000 00A0 |
||
Physical address |
0x4002 20A0 |
Instance |
GPIO |
Description |
Data Out Clear |
||
Type |
WO |
Bits |
Field Name |
Description |
Type |
Reset |
||
31 |
DIO31 |
Clears bit 31 |
WO |
0 |
||
30 |
DIO30 |
Clears bit 30 |
WO |
0 |
||
29 |
DIO29 |
Clears bit 29 |
WO |
0 |
||
28 |
DIO28 |
Clears bit 28 |
WO |
0 |
||
27 |
DIO27 |
Clears bit 27 |
WO |
0 |
||
26 |
DIO26 |
Clears bit 26 |
WO |
0 |
||
25 |
DIO25 |
Clears bit 25 |
WO |
0 |
||
24 |
DIO24 |
Clears bit 24 |
WO |
0 |
||
23 |
DIO23 |
Clears bit 23 |
WO |
0 |
||
22 |
DIO22 |
Clears bit 22 |
WO |
0 |
||
21 |
DIO21 |
Clears bit 21 |
WO |
0 |
||
20 |
DIO20 |
Clears bit 20 |
WO |
0 |
||
19 |
DIO19 |
Clears bit 19 |
WO |
0 |
||
18 |
DIO18 |
Clears bit 18 |
WO |
0 |
||
17 |
DIO17 |
Clears bit 17 |
WO |
0 |
||
16 |
DIO16 |
Clears bit 16 |
WO |
0 |
||
15 |
DIO15 |
Clears bit 15 |
WO |
0 |
||
14 |
DIO14 |
Clears bit 14 |
WO |
0 |
||
13 |
DIO13 |
Clears bit 13 |
WO |
0 |
||
12 |
DIO12 |
Clears bit 12 |
WO |
0 |
||
11 |
DIO11 |
Clears bit 11 |
WO |
0 |
||
10 |
DIO10 |
Clears bit 10 |
WO |
0 |
||
9 |
DIO9 |
Clears bit 9 |
WO |
0 |
||
8 |
DIO8 |
Clears bit 8 |
WO |
0 |
||
7 |
DIO7 |
Clears bit 7 |
WO |
0 |
||
6 |
DIO6 |
Clears bit 6 |
WO |
0 |
||
5 |
DIO5 |
Clears bit 5 |
WO |
0 |
||
4 |
DIO4 |
Clears bit 4 |
WO |
0 |
||
3 |
DIO3 |
Clears bit 3 |
WO |
0 |
||
2 |
DIO2 |
Clears bit 2 |
WO |
0 |
||
1 |
DIO1 |
Clears bit 1 |
WO |
0 |
||
0 |
DIO0 |
Clears bit 0 |
WO |
0 |
Address offset |
0x0000 00B0 |
||
Physical address |
0x4002 20B0 |
Instance |
GPIO |
Description |
Data Out Toggle |
||
Type |
RW |
Bits |
Field Name |
Description |
Type |
Reset |
||
31 |
DIO31 |
Toggles bit 31 |
RW |
0 |
||
30 |
DIO30 |
Toggles bit 30 |
RW |
0 |
||
29 |
DIO29 |
Toggles bit 29 |
RW |
0 |
||
28 |
DIO28 |
Toggles bit 28 |
RW |
0 |
||
27 |
DIO27 |
Toggles bit 27 |
RW |
0 |
||
26 |
DIO26 |
Toggles bit 26 |
RW |
0 |
||
25 |
DIO25 |
Toggles bit 25 |
RW |
0 |
||
24 |
DIO24 |
Toggles bit 24 |
RW |
0 |
||
23 |
DIO23 |
Toggles bit 23 |
RW |
0 |
||
22 |
DIO22 |
Toggles bit 22 |
RW |
0 |
||
21 |
DIO21 |
Toggles bit 21 |
RW |
0 |
||
20 |
DIO20 |
Toggles bit 20 |
RW |
0 |
||
19 |
DIO19 |
Toggles bit 19 |
RW |
0 |
||
18 |
DIO18 |
Toggles bit 18 |
RW |
0 |
||
17 |
DIO17 |
Toggles bit 17 |
RW |
0 |
||
16 |
DIO16 |
Toggles bit 16 |
RW |
0 |
||
15 |
DIO15 |
Toggles bit 15 |
RW |
0 |
||
14 |
DIO14 |
Toggles bit 14 |
RW |
0 |
||
13 |
DIO13 |
Toggles bit 13 |
RW |
0 |
||
12 |
DIO12 |
Toggles bit 12 |
RW |
0 |
||
11 |
DIO11 |
Toggles bit 11 |
RW |
0 |
||
10 |
DIO10 |
Toggles bit 10 |
RW |
0 |
||
9 |
DIO9 |
Toggles bit 9 |
RW |
0 |
||
8 |
DIO8 |
Toggles bit 8 |
RW |
0 |
||
7 |
DIO7 |
Toggles bit 7 |
RW |
0 |
||
6 |
DIO6 |
Toggles bit 6 |
RW |
0 |
||
5 |
DIO5 |
Toggles bit 5 |
RW |
0 |
||
4 |
DIO4 |
Toggles bit 4 |
RW |
0 |
||
3 |
DIO3 |
Toggles bit 3 |
RW |
0 |
||
2 |
DIO2 |
Toggles bit 2 |
RW |
0 |
||
1 |
DIO1 |
Toggles bit 1 |
RW |
0 |
||
0 |
DIO0 |
Toggles bit 0 |
RW |
0 |
Address offset |
0x0000 00C0 |
||
Physical address |
0x4002 20C0 |
Instance |
GPIO |
Description |
Data Input from DIO 0 to 31 |
||
Type |
RO |
Bits |
Field Name |
Description |
Type |
Reset |
||
31 |
DIO31 |
Data input from DIO 31 |
RO |
0 |
||
30 |
DIO30 |
Data input from DIO 30 |
RO |
0 |
||
29 |
DIO29 |
Data input from DIO 29 |
RO |
0 |
||
28 |
DIO28 |
Data input from DIO 28 |
RO |
0 |
||
27 |
DIO27 |
Data input from DIO 27 |
RO |
0 |
||
26 |
DIO26 |
Data input from DIO 26 |
RO |
0 |
||
25 |
DIO25 |
Data input from DIO 25 |
RO |
0 |
||
24 |
DIO24 |
Data input from DIO 24 |
RO |
0 |
||
23 |
DIO23 |
Data input from DIO 23 |
RO |
0 |
||
22 |
DIO22 |
Data input from DIO 22 |
RO |
0 |
||
21 |
DIO21 |
Data input from DIO 21 |
RO |
0 |
||
20 |
DIO20 |
Data input from DIO 20 |
RO |
0 |
||
19 |
DIO19 |
Data input from DIO 19 |
RO |
0 |
||
18 |
DIO18 |
Data input from DIO 18 |
RO |
0 |
||
17 |
DIO17 |
Data input from DIO 17 |
RO |
0 |
||
16 |
DIO16 |
Data input from DIO 16 |
RO |
0 |
||
15 |
DIO15 |
Data input from DIO 15 |
RO |
0 |
||
14 |
DIO14 |
Data input from DIO 14 |
RO |
0 |
||
13 |
DIO13 |
Data input from DIO 13 |
RO |
0 |
||
12 |
DIO12 |
Data input from DIO 12 |
RO |
0 |
||
11 |
DIO11 |
Data input from DIO 11 |
RO |
0 |
||
10 |
DIO10 |
Data input from DIO 10 |
RO |
0 |
||
9 |
DIO9 |
Data input from DIO 9 |
RO |
0 |
||
8 |
DIO8 |
Data input from DIO 8 |
RO |
0 |
||
7 |
DIO7 |
Data input from DIO 7 |
RO |
0 |
||
6 |
DIO6 |
Data input from DIO 6 |
RO |
0 |
||
5 |
DIO5 |
Data input from DIO 5 |
RO |
0 |
||
4 |
DIO4 |
Data input from DIO 4 |
RO |
0 |
||
3 |
DIO3 |
Data input from DIO 3 |
RO |
0 |
||
2 |
DIO2 |
Data input from DIO 2 |
RO |
0 |
||
1 |
DIO1 |
Data input from DIO 1 |
RO |
0 |
||
0 |
DIO0 |
Data input from DIO 0 |
RO |
0 |
Address offset |
0x0000 00D0 |
||
Physical address |
0x4002 20D0 |
Instance |
GPIO |
Description |
Data Output Enable for DIO 0 to 31 |
||
Type |
RW |
Bits |
Field Name |
Description |
Type |
Reset |
||
31 |
DIO31 |
Data output enable for DIO 31 |
RW |
0 |
||
30 |
DIO30 |
Data output enable for DIO 30 |
RW |
0 |
||
29 |
DIO29 |
Data output enable for DIO 29 |
RW |
0 |
||
28 |
DIO28 |
Data output enable for DIO 28 |
RW |
0 |
||
27 |
DIO27 |
Data output enable for DIO 27 |
RW |
0 |
||
26 |
DIO26 |
Data output enable for DIO 26 |
RW |
0 |
||
25 |
DIO25 |
Data output enable for DIO 25 |
RW |
0 |
||
24 |
DIO24 |
Data output enable for DIO 24 |
RW |
0 |
||
23 |
DIO23 |
Data output enable for DIO 23 |
RW |
0 |
||
22 |
DIO22 |
Data output enable for DIO 22 |
RW |
0 |
||
21 |
DIO21 |
Data output enable for DIO 21 |
RW |
0 |
||
20 |
DIO20 |
Data output enable for DIO 20 |
RW |
0 |
||
19 |
DIO19 |
Data output enable for DIO 19 |
RW |
0 |
||
18 |
DIO18 |
Data output enable for DIO 18 |
RW |
0 |
||
17 |
DIO17 |
Data output enable for DIO 17 |
RW |
0 |
||
16 |
DIO16 |
Data output enable for DIO 16 |
RW |
0 |
||
15 |
DIO15 |
Data output enable for DIO 15 |
RW |
0 |
||
14 |
DIO14 |
Data output enable for DIO 14 |
RW |
0 |
||
13 |
DIO13 |
Data output enable for DIO 13 |
RW |
0 |
||
12 |
DIO12 |
Data output enable for DIO 12 |
RW |
0 |
||
11 |
DIO11 |
Data output enable for DIO 11 |
RW |
0 |
||
10 |
DIO10 |
Data output enable for DIO 10 |
RW |
0 |
||
9 |
DIO9 |
Data output enable for DIO 9 |
RW |
0 |
||
8 |
DIO8 |
Data output enable for DIO 8 |
RW |
0 |
||
7 |
DIO7 |
Data output enable for DIO 7 |
RW |
0 |
||
6 |
DIO6 |
Data output enable for DIO 6 |
RW |
0 |
||
5 |
DIO5 |
Data output enable for DIO 5 |
RW |
0 |
||
4 |
DIO4 |
Data output enable for DIO 4 |
RW |
0 |
||
3 |
DIO3 |
Data output enable for DIO 3 |
RW |
0 |
||
2 |
DIO2 |
Data output enable for DIO 2 |
RW |
0 |
||
1 |
DIO1 |
Data output enable for DIO 1 |
RW |
0 |
||
0 |
DIO0 |
Data output enable for DIO 0 |
RW |
0 |
Address offset |
0x0000 00E0 |
||
Physical address |
0x4002 20E0 |
Instance |
GPIO |
Description |
Event Register for DIO 0 to 31 |
||
Type |
RW |
Bits |
Field Name |
Description |
Type |
Reset |
||
31 |
DIO31 |
Event for DIO 31 |
RW |
0 |
||
30 |
DIO30 |
Event for DIO 30 |
RW |
0 |
||
29 |
DIO29 |
Event for DIO 29 |
RW |
0 |
||
28 |
DIO28 |
Event for DIO 28 |
RW |
0 |
||
27 |
DIO27 |
Event for DIO 27 |
RW |
0 |
||
26 |
DIO26 |
Event for DIO 26 |
RW |
0 |
||
25 |
DIO25 |
Event for DIO 25 |
RW |
0 |
||
24 |
DIO24 |
Event for DIO 24 |
RW |
0 |
||
23 |
DIO23 |
Event for DIO 23 |
RW |
0 |
||
22 |
DIO22 |
Event for DIO 22 |
RW |
0 |
||
21 |
DIO21 |
Event for DIO 21 |
RW |
0 |
||
20 |
DIO20 |
Event for DIO 20 |
RW |
0 |
||
19 |
DIO19 |
Event for DIO 19 |
RW |
0 |
||
18 |
DIO18 |
Event for DIO 18 |
RW |
0 |
||
17 |
DIO17 |
Event for DIO 17 |
RW |
0 |
||
16 |
DIO16 |
Event for DIO 16 |
RW |
0 |
||
15 |
DIO15 |
Event for DIO 15 |
RW |
0 |
||
14 |
DIO14 |
Event for DIO 14 |
RW |
0 |
||
13 |
DIO13 |
Event for DIO 13 |
RW |
0 |
||
12 |
DIO12 |
Event for DIO 12 |
RW |
0 |
||
11 |
DIO11 |
Event for DIO 11 |
RW |
0 |
||
10 |
DIO10 |
Event for DIO 10 |
RW |
0 |
||
9 |
DIO9 |
Event for DIO 9 |
RW |
0 |
||
8 |
DIO8 |
Event for DIO 8 |
RW |
0 |
||
7 |
DIO7 |
Event for DIO 7 |
RW |
0 |
||
6 |
DIO6 |
Event for DIO 6 |
RW |
0 |
||
5 |
DIO5 |
Event for DIO 5 |
RW |
0 |
||
4 |
DIO4 |
Event for DIO 4 |
RW |
0 |
||
3 |
DIO3 |
Event for DIO 3 |
RW |
0 |
||
2 |
DIO2 |
Event for DIO 2 |
RW |
0 |
||
1 |
DIO1 |
Event for DIO 1 |
RW |
0 |
||
0 |
DIO0 |
Event for DIO 0 |
RW |
0 |
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