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spis.c
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1 /******************************************************************************
2 * Filename: spis.c
3 * Revised: 2015-01-13 16:59:55 +0100 (ti, 13 jan 2015)
4 * Revision: 42365
5 *
6 * Description: Driver for the SPI Slave.
7 *
8 * Copyright (c) 2015, Texas Instruments Incorporated
9 * All rights reserved.
10 *
11 * Redistribution and use in source and binary forms, with or without
12 * modification, are permitted provided that the following conditions are met:
13 *
14 * 1) Redistributions of source code must retain the above copyright notice,
15 * this list of conditions and the following disclaimer.
16 *
17 * 2) Redistributions in binary form must reproduce the above copyright notice,
18 * this list of conditions and the following disclaimer in the documentation
19 * and/or other materials provided with the distribution.
20 *
21 * 3) Neither the name of the ORGANIZATION nor the names of its contributors may
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24 *
25 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
26 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
27 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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37 ******************************************************************************/
38 
39 #include <driverlib/spis.h>
40 
41 //*****************************************************************************
42 //
43 // Handle support for DriverLib in ROM:
44 // This section will undo prototype renaming made in the header file
45 //
46 //*****************************************************************************
47 #ifndef DRIVERLIB_GENERATE_ROM
48  #undef SPISDataPut
49  #define SPISDataPut NOROM_SPISDataPut
50  #undef SPISTxGetValue
51  #define SPISTxGetValue NOROM_SPISTxGetValue
52  #undef SPISDataGet
53  #define SPISDataGet NOROM_SPISDataGet
54  #undef SPISRxGetValue
55  #define SPISRxGetValue NOROM_SPISRxGetValue
56  #undef SPISIntStatus
57  #define SPISIntStatus NOROM_SPISIntStatus
58 #endif
59 
60 //*****************************************************************************
61 //
62 // This is the mapping between an TX Fifo index and the corresponding
63 // register.
64 //
65 //*****************************************************************************
66 static const uint32_t g_pui32SPISTxFifo[] =
67 {
68  SPIS_O_TXFMEM0, SPIS_O_TXFMEM1, SPIS_O_TXFMEM2, SPIS_O_TXFMEM3, SPIS_O_TXFMEM4,
69  SPIS_O_TXFMEM5, SPIS_O_TXFMEM6, SPIS_O_TXFMEM7, SPIS_O_TXFMEM8, SPIS_O_TXFMEM9,
70  SPIS_O_TXFMEM10, SPIS_O_TXFMEM11, SPIS_O_TXFMEM12, SPIS_O_TXFMEM13,
71  SPIS_O_TXFMEM14, SPIS_O_TXFMEM15
72 };
73 
74 //*****************************************************************************
75 //
76 // This is the mapping between an RX Fifo index and the corresponding
77 // register.
78 //
79 //*****************************************************************************
80 static const uint32_t g_pui32SPISRxFifo[] =
81 {
82  SPIS_O_RXFMEM0, SPIS_O_RXFMEM1, SPIS_O_RXFMEM2, SPIS_O_RXFMEM3, SPIS_O_RXFMEM4,
83  SPIS_O_RXFMEM5, SPIS_O_RXFMEM6, SPIS_O_RXFMEM7, SPIS_O_RXFMEM8, SPIS_O_RXFMEM9,
84  SPIS_O_RXFMEM10, SPIS_O_RXFMEM11, SPIS_O_RXFMEM12, SPIS_O_RXFMEM13,
85  SPIS_O_RXFMEM14, SPIS_O_RXFMEM15
86 };
87 
88 //*****************************************************************************
89 //
91 //
92 //*****************************************************************************
93 void
94 SPISDataPut(uint32_t ui32Data)
95 {
96  //
97  // Wait until there is space.
98  //
99  while(HWREG(SPIS_BASE + SPIS_O_TXSTAT) & SPIS_TXSTAT_FULL)
100  {
101  }
102 
103  //
104  // Write the data to the SPIS Tx Fifo.
105  //
106  HWREG(SPIS_BASE + SPIS_O_TXFPUSH) = ui32Data;
107 }
108 
109 //*****************************************************************************
110 //
112 //
113 //*****************************************************************************
114 uint32_t
115 SPISTxGetValue(uint32_t ui32Index)
116 {
117  uint32_t ui32Reg;
118 
119  //
120  // Check the arguments.
121  //
122  ASSERT(ui32Index < TX_FIFO_SIZE);
123 
124  //
125  // Find the correct register.
126  //
127  ui32Reg = g_pui32SPISTxFifo[ui32Index];
128 
129  //
130  // Return the value of the TX Fifo at the specified index.
131  //
132  return HWREG(SPIS_BASE + ui32Reg);
133 }
134 
135 //*****************************************************************************
136 //
138 //
139 //*****************************************************************************
140 void
141 SPISDataGet(uint32_t *pui32Data)
142 {
143  //
144  // Wait until there is data to be read.
145  //
146  while(!(HWREG(SPIS_BASE + SPIS_O_RXFSTAT) & SPIS_RXFSTAT_NOT_EMPTY))
147  {
148  }
149 
150  //
151  // Read data from SPIS Rx Fifo.
152  //
153  *pui32Data = HWREG(SPIS_BASE + SPIS_O_RXFPOP);
154 }
155 
156 //*****************************************************************************
157 //
159 //
160 //*****************************************************************************
161 uint32_t
162 SPISRxGetValue(uint32_t ui32Index)
163 {
164  uint32_t ui32Reg;
165 
166  //
167  // Check the arguments.
168  //
169  ASSERT(ui32Index < RX_FIFO_SIZE);
170 
171  //
172  // Find the correct register.
173  //
174  ui32Reg = g_pui32SPISRxFifo[ui32Index];
175 
176  //
177  // Return the value of the RX Fifo at the specified index.
178  //
179  return HWREG(SPIS_BASE + ui32Reg);
180 }
181 
182 //*****************************************************************************
183 //
195 //
196 //*****************************************************************************
197 uint32_t
198 SPISIntStatus(bool bMasked)
199 {
200  uint32_t ui32IntStatus, ui32Tmp;
201 
202  //
203  // Return either the interrupt status or the raw interrupt status as
204  // requested.
205  //
206  if(bMasked)
207  {
208  ui32Tmp = HWREG(SPIS_BASE + SPIS_O_TXFFLAGSCLRN);
209  ui32IntStatus = ui32Tmp & HWREG(SPIS_BASE + SPIS_O_TXFFLAGSMASK);
210  ui32Tmp = HWREG(SPIS_BASE + SPIS_O_RXFFLAGSCLRN);
211  ui32IntStatus |= (ui32Tmp & HWREG(SPIS_BASE + SPIS_O_RXFFLAGSMASK)) << 8;
212  ui32Tmp = HWREG(SPIS_BASE + SPIS_O_GPFLAGS);
213  ui32IntStatus |= (ui32Tmp & HWREG(SPIS_BASE + SPIS_O_GPFLAGSMASK)) << 16;
214  }
215  else
216  {
217  ui32IntStatus = HWREG(SPIS_BASE + SPIS_O_TXFFLAGSCLRN) & SPIS_TX_MASK;
218  ui32IntStatus |= (HWREG(SPIS_BASE + SPIS_O_RXFFLAGSCLRN) << 8) & SPIS_RX_MASK;
219  ui32IntStatus |= (HWREG(SPIS_BASE + SPIS_O_GPFLAGS) << 16) & SPIS_GP_MASK;
220  }
221  return ui32IntStatus;
222 }
uint32_t SPISIntStatus(bool bMasked)
Gets the current interrupt status.
Definition: spis.c:198
void SPISDataGet(uint32_t *pui32Data)
Gets a data element from the SPIS Rx FIFO.
Definition: spis.c:141
#define SPIS_TX_MASK
Definition: spis.h:128
#define ASSERT(expr)
Definition: debug.h:65
#define SPIS_RX_MASK
Definition: spis.h:136
#define SPIS_GP_MASK
Definition: spis.h:143
void SPISDataPut(uint32_t ui32Data)
Puts a data element into the SPIS transmit FIFO.
Definition: spis.c:94
#define TX_FIFO_SIZE
Definition: spis.h:97
uint32_t SPISTxGetValue(uint32_t ui32Index)
Get a specific value in the Tx Fifo.
Definition: spis.c:115
uint32_t SPISRxGetValue(uint32_t ui32Index)
Get a specific value in the Rx Fifo.
Definition: spis.c:162
#define RX_FIFO_SIZE
Definition: spis.h:98