62 #include <inc/hw_types.h>
63 #include <inc/hw_memmap.h>
64 #include <inc/hw_ints.h>
65 #include <inc/hw_aux_tdc.h>
83 #ifndef DRIVERLIB_GENERATE_ROM
84 #define AUXTDCConfigSet NOROM_AUXTDCConfigSet
85 #define AUXTDCMeasurementDone NOROM_AUXTDCMeasurementDone
93 #define AUX_TDC_BUSY 0x00000001
94 #define AUX_TDC_TIMEOUT 0x00000002
95 #define AUX_TDC_DONE 0x00000004
102 #define AUX_TDC_RUNSYNC 0x00000001
103 #define AUX_TDC_RUN 0x00000002
104 #define AUX_TDC_ABORT 0x00000003
111 #define AUXTDC_WAIT_START AUX_TDC_STAT_STATE_WAIT_START
112 #define AUXTDC_WAIT_START_CNTEN AUX_TDC_STAT_STATE_WAIT_START_STOP_CNT_EN
113 #define AUXTDC_IDLE AUX_TDC_STAT_STATE_IDLE
114 #define AUXTDC_CLRCNT AUX_TDC_STAT_STATE_CLR_CNT
115 #define AUXTDC_WAIT_STOP AUX_TDC_STAT_STATE_WAIT_STOP
116 #define AUXTDC_WAIT_STOP_CNTDOWN AUX_TDC_STAT_STATE_WAIT_STOP_CNTDWN
117 #define AUXTDC_GETRESULTS AUX_TDC_STAT_STATE_GET_RESULT
118 #define AUXTDC_POR AUX_TDC_STAT_STATE_POR
119 #define AUXTDC_WAIT_CLRCNT_DONE AUX_TDC_STAT_STATE_WAIT_CLR_CNT_DONE
120 #define AUXTDC_START_FALL AUX_TDC_STAT_STATE_START_FALL
121 #define AUXTDC_FORCE_STOP AUX_TDC_STAT_STATE_FORCE_STOP
128 #define AUXTDC_STOPPOL_RIS 0x00000000 // Rising edge polarity for stop
130 #define AUXTDC_STOPPOL_FALL 0x00002000 // Falling edge polarity for stop
132 #define AUXTDC_STOP_AON_WUC 0x00000000
133 #define AUXTDC_STOP_CMP_A 0x00000100
134 #define AUXTDC_STOP_CMP_B 0x00000200
135 #define AUXTDC_STOP_CS_RESET 0x00000300
136 #define AUXTDC_STOP_TIMER0 0x00000400
137 #define AUXTDC_STOP_TIMER1 0x00000500
138 #define AUXTDC_STOP_ADC_DONE 0x00000700
139 #define AUXTDC_STOP_AIO0 0x00000D00
140 #define AUXTDC_STOP_AIO1 0x00000E00
141 #define AUXTDC_STOP_AIO2 0x00000F00
142 #define AUXTDC_STOP_AIO3 0x00001000
143 #define AUXTDC_STOP_AIO4 0x00001100
144 #define AUXTDC_STOP_AIO5 0x00001200
145 #define AUXTDC_STOP_AIO6 0x00001300
146 #define AUXTDC_STOP_AIO7 0x00001400
147 #define AUXTDC_STOP_AIO8 0x00001500
148 #define AUXTDC_STOP_AIO9 0x00001600
149 #define AUXTDC_STOP_AIO10 0x00001700
150 #define AUXTDC_STOP_AIO11 0x00001800
151 #define AUXTDC_STOP_AIO12 0x00001900
152 #define AUXTDC_STOP_AIO13 0x00001A00
153 #define AUXTDC_STOP_AIO14 0x00001B00
154 #define AUXTDC_STOP_AIO15 0x00001C00
155 #define AUXTDC_STOP_ACLK 0x00001D00
156 #define AUXTDC_STOP_MCU_EVT 0x00001E00
157 #define AUXTDC_STOP_PRESCALER 0x00001F00
159 #define AUXTDC_STARTPOL_RIS 0x00000000 // Rising edge polarity for start
161 #define AUXTDC_STARTPOL_FALL 0x00002000 // Falling edge polarity for start
163 #define AUXTDC_START_AON_WUC 0x00000000
164 #define AUXTDC_START_CMP_A 0x00000001
165 #define AUXTDC_START_CMP_B 0x00000002
166 #define AUXTDC_START_CS_RESET 0x00000003
167 #define AUXTDC_START_TIMER0 0x00000004
168 #define AUXTDC_START_TIMER1 0x00000005
169 #define AUXTDC_START_ADC_DONE 0x00000007
170 #define AUXTDC_START_AIO0 0x0000000D
171 #define AUXTDC_START_AIO1 0x0000000E
172 #define AUXTDC_START_AIO2 0x0000000F
173 #define AUXTDC_START_AIO3 0x00000010
174 #define AUXTDC_START_AIO4 0x00000011
175 #define AUXTDC_START_AIO5 0x00000012
176 #define AUXTDC_START_AIO6 0x00000013
177 #define AUXTDC_START_AIO7 0x00000014
178 #define AUXTDC_START_AIO8 0x00000015
179 #define AUXTDC_START_AIO9 0x00000016
180 #define AUXTDC_START_AIO10 0x00000017
181 #define AUXTDC_START_AIO11 0x00000018
182 #define AUXTDC_START_AIO12 0x00000019
183 #define AUXTDC_START_AIO13 0x0000001A
184 #define AUXTDC_START_AIO14 0x0000001B
185 #define AUXTDC_START_AIO15 0x0000001C
186 #define AUXTDC_START_ACLK 0x0000001D
187 #define AUXTDC_START_MCU_EVT 0x0000001E
188 #define AUXTDC_START_PRESCALER 0x0000001F
195 #define AUXTDC_SAT_512 0x00000000
196 #define AUXTDC_SAT_1024 0x00000001
197 #define AUXTDC_SAT_2048 0x00000002
198 #define AUXTDC_SAT_4096 0x00000003
199 #define AUXTDC_SAT_8192 0x00000004
200 #define AUXTDC_SAT_16384 0x00000005
201 #define AUXTDC_SAT_32768 0x00000006
202 #define AUXTDC_SAT_65536 0x00000007
203 #define AUXTDC_SAT_131072 0x00000008
204 #define AUXTDC_SAT_262144 0x00000009
205 #define AUXTDC_SAT_524288 0x0000000A
206 #define AUXTDC_SAT_1048576 0x0000000B
207 #define AUXTDC_SAT_2097152 0x0000000C
208 #define AUXTDC_SAT_4194304 0x0000000D
209 #define AUXTDC_SAT_8388608 0x0000000E
210 #define AUXTDC_SAT_WRAP_AROUND 0x0000000F
211 #define AUXTDC_NUM_SAT_VALS 16
219 #ifdef DRIVERLIB_DEBUG
234 AUXTDCBaseValid(uint32_t ui32Base)
263 __STATIC_INLINE uint32_t
269 ASSERT(AUXTDCBaseValid(ui32Base));
274 return((HWREG(ui32Base + AUX_TDC_O_STAT) & AUX_TDC_STAT_STATE_M) >>
275 AUX_TDC_STAT_STATE_S);
362 extern void AUXTDCConfigSet(uint32_t ui32Base, uint32_t ui32StartCondition,
363 uint32_t ui32StopCondition);
385 ASSERT(AUXTDCBaseValid(ui32Base));
390 return (((HWREG(ui32Base + AUX_TDC_O_STAT) & AUX_TDC_STAT_STATE_M) ==
391 AUX_TDC_STAT_STATE_IDLE) ?
true :
false);
429 ASSERT(AUXTDCBaseValid(ui32Base));
436 HWREG(ui32Base + AUX_TDC_O_CTL) = ui32RunMode;
461 ASSERT(AUXTDCBaseValid(ui32Base));
466 HWREG(ui32Base + AUX_TDC_O_CTL) = AUX_TDC_CTL_CMD_ABORT;
501 __STATIC_INLINE uint32_t
507 ASSERT(AUXTDCBaseValid(ui32Base));
512 return (HWREG(ui32Base + AUX_TDC_O_RESULT));
550 ASSERT(AUXTDCBaseValid(ui32Base));
556 HWREG(ui32Base + AUX_TDC_O_SATCFG) = ui32Limit;
586 __STATIC_INLINE uint32_t
592 ASSERT(AUXTDCBaseValid(ui32Base));
597 return (HWREG(ui32Base + AUX_TDC_O_SATCFG));
627 ASSERT(AUXTDCBaseValid(ui32Base));
633 if(!((HWREG(ui32Base + AUX_TDC_O_STAT) & AUX_TDC_STAT_STATE_M) ==
634 AUX_TDC_STAT_STATE_IDLE))
642 HWREG(ui32Base + AUX_TDC_O_TRIGCNTCFG) = AUX_TDC_TRIGCNTCFG_EN;
671 ASSERT(AUXTDCBaseValid(ui32Base));
677 if(!((HWREG(ui32Base + AUX_TDC_O_STAT) & AUX_TDC_STAT_STATE_M) ==
678 AUX_TDC_STAT_STATE_IDLE))
686 HWREG(ui32Base + AUX_TDC_O_TRIGCNTCFG) = 0;
720 ASSERT(AUXTDCBaseValid(ui32Base));
726 if(!((HWREG(ui32Base + AUX_TDC_O_STAT) & AUX_TDC_STAT_STATE_M) ==
727 AUX_TDC_STAT_STATE_IDLE))
735 HWREG(ui32Base + AUX_TDC_O_TRIGCNTLOAD) = ui32Events;
761 __STATIC_INLINE uint32_t
767 ASSERT(AUXTDCBaseValid(ui32Base));
772 return (HWREG(ui32Base + AUX_TDC_O_TRIGCNT));
781 #ifndef DRIVERLIB_NOROM
783 #ifdef ROM_AUXTDCConfigSet
784 #undef AUXTDCConfigSet
785 #define AUXTDCConfigSet ROM_AUXTDCConfigSet
787 #ifdef ROM_AUXTDCMeasurementDone
788 #undef AUXTDCMeasurementDone
789 #define AUXTDCMeasurementDone ROM_AUXTDCMeasurementDone
802 #endif // __AUX_TDC_H__
__STATIC_INLINE uint32_t AUXTDCLimitGet(uint32_t ui32Base)
Get the saturation limit of the measurement.
__STATIC_INLINE uint32_t AUXTDCMeasurementGet(uint32_t ui32Base)
Get the value of the latest measurement.
void AUXTDCConfigSet(uint32_t ui32Base, uint32_t ui32StartCondition, uint32_t ui32StopCondition)
Configure the operation of the AUX TDC.
__STATIC_INLINE void AUXTDCLimitSet(uint32_t ui32Base, uint32_t ui32Limit)
Set the saturation limit of the measurement.
__STATIC_INLINE uint32_t AUXTDCCounterGet(uint32_t ui32Base)
Get the current number of counter compare/stop event to ignore before taking a measurement.
#define AUXTDC_NUM_SAT_VALS
__STATIC_INLINE uint32_t AUXTDCStatusGet(uint32_t ui32Base)
Get the status of the AUX TDC internal state machine.
__STATIC_INLINE bool AUXTDCCounterEnable(uint32_t ui32Base)
Enables the counter if possible.
__STATIC_INLINE void AUXTDCIdleForce(uint32_t ui32Base)
Force the AUX TDC back to Idle mode.
__STATIC_INLINE bool AUXTDCIdle(uint32_t ui32Base)
Check if the AUX TDC is in idle mode.
uint32_t AUXTDCMeasurementDone(uint32_t ui32Base)
Check if the AUX TDC is done measuring.
__STATIC_INLINE bool AUXTDCCounterDisable(uint32_t ui32Base)
Disables the counter if possible.
__STATIC_INLINE bool AUXTDCCounterSet(uint32_t ui32Base, uint32_t ui32Events)
Set the reset number of counter compare/stop event to ignore before taking a measurement.
__STATIC_INLINE void AUXTDCEnable(uint32_t ui32Base, uint32_t ui32RunMode)
Enable the AUX TDC for a measurement.