40 #include <inc/hw_memmap.h>
41 #include <inc/hw_types.h>
42 #include <inc/hw_adi.h>
43 #include <inc/hw_adi_0_rf.h>
44 #include <inc/hw_adi_1_synth.h>
45 #include <inc/hw_adi_2_refsys.h>
46 #include <inc/hw_adi_3_refsys.h>
47 #include <inc/hw_adi_4_aux.h>
48 #include <inc/hw_aon_ioc.h>
49 #include <inc/hw_aon_sysctl.h>
50 #include <inc/hw_aon_wuc.h>
51 #include <inc/hw_aux_wuc.h>
52 #include <inc/hw_ccfg.h>
53 #include <inc/hw_chip_def.h>
54 #include <inc/hw_ddi.h>
55 #if ( CC_GET_CHIP_OPTION == CC_CHIP_OPTION_OTP )
57 #include <inc/hw_flash.h>
59 #include <inc/hw_fcfg1.h>
60 #include <inc/hw_ddi_0_osc.h>
61 #include <inc/hw_prcm.h>
62 #include <inc/hw_vims.h>
63 #include <inc/hw_aon_batmon.h>
64 #include <inc/hw_aon_rtc.h>
75 #ifdef __IAR_SYSTEMS_ICC__
76 #include <intrinsics.h>
83 #define INCLUDE_VDDR_TEMPORARILY 1
86 #define CLK_LF_RCOSC_LF 0xC00000
87 #define CLK_LF_XOSC_LF 0x800000
88 #define CLK_LF_XOSC_HF 0x000000
96 static uint32_t GetTrimForAdcShModeEn( uint32_t ui32Fcfg1Revision );
97 static uint32_t GetTrimForAdcShVbufEn( uint32_t ui32Fcfg1Revision );
98 static uint32_t GetTrimForAmpcompCtrl( uint32_t ui32Fcfg1Revision );
99 static uint32_t GetTrimForAmpcompTh1( uint32_t ui32Fcfg1Revision );
100 static uint32_t GetTrimForAmpcompTh2( uint32_t ui32Fcfg1Revision );
101 static uint32_t GetTrimForAnabypassValue1( uint32_t ui32Fcfg1Revision, uint32_t ccfg_ModeConfReg );
102 static uint32_t GetTrimForDblrLoopFilterResetVoltage( uint32_t ui32Fcfg1Revision );
103 static uint32_t GetTrimForRadcExtCfg( uint32_t ui32Fcfg1Revision );
104 static uint32_t GetTrimForRcOscLfIBiasTrim( uint32_t ui32Fcfg1Revision );
105 static uint32_t GetTrimForRcOscLfRtuneCtuneTrim( uint32_t ui32Fcfg1Revision );
106 static uint32_t GetTrimForXoscHfCtl( uint32_t ui32Fcfg1Revision );
107 static uint32_t GetTrimForXoscHfFastStart( uint32_t ui32Fcfg1Revision );
108 static uint32_t GetTrimForXoscHfIbiastherm( uint32_t ui32Fcfg1Revision );
109 static uint32_t GetTrimForXoscLfRegulatorAndCmirrwrRatio( uint32_t ui32Fcfg1Revision );
111 #if ( INCLUDE_VDDR_TEMPORARILY )
112 static int32_t SignExtendVddrTrimValue( uint32_t ui32VddrTrimVal );
114 static void HapiTrimDeviceColdReset( uint32_t ui32Fcfg1Revision );
115 static void HapiTrimDeviceShutDown( uint32_t ui32Fcfg1Revision );
116 static void HapiTrimDevicePowerDown( uint32_t ui32Fcfg1Revision );
124 #define DELAY_20_USEC 0x140
136 #define CPU_DELAY_MICRO_SECONDS( x ) \
137 CPUdelay(((uint32_t)((( x ) * 48.0 ) / 5.0 )) - 1 )
152 uint32_t ui32Fcfg1Revision;
153 uint32_t ui32AonSysResetctl;
160 if ( ui32Fcfg1Revision == 0xFFFFFFFF ) {
161 ui32Fcfg1Revision = 0;
164 #if defined( CHECK_AT_STARTUP_FOR_CORRECT_FAMILY_ONLY )
170 ThisCodeIsBuiltForCC26xxHwRev20AndLater_HaltIfViolated();
207 HapiTrimDevicePowerDown(ui32Fcfg1Revision);
223 HapiTrimDeviceShutDown(ui32Fcfg1Revision);
224 HapiTrimDevicePowerDown(ui32Fcfg1Revision);
236 HapiTrimDeviceColdReset(ui32Fcfg1Revision);
237 HapiTrimDeviceShutDown(ui32Fcfg1Revision);
238 HapiTrimDevicePowerDown(ui32Fcfg1Revision);
248 #if ( CC_GET_CHIP_OPTION != CC_CHIP_OPTION_OTP )
276 HapiTrimDevicePowerDown(uint32_t ui32Fcfg1Revision)
284 HapiTrimDeviceShutDown(uint32_t ui32Fcfg1Revision)
287 uint32_t ccfg_ModeConfReg ;
361 ui32Trim = GetTrimForAnabypassValue1( ui32Fcfg1Revision, ccfg_ModeConfReg );
366 ui32Trim = GetTrimForRcOscLfRtuneCtuneTrim(ui32Fcfg1Revision);
376 ui32Trim = GetTrimForXoscHfIbiastherm(ui32Fcfg1Revision);
381 ui32Trim = GetTrimForAmpcompTh2(ui32Fcfg1Revision);
383 ui32Trim = GetTrimForAmpcompTh1(ui32Fcfg1Revision);
385 ui32Trim = GetTrimForAmpcompCtrl(ui32Fcfg1Revision);
393 ui32Trim = GetTrimForAdcShModeEn( ui32Fcfg1Revision );
395 ( 0x20 | ( ui32Trim << 1 ));
402 ui32Trim = GetTrimForAdcShVbufEn( ui32Fcfg1Revision );
404 ( 0x10 | ( ui32Trim ));
411 ui32Trim = GetTrimForXoscHfCtl(ui32Fcfg1Revision);
421 ui32Trim = GetTrimForDblrLoopFilterResetVoltage( ui32Fcfg1Revision );
423 ( 0x60 | ( ui32Trim << 1 ));
432 ui32Trim = GetTrimForRcOscLfIBiasTrim( ui32Fcfg1Revision );
434 ( 0x80 | ( ui32Trim << 3 ));
444 ui32Trim = GetTrimForXoscLfRegulatorAndCmirrwrRatio( ui32Fcfg1Revision );
446 ( 0xFC00 | ( ui32Trim << 2 ));
453 ui32Trim = GetTrimForRadcExtCfg(ui32Fcfg1Revision);
464 ui32Trim = GetTrimForXoscHfFastStart( ui32Fcfg1Revision );
465 HWREGB(
AUX_DDI0_OSC_BASE + DDI_O_MASK4B + ( 0x00000004 * 2 )) = ( 0x30 | ui32Trim );
502 #if ( CC_GET_CHIP_OPTION != CC_CHIP_OPTION_OTP )
508 #if ( INCLUDE_VDDR_TEMPORARILY )
510 SignExtendVddrTrimValue( uint32_t ui32VddrTrimVal )
516 int32_t i32SignedVddrVal = ui32VddrTrimVal;
517 if ( i32SignedVddrVal > 0x15 ) {
518 i32SignedVddrVal -= 0x20;
520 return ( i32SignedVddrVal );
525 HapiTrimDeviceColdReset(uint32_t ui32Fcfg1Revision)
527 #if ( INCLUDE_VDDR_TEMPORARILY )
528 int32_t i32TargetTrim ;
529 int32_t i32CurrentTrim ;
530 int32_t i32DeltaVal ;
539 i32TargetTrim = SignExtendVddrTrimValue((
544 i32CurrentTrim = SignExtendVddrTrimValue((
549 if ( i32TargetTrim != i32CurrentTrim ) {
556 i32DeltaVal = i32TargetTrim - i32CurrentTrim;
557 if ( i32DeltaVal > 0 ) {
559 i32CurrentTrim = ( i32CurrentTrim + 1 ) << 6;
562 i32CurrentTrim = ( i32CurrentTrim << 6 ) - 1;
565 for ( i32Cnt = 0 ; i32Cnt < 64 ; i32Cnt++ ) {
566 i32CurrentTrim += i32DeltaVal;
569 (( i32CurrentTrim >> 6 ) <<
583 if ( i32DeltaVal < 0 ) {
606 GetTrimForAnabypassValue1( uint32_t ui32Fcfg1Revision, uint32_t ccfg_ModeConfReg )
608 uint32_t ui32Fcfg1Value ;
609 uint32_t ui32XoscHfRow ;
610 uint32_t ui32XoscHfCol ;
611 int32_t i32CustomerDeltaAdjust ;
612 uint32_t ui32TrimValue ;
614 if ( ui32Fcfg1Revision == 0 ) {
617 ui32TrimValue = 0x000F0FFF;
625 ui32XoscHfRow = (( ui32Fcfg1Value &
628 ui32XoscHfCol = (( ui32Fcfg1Value &
632 i32CustomerDeltaAdjust = 0;
640 i32CustomerDeltaAdjust = ((int32_t)ccfg_ModeConfReg << 16 ) >> 24;
642 while ( i32CustomerDeltaAdjust < 0 ) {
644 if ( ui32XoscHfCol == 0 ) {
645 ui32XoscHfCol = 0xFFFF;
647 if ( ui32XoscHfRow == 0 ) {
652 i32CustomerDeltaAdjust++;
654 while ( i32CustomerDeltaAdjust > 0 ) {
655 ui32XoscHfCol = ( ui32XoscHfCol << 1 ) | 1;
656 if ( ui32XoscHfCol > 0xFFFF ) {
658 ui32XoscHfRow = ( ui32XoscHfRow << 1 ) | 1;
659 if ( ui32XoscHfRow > 0xF ) {
661 ui32XoscHfCol = 0xFFFF;
664 i32CustomerDeltaAdjust--;
672 return (ui32TrimValue);
682 GetTrimForRcOscLfRtuneCtuneTrim(uint32_t ui32Fcfg1Revision)
684 uint32_t ui32TrimValue;
686 if ( ui32Fcfg1Revision == 0 ) {
688 ui32TrimValue = 0x00D8;
705 return(ui32TrimValue);
715 GetTrimForXoscHfIbiastherm(uint32_t ui32Fcfg1Revision)
717 uint32_t ui32TrimValue;
719 if ( ui32Fcfg1Revision == 0 ) {
721 ui32TrimValue = 0x03FF;
731 return(ui32TrimValue);
740 GetTrimForAmpcompTh2(uint32_t ui32Fcfg1Revision)
742 uint32_t ui32TrimValue;
743 uint32_t ui32Fcfg1Value;
745 if ( ui32Fcfg1Revision == 0 ) {
747 ui32TrimValue = 0x68880000;
753 ui32TrimValue = ((ui32Fcfg1Value &
757 ui32TrimValue |= (((ui32Fcfg1Value &
761 ui32TrimValue |= (((ui32Fcfg1Value &
765 ui32TrimValue |= (((ui32Fcfg1Value &
771 return(ui32TrimValue);
780 GetTrimForAmpcompTh1(uint32_t ui32Fcfg1Revision)
782 uint32_t ui32TrimValue;
783 uint32_t ui32Fcfg1Value;
785 if ( ui32Fcfg1Revision == 0 ) {
787 ui32TrimValue = 0x0068768A;
793 ui32TrimValue = (((ui32Fcfg1Value &
797 ui32TrimValue |= (((ui32Fcfg1Value &
801 ui32TrimValue |= (((ui32Fcfg1Value &
805 ui32TrimValue |= (((ui32Fcfg1Value &
811 return(ui32TrimValue);
820 GetTrimForAmpcompCtrl(uint32_t ui32Fcfg1Revision)
822 uint32_t ui32TrimValue ;
823 uint32_t ui32Fcfg1Value ;
824 uint32_t ibiasOffset ;
827 int32_t deltaAdjust ;
829 if ( ui32Fcfg1Revision == 0 ) {
831 ui32TrimValue = 0x00713F27;
838 ibiasOffset = ( ui32Fcfg1Value &
841 ibiasInit = ( ui32Fcfg1Value &
851 deltaAdjust += (int32_t)ibiasOffset;
852 if ( deltaAdjust < 0 ) {
858 ibiasOffset = (uint32_t)deltaAdjust;
861 deltaAdjust += (int32_t)ibiasInit;
862 if ( deltaAdjust < 0 ) {
868 ibiasInit = (uint32_t)deltaAdjust;
873 ui32TrimValue |= (((ui32Fcfg1Value &
877 ui32TrimValue |= (((ui32Fcfg1Value &
881 ui32TrimValue |= (((ui32Fcfg1Value &
886 if ( ui32Fcfg1Revision >= 0x00000022 ) {
887 ui32TrimValue |= ((( ui32Fcfg1Value &
894 return(ui32TrimValue);
903 GetTrimForDblrLoopFilterResetVoltage( uint32_t ui32Fcfg1Revision )
905 uint32_t dblrLoopFilterResetVoltageValue = 0;
907 if ( ui32Fcfg1Revision >= 0x00000020 ) {
913 return ( dblrLoopFilterResetVoltageValue );
922 GetTrimForAdcShModeEn( uint32_t ui32Fcfg1Revision )
924 uint32_t getTrimForAdcShModeEnValue = 1;
926 if ( ui32Fcfg1Revision >= 0x00000022 ) {
932 return ( getTrimForAdcShModeEnValue );
941 GetTrimForAdcShVbufEn( uint32_t ui32Fcfg1Revision )
943 uint32_t getTrimForAdcShVbufEnValue = 1;
945 if ( ui32Fcfg1Revision >= 0x00000022 ) {
951 return ( getTrimForAdcShVbufEnValue );
960 GetTrimForXoscHfCtl( uint32_t ui32Fcfg1Revision )
962 uint32_t getTrimForXoschfCtlValue = 0;
965 if ( ui32Fcfg1Revision >= 0x00000020 ) {
967 getTrimForXoschfCtlValue =
972 getTrimForXoschfCtlValue |=
977 getTrimForXoschfCtlValue |=
983 return ( getTrimForXoschfCtlValue );
992 GetTrimForXoscHfFastStart( uint32_t ui32Fcfg1Revision )
994 uint32_t ui32XoscHfFastStartValue ;
996 if ( ui32Fcfg1Revision == 0 ) {
998 ui32XoscHfFastStartValue = 0;
1006 return ( ui32XoscHfFastStartValue );
1015 GetTrimForRadcExtCfg( uint32_t ui32Fcfg1Revision )
1017 uint32_t getTrimForRadcExtCfgValue = 0x403F8000;
1020 if ( ui32Fcfg1Revision >= 0x00000020 ) {
1022 getTrimForRadcExtCfgValue =
1027 getTrimForRadcExtCfgValue |=
1032 getTrimForRadcExtCfgValue |=
1038 return ( getTrimForRadcExtCfgValue );
1047 GetTrimForRcOscLfIBiasTrim( uint32_t ui32Fcfg1Revision )
1049 uint32_t trimForRcOscLfIBiasTrimValue = 0;
1051 if ( ui32Fcfg1Revision >= 0x00000022 ) {
1057 return ( trimForRcOscLfIBiasTrimValue );
1067 GetTrimForXoscLfRegulatorAndCmirrwrRatio( uint32_t ui32Fcfg1Revision )
1069 uint32_t trimForXoscLfRegulatorAndCmirrwrRatioValue = 0;
1071 if ( ui32Fcfg1Revision >= 0x00000022 ) {
1078 return ( trimForXoscLfRegulatorAndCmirrwrRatioValue );
#define CPU_DELAY_MICRO_SECONDS(x)
__STATIC_INLINE void DDI32RegWrite(uint32_t ui32Base, uint32_t ui32Reg, uint32_t ui32Val)
Write a 32 bit value to a register in the DDI slave.
void DDI16BitfieldWrite(uint32_t ui32Base, uint32_t ui32Reg, uint32_t ui32Mask, uint32_t ui32Shift, uint16_t ui32Data)
Write a bitfield via the DDI using 16-bit maskable write.
void ThisCodeIsBuiltForCC26xxHwRev22AndLater_HaltIfViolated(void)
Verifies that current chip is built for CC26xx HwRev 2.2 or later and never returns if violated...
__STATIC_INLINE void SysCtrlAonSync(void)
Sync all accesses to the AON register interface.
void OSCClockSourceSet(uint32_t ui32SrcClk, uint32_t ui32Osc)
Configure the oscillator input to the a source clock.