Instance: AUX_EVCTL
Component: AUX_EVCTL
Base address: 0x400c5000
AUX Event Controller
Register Name |
Type |
Register Width (Bits) |
Register Reset |
Address Offset |
Physical Address |
RW |
32 |
0x0000 0000 |
0x0000 0000 |
0x400C 5000 |
|
RW |
32 |
0x0000 0000 |
0x0000 0004 |
0x400C 5004 |
|
RW |
32 |
0x0000 0000 |
0x0000 0008 |
0x400C 5008 |
|
RW |
32 |
0x0000 0000 |
0x0000 000C |
0x400C 500C |
|
RW |
32 |
0x0000 0000 |
0x0000 0010 |
0x400C 5010 |
|
RW |
32 |
0x0000 0000 |
0x0000 0014 |
0x400C 5014 |
|
RW |
32 |
0x0000 0000 |
0x0000 0018 |
0x400C 5018 |
|
RO |
32 |
0x0000 0000 |
0x0000 001C |
0x400C 501C |
|
RO |
32 |
0x0000 0000 |
0x0000 0020 |
0x400C 5020 |
|
RW |
32 |
0x0000 0000 |
0x0000 0024 |
0x400C 5024 |
|
RW |
32 |
0x0000 0000 |
0x0000 0028 |
0x400C 5028 |
|
RW |
32 |
0x0000 0000 |
0x0000 002C |
0x400C 502C |
|
RW |
32 |
0x0000 0000 |
0x0000 0034 |
0x400C 5034 |
|
RW |
32 |
0x0000 0000 |
0x0000 0038 |
0x400C 5038 |
|
RW |
32 |
0x0000 0000 |
0x0000 003C |
0x400C 503C |
|
RW |
32 |
0x0000 0000 |
0x0000 0040 |
0x400C 5040 |
Address offset |
0x0000 0000 |
||
Physical address |
0x400C 5000 |
Instance |
AUX_EVCTL |
Description |
Vector Configuration 0 |
||
Type |
RW |
Bits |
Field Name |
Description |
Type |
Reset |
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31:15 |
Reserved |
Software should not rely on the value of a reserved. Writing any other value than the reset value may result in undefined behavior.(RO std text) |
RO |
0x0 0000 |
|||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
14 |
VEC1_POL |
Selects vector 1 trigger event polarity.
|
RW |
0 |
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13 |
VEC1_EN |
Enables (1) or disables (0) triggering of vector 1 execution.
|
RW |
0 |
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12:8 |
VEC1_EV |
Selects vector 1 trigger source event.
|
RW |
0x00 |
|||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
7 |
Reserved |
Software should not rely on the value of a reserved. Writing any other value than the reset value may result in undefined behavior.(RO std text) |
RO |
0 |
|||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
6 |
VEC0_POL |
Selects vector 0 trigger event polarity.
|
RW |
0 |
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5 |
VEC0_EN |
Enables (1) or disables (0) triggering of vector 0 execution.
|
RW |
0 |
|||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
4:0 |
VEC0_EV |
Selects vector 0 trigger source event.
|
RW |
0x00 |
Address offset |
0x0000 0004 |
||
Physical address |
0x400C 5004 |
Instance |
AUX_EVCTL |
Description |
Vector Configuration 1 |
||
Type |
RW |
Bits |
Field Name |
Description |
Type |
Reset |
|||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
31:15 |
Reserved |
Software should not rely on the value of a reserved. Writing any other value than the reset value may result in undefined behavior.(RO std text) |
RO |
0x0 0000 |
|||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
14 |
VEC3_POL |
Selects vector 3 trigger event polarity.
|
RW |
0 |
|||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
13 |
VEC3_EN |
Enables (1) or disables (0) triggering of vector 3 execution.
|
RW |
0 |
|||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
12:8 |
VEC3_EV |
Selects vector 3 trigger source event.
|
RW |
0x00 |
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7 |
Reserved |
Software should not rely on the value of a reserved. Writing any other value than the reset value may result in undefined behavior.(RO std text) |
RO |
0 |
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6 |
VEC2_POL |
Selects vector 2 trigger event polarity.
|
RW |
0 |
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5 |
VEC2_EN |
Enables (1) or disables (0) triggering of vector 2 execution.
|
RW |
0 |
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4:0 |
VEC2_EV |
Selects vector 2 trigger source event.
|
RW |
0x00 |
Address offset |
0x0000 0008 |
||
Physical address |
0x400C 5008 |
Instance |
AUX_EVCTL |
Description |
Sensor Controller Engine Wait Event Selection |
||
Type |
RW |
Bits |
Field Name |
Description |
Type |
Reset |
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31:5 |
Reserved |
Software should not rely on the value of a reserved. Writing any other value than the reset value may result in undefined behavior.(RO std text) |
RO |
0x000 0000 |
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4:0 |
WEV7_EV |
Selects the event source to be mapped to [AUX_SCE.WUSTAT.EV_SIGNALS] bit 7.
|
RW |
0x00 |
Address offset |
0x0000 000C |
||
Physical address |
0x400C 500C |
Instance |
AUX_EVCTL |
Description |
Events To AON Domain Flags |
||
Type |
RW |
Bits |
Field Name |
Description |
Type |
Reset |
||
31:9 |
Reserved |
Software should not rely on the value of a reserved. Writing any other value than the reset value may result in undefined behavior.(RO std text) |
RO |
0x00 0000 |
||
8 |
TIMER1_EV |
TIMER1_EV event flag. |
RW |
0 |
||
7 |
TIMER0_EV |
TIMER0_EV event flag. |
RW |
0 |
||
6 |
TDC_DONE |
TDC_DONE event flag. |
RW |
0 |
||
5 |
ADC_DONE |
ADC_DONE event flag. |
RW |
0 |
||
4 |
AUX_COMPB |
AUX_COMPB event flag. |
RW |
0 |
||
3 |
AUX_COMPA |
AUX_COMPA event flag. |
RW |
0 |
||
2 |
SWEV2 |
SWEV2 event flag. |
RW |
0 |
||
1 |
SWEV1 |
SWEV1 event flag. |
RW |
0 |
||
0 |
SWEV0 |
SWEV0 event flag. |
RW |
0 |
Address offset |
0x0000 0010 |
||
Physical address |
0x400C 5010 |
Instance |
AUX_EVCTL |
Description |
Events To AON Domain Polarity |
||
Type |
RW |
Bits |
Field Name |
Description |
Type |
Reset |
|||||||||||||
31:9 |
Reserved |
Software should not rely on the value of a reserved. Writing any other value than the reset value may result in undefined behavior.(RO std text) |
RO |
0x00 0000 |
|||||||||||||
8 |
TIMER1_EV |
Selects the event source level that sets EVTOAONFLAGS.TIMER1_EV.
|
RW |
0 |
|||||||||||||
7 |
TIMER0_EV |
Selects the event source level that sets EVTOAONFLAGS.TIMER0_EV.
|
RW |
0 |
|||||||||||||
6 |
TDC_DONE |
Selects the event source level that sets EVTOAONFLAGS.TDC_DONE.
|
RW |
0 |
|||||||||||||
5 |
ADC_DONE |
Selects the event source level that sets EVTOAONFLAGS.ADC_DONE.
|
RW |
0 |
|||||||||||||
4 |
AUX_COMPB |
Selects the event source level that sets EVTOAONFLAGS.AUX_COMPB.
|
RW |
0 |
|||||||||||||
3 |
AUX_COMPA |
Selects the event source level that sets EVTOAONFLAGS.AUX_COMPA.
|
RW |
0 |
|||||||||||||
2:0 |
Reserved |
Software should not rely on the value of a reserved. Writing any other value than the reset value may result in undefined behavior.(RO std text) |
RO |
0x0 |
Address offset |
0x0000 0014 |
||
Physical address |
0x400C 5014 |
Instance |
AUX_EVCTL |
Description |
Direct Memory Access Control |
||
Type |
RW |
Bits |
Field Name |
Description |
Type |
Reset |
|||||||||||||
31:3 |
Reserved |
Software should not rely on the value of a reserved. Writing any other value than the reset value may result in undefined behavior.(RO std text) |
RO |
0x0000 0000 |
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2 |
REQ_MODE |
DMA Request mode
|
RW |
0 |
|||||||||||||
1 |
EN |
RW |
0 |
||||||||||||||
0 |
SEL |
Selection of FIFO watermark level required to trigger an ADC_DMA transfer
|
RW |
0 |
Address offset |
0x0000 0018 |
||
Physical address |
0x400C 5018 |
Instance |
AUX_EVCTL |
Description |
Software Event Set |
||
Type |
RW |
Bits |
Field Name |
Description |
Type |
Reset |
||
31:3 |
Reserved |
Software should not rely on the value of a reserved. Writing any other value than the reset value may result in undefined behavior.(RO std text) |
RO |
0x0000 0000 |
||
2 |
SWEV2 |
Writing 1 sets software event 2. |
WO |
0 |
||
1 |
SWEV1 |
Writing 1 sets software event 1. |
WO |
0 |
||
0 |
SWEV0 |
Writing 1 sets software event 0. |
WO |
0 |
Address offset |
0x0000 001C |
||
Physical address |
0x400C 501C |
Instance |
AUX_EVCTL |
Description |
Event Status 0 |
||
Type |
RO |
Bits |
Field Name |
Description |
Type |
Reset |
||
31:16 |
Reserved |
Software should not rely on the value of a reserved. Writing any other value than the reset value may result in undefined behavior.(RO std text) |
RO |
0x0000 |
||
15 |
AUXIO2 |
Current value of AUXIO2 input data line |
RO |
0 |
||
14 |
AUXIO1 |
Current value of AUXIO1 input data line |
RO |
0 |
||
13 |
AUXIO0 |
Current value of AUXIO0 input data line |
RO |
0 |
||
12 |
AON_PROG_WU |
Current value of OBSMUX3 event line |
RO |
0 |
||
11 |
AON_SW |
Current value of OBSMUX2 event line |
RO |
0 |
||
10 |
OBSMUX1 |
Current value of OBSMUX1 event line |
RO |
0 |
||
9 |
OBSMUX0 |
Current value of OBSMUX0 event line |
RO |
0 |
||
8 |
ADC_FIFO_ALMOST_FULL |
Current value of ADC_FIFO_ALMOST_FULL event line |
RO |
0 |
||
7 |
ADC_DONE |
Current value of ADC_DONE event line |
RO |
0 |
||
6 |
SMPH_AUTOTAKE_DONE |
Current value of SMPH_AUTOTAKE_DONE event line |
RO |
0 |
||
5 |
TIMER1_EV |
Current value of TIMER1_EV event line |
RO |
0 |
||
4 |
TIMER0_EV |
Current value of TIMER0_EV event line |
RO |
0 |
||
3 |
TDC_DONE |
Current value of TDC_DONE event line |
RO |
0 |
||
2 |
AUX_COMPB |
Current value of AUX_COMPB event line |
RO |
0 |
||
1 |
AUX_COMPA |
Current value of AUX_COMPA event line |
RO |
0 |
||
0 |
AON_RTC_CH2 |
Current value of AON_RTC_CH2 event line |
RO |
0 |
Address offset |
0x0000 0020 |
||
Physical address |
0x400C 5020 |
Instance |
AUX_EVCTL |
Description |
Event Status 1 |
||
Type |
RO |
Bits |
Field Name |
Description |
Type |
Reset |
||
31:16 |
Reserved |
Software should not rely on the value of a reserved. Writing any other value than the reset value may result in undefined behavior.(RO std text) |
RO |
0x0000 |
||
15 |
ADC_IRQ |
Current value of ADC_IRQ event line |
RO |
0 |
||
14 |
MCU_EV |
Current value of MCU_EV event line |
RO |
0 |
||
13 |
ACLK_REF |
Current value of ACLK_REF event line |
RO |
0 |
||
12 |
AUXIO15 |
Current value of AUXIO15 input data line |
RO |
0 |
||
11 |
AUXIO14 |
Current value of AUXIO14 input data line |
RO |
0 |
||
10 |
AUXIO13 |
Current value of AUXIO13 input data line |
RO |
0 |
||
9 |
AUXIO12 |
Current value of AUXIO12 input data line |
RO |
0 |
||
8 |
AUXIO11 |
Current value of AUXIO11 input data line |
RO |
0 |
||
7 |
AUXIO10 |
Current value of AUXIO10 input data line |
RO |
0 |
||
6 |
AUXIO9 |
Current value of AUXIO9 input data line |
RO |
0 |
||
5 |
AUXIO8 |
Current value of AUXIO8 input data line |
RO |
0 |
||
4 |
AUXIO7 |
Current value of AUXIO7 input data line |
RO |
0 |
||
3 |
AUXIO6 |
Current value of AUXIO6 input data line |
RO |
0 |
||
2 |
AUXIO5 |
Current value of AUXIO5 input data line |
RO |
0 |
||
1 |
AUXIO4 |
Current value of AUXIO4 input data line |
RO |
0 |
||
0 |
AUXIO3 |
Current value of AUXIO3 input data line |
RO |
0 |
Address offset |
0x0000 0024 |
||
Physical address |
0x400C 5024 |
Instance |
AUX_EVCTL |
Description |
Event To MCU Domain Polarity |
||
Type |
RW |
Bits |
Field Name |
Description |
Type |
Reset |
|||||||||||||
31:11 |
Reserved |
Software should not rely on the value of a reserved. Writing any other value than the reset value may result in undefined behavior.(RO std text) |
RO |
0x00 0000 |
|||||||||||||
10 |
ADC_IRQ |
Selects the event source level that sets EVTOMCUFLAGS.ADC_IRQ.
|
RW |
0 |
|||||||||||||
9 |
OBSMUX0 |
Selects the event source level that sets EVTOMCUFLAGS.OBSMUX0.
|
RW |
0 |
|||||||||||||
8 |
ADC_FIFO_ALMOST_FULL |
Selects the event source level that sets EVTOMCUFLAGS.ADC_FIFO_ALMOST_FULL.
|
RW |
0 |
|||||||||||||
7 |
ADC_DONE |
Selects the event source level that sets EVTOMCUFLAGS.ADC_DONE.
|
RW |
0 |
|||||||||||||
6 |
SMPH_AUTOTAKE_DONE |
Selects the event source level that sets EVTOMCUFLAGS.SMPH_AUTOTAKE_DONE.
|
RW |
0 |
|||||||||||||
5 |
TIMER1_EV |
Selects the event source level that sets EVTOMCUFLAGS.TIMER1_EV.
|
RW |
0 |
|||||||||||||
4 |
TIMER0_EV |
Selects the event source level that sets EVTOMCUFLAGS.TIMER0_EV.
|
RW |
0 |
|||||||||||||
3 |
TDC_DONE |
Selects the event source level that sets EVTOMCUFLAGS.TDC_DONE.
|
RW |
0 |
|||||||||||||
2 |
AUX_COMPB |
Selects the event source level that sets EVTOMCUFLAGS.AUX_COMPB.
|
RW |
0 |
|||||||||||||
1 |
AUX_COMPA |
Selects the event source level that sets EVTOMCUFLAGS.AUX_COMPA.
|
RW |
0 |
|||||||||||||
0 |
AON_WU_EV |
Selects the event source level that sets EVTOMCUFLAGS.AON_WU_EV
|
RW |
0 |
Address offset |
0x0000 0028 |
||
Physical address |
0x400C 5028 |
Instance |
AUX_EVCTL |
Description |
Events to MCU Domain Flags |
||
Type |
RW |
Bits |
Field Name |
Description |
Type |
Reset |
||
31:11 |
Reserved |
Software should not rely on the value of a reserved. Writing any other value than the reset value may result in undefined behavior.(RO std text) |
RO |
0x00 0000 |
||
10 |
ADC_IRQ |
ADC_IRQ event flag. |
RW |
0 |
||
9 |
OBSMUX0 |
OBSMUX0 event flag. |
RW |
0 |
||
8 |
ADC_FIFO_ALMOST_FULL |
ADC_FIFO_ALMOST_FULL event flag. |
RW |
0 |
||
7 |
ADC_DONE |
ADC_DONE event flag. |
RW |
0 |
||
6 |
SMPH_AUTOTAKE_DONE |
SMPH_AUTOTAKE_DONE event flag. |
RW |
0 |
||
5 |
TIMER1_EV |
TIMER1_EV event flag. |
RW |
0 |
||
4 |
TIMER0_EV |
TIMER0_EV event flag. |
RW |
0 |
||
3 |
TDC_DONE |
TDC_DONE event flag. |
RW |
0 |
||
2 |
AUX_COMPB |
AUX_COMPB event flag. |
RW |
0 |
||
1 |
AUX_COMPA |
AUX_COMPA event flag. |
RW |
0 |
||
0 |
AON_WU_EV |
AON_WU_EV event flag. |
RW |
0 |
Address offset |
0x0000 002C |
||
Physical address |
0x400C 502C |
Instance |
AUX_EVCTL |
Description |
Combined Event To MCU Domain Mask |
||
Type |
RW |
Bits |
Field Name |
Description |
Type |
Reset |
||
31:11 |
Reserved |
Software should not rely on the value of a reserved. Writing any other value than the reset value may result in undefined behavior.(RO std text) |
RO |
0x00 0000 |
||
10 |
ADC_IRQ |
Includes (1) or excludes (0) EVTOMCUFLAGS.ADC_IRQ contribution to the AUX_COMB event. |
RW |
0 |
||
9 |
OBSMUX0 |
Includes (1) or excludes (0) EVTOMCUFLAGS.OBSMUX0 contribution to the AUX_COMB event. |
RW |
0 |
||
8 |
ADC_FIFO_ALMOST_FULL |
Includes (1) or excludes (0) EVTOMCUFLAGS.ADC_FIFO_ALMOST_FULL contribution to the AUX_COMB event. |
RW |
0 |
||
7 |
ADC_DONE |
Includes (1) or excludes (0) EVTOMCUFLAGS.ADC_DONE contribution to the AUX_COMB event. |
RW |
0 |
||
6 |
SMPH_AUTOTAKE_DONE |
Includes (1) or excludes (0) EVTOMCUFLAGS.SMPH_AUTOTAKE_DONE contribution to the AUX_COMB event. |
RW |
0 |
||
5 |
TIMER1_EV |
Includes (1) or excludes (0) EVTOMCUFLAGS.TIMER1_EV contribution to the AUX_COMB event. |
RW |
0 |
||
4 |
TIMER0_EV |
Includes (1) or excludes (0) EVTOMCUFLAGS.TIMER0_EV contribution to the AUX_COMB event. |
RW |
0 |
||
3 |
TDC_DONE |
Includes (1) or excludes (0) EVTOMCUFLAGS.TDC_DONE contribution to the AUX_COMB event. |
RW |
0 |
||
2 |
AUX_COMPB |
Includes (1) or excludes (0) EVTOMCUFLAGS.AUX_COMPB contribution to the AUX_COMB event. |
RW |
0 |
||
1 |
AUX_COMPA |
Includes (1) or excludes (0) EVTOMCUFLAGS.AUX_COMPA contribution to the AUX_COMB event. |
RW |
0 |
||
0 |
AON_WU_EV |
Includes (1) or excludes (0) EVTOMCUFLAGS.AON_WU_EV contribution to the AUX_COMB event. |
RW |
0 |
Address offset |
0x0000 0034 |
||
Physical address |
0x400C 5034 |
Instance |
AUX_EVCTL |
Description |
Vector Flags |
||
Type |
RW |
Bits |
Field Name |
Description |
Type |
Reset |
||
31:4 |
Reserved |
Software should not rely on the value of a reserved. Writing any other value than the reset value may result in undefined behavior.(RO std text) |
RO |
0x000 0000 |
||
3 |
VEC3 |
The vector flag is set if the edge selected VECCFG1.VEC3_POL occurs on the event selected in VECCFG1.VEC3_EV. |
RW |
0 |
||
2 |
VEC2 |
The vector flag is set if the edge selected VECCFG1.VEC2_POL occurs on the event selected in VECCFG1.VEC2_EV. |
RW |
0 |
||
1 |
VEC1 |
The vector flag is set if the edge selected VECCFG0.VEC1_POL occurs on the event selected in VECCFG0.VEC1_EV. |
RW |
0 |
||
0 |
VEC0 |
The vector flag is set if the edge selected VECCFG0.VEC0_POL occurs on the event selected in VECCFG0.VEC0_EV. |
RW |
0 |
Address offset |
0x0000 0038 |
||
Physical address |
0x400C 5038 |
Instance |
AUX_EVCTL |
Description |
Events To MCU Domain Flags Clear |
||
Type |
RW |
Bits |
Field Name |
Description |
Type |
Reset |
||
31:11 |
Reserved |
Software should not rely on the value of a reserved. Writing any other value than the reset value may result in undefined behavior.(RO std text) |
RO |
0x00 0000 |
||
10 |
ADC_IRQ |
Writing 1 clears EVTOMCUFLAGS.ADC_IRQ. |
WO |
0 |
||
9 |
OBSMUX0 |
Writing 1 clears EVTOMCUFLAGS.OBSMUX0. |
WO |
0 |
||
8 |
ADC_FIFO_ALMOST_FULL |
Writing 1 clears EVTOMCUFLAGS.ADC_FIFO_ALMOST_FULL. |
WO |
0 |
||
7 |
ADC_DONE |
Writing 1 clears EVTOMCUFLAGS.ADC_DONE. |
WO |
0 |
||
6 |
SMPH_AUTOTAKE_DONE |
Writing 1 clears [EVTOMCUFLAGS.SMPH_AUTOTAKE_DONE. |
WO |
0 |
||
5 |
TIMER1_EV |
Writing 1 clears EVTOMCUFLAGS.TIMER1_EV. |
WO |
0 |
||
4 |
TIMER0_EV |
Writing 1 clears EVTOMCUFLAGS.TIMER0_EV. |
WO |
0 |
||
3 |
TDC_DONE |
Writing 1 clears EVTOMCUFLAGS.TDC_DONE. |
WO |
0 |
||
2 |
AUX_COMPB |
Writing 1 clears EVTOMCUFLAGS.AUX_COMPB. |
WO |
0 |
||
1 |
AUX_COMPA |
Writing 1 clears EVTOMCUFLAGS.AUX_COMPA. |
WO |
0 |
||
0 |
AON_WU_EV |
Writing 1 clears EVTOMCUFLAGS.AON_WU_EV. |
WO |
0 |
Address offset |
0x0000 003C |
||
Physical address |
0x400C 503C |
Instance |
AUX_EVCTL |
Description |
Events To AON Domain Clear |
||
Type |
RW |
Bits |
Field Name |
Description |
Type |
Reset |
||
31:9 |
Reserved |
Software should not rely on the value of a reserved. Writing any other value than the reset value may result in undefined behavior.(RO std text) |
RO |
0x00 0000 |
||
8 |
TIMER1_EV |
Writing 1 clears EVTOAONFLAGS.TIMER1_EV. |
WO |
0 |
||
7 |
TIMER0_EV |
Writing 1 clears EVTOAONFLAGS.TIMER0_EV. |
WO |
0 |
||
6 |
TDC_DONE |
Writing 1 clears EVTOAONFLAGS.TDC_DONE. |
WO |
0 |
||
5 |
ADC_DONE |
Writing 1 clears EVTOAONFLAGS.ADC_DONE. |
WO |
0 |
||
4 |
AUX_COMPB |
Writing 1 clears EVTOAONFLAGS.AUX_COMPB. |
WO |
0 |
||
3 |
AUX_COMPA |
Writing 1 clears EVTOAONFLAGS.AUX_COMPA. |
WO |
0 |
||
2 |
SWEV2 |
Writing 1 clears EVTOAONFLAGS.SWEV2. |
WO |
0 |
||
1 |
SWEV1 |
Writing 1 clears EVTOAONFLAGS.SWEV1. |
WO |
0 |
||
0 |
SWEV0 |
Writing 1 clears EVTOAONFLAGS.SWEV0. |
WO |
0 |
Address offset |
0x0000 0040 |
||
Physical address |
0x400C 5040 |
Instance |
AUX_EVCTL |
Description |
Vector Flags Clear |
||
Type |
RW |
Bits |
Field Name |
Description |
Type |
Reset |
||
31:4 |
Reserved |
Software should not rely on the value of a reserved. Writing any other value than the reset value may result in undefined behavior.(RO std text) |
RO |
0x000 0000 |
||
3 |
VEC3 |
Writing 1 clears VECFLAGS.VEC3. |
WO |
0 |
||
2 |
VEC2 |
Writing 1 clears VECFLAGS.VEC2. |
WO |
0 |
||
1 |
VEC1 |
Writing 1 clears VECFLAGS.VEC1. |
WO |
0 |
||
0 |
VEC0 |
Writing 1 clears VECFLAGS.VEC0. |
WO |
0 |
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