Instance: ADI_4_AUX
Component: ADI_4_AUX
Base address: 0x400cb000
Configuration registers controlling analog peripherals of AUX. Registers Fields should be considered static unless otherwise noted (as dynamic)
Register Name |
Type |
Register Width (Bits) |
Register Reset |
Address Offset |
Physical Address |
RW |
8 |
0x0000 0000 |
0x0000 0004 |
0x400C B004 |
|
RW |
8 |
0x0000 0000 |
0x0000 0005 |
0x400C B005 |
|
RW |
8 |
0x0000 0000 |
0x0000 0006 |
0x400C B006 |
|
RW |
8 |
0x0000 0000 |
0x0000 0008 |
0x400C B008 |
|
RW |
8 |
0x0000 0000 |
0x0000 0009 |
0x400C B009 |
|
RW |
8 |
0x0000 0000 |
0x0000 000A |
0x400C B00A |
|
RW |
8 |
0x0000 0000 |
0x0000 000B |
0x400C B00B |
Address offset |
0x0000 0004 |
||
Physical address |
0x400C B004 |
Instance |
ADI_4_AUX |
Description |
Current Source |
||
Type |
RW |
Bits |
Field Name |
Description |
Type |
Reset |
|||||||||||||||||||||||||||||||||
7:2 |
TRIM |
Adjust current from current source.
|
RW |
0x00 |
|||||||||||||||||||||||||||||||||
1 |
Reserved |
Internal |
RW |
0 |
|||||||||||||||||||||||||||||||||
0 |
EN |
Current source enable |
RW |
0 |
Address offset |
0x0000 0005 |
||
Physical address |
0x400C B005 |
Instance |
ADI_4_AUX |
Description |
|||
Type |
RW |
Bits |
Field Name |
Description |
Type |
Reset |
|||||||||||||||||||||
7 |
COMPA_REF_RES_EN |
Enables 400kohm resistance from COMPA reference node to ground. Used with COMPA_REF_CURR_EN to generate voltage reference for cap-sense. |
RW |
0 |
|||||||||||||||||||||
6 |
COMPA_REF_CURR_EN |
Enables 2uA IPTAT current from ISRC to COMPA reference node. Requires ISRC.EN = 1. Used with COMPA_REF_RES_EN to generate voltage reference for cap-sense. |
RW |
0 |
|||||||||||||||||||||
5:3 |
COMPB_TRIM |
COMPB voltage reference trim temperature coded:
|
RW |
0x0 |
|||||||||||||||||||||
2 |
COMPB_EN |
Comparator B enable |
RW |
0 |
|||||||||||||||||||||
1 |
Reserved |
Internal |
RW |
0 |
|||||||||||||||||||||
0 |
COMPA_EN |
COMPA enable |
RW |
0 |
Address offset |
0x0000 0006 |
||
Physical address |
0x400C B006 |
Instance |
ADI_4_AUX |
Description |
Charge Pump Test |
||
Type |
RW |
Bits |
Field Name |
Description |
Type |
Reset |
||
7 |
CHP_EN |
Enable AUX Charge pump |
RW |
0 |
||
6 |
Reserved |
Internal |
RW |
0 |
||
5 |
Reserved |
Internal |
RW |
0 |
||
4:0 |
Reserved |
Internal |
RW |
0x00 |
Address offset |
0x0000 0008 |
||
Physical address |
0x400C B008 |
Instance |
ADI_4_AUX |
Description |
ADC Control |
||
Type |
RW |
Bits |
Field Name |
Description |
Type |
Reset |
||
7 |
SMPL_MODE |
ADC Sampling mode: |
RW |
0 |
||
6:3 |
SMPL_CYCLE_EXP |
Controls number of 6 MHz clock cycles in sampling/tracking mode before conversion. The sampling time will be 2^(SMPL_CYCLE_EXP + 1) 6 MHz clock periods. Giving a range of 2 to 65536 clock periods sampling time (up to 10.9ms). This setting only has effect in synchronous mode (SMPL_MODE =0). The default minimum value should be 3 (2.7us sampling time). Less than that should be considered experimental. |
RW |
0x0 |
||
2 |
Reserved |
Internal |
RW |
0 |
||
1 |
RESET_N |
Reset ADC digital subchip, active low. ADC must be reset every time it is reconfigured. |
RW |
0 |
||
0 |
EN |
ADC Enable |
RW |
0 |
Address offset |
0x0000 0009 |
||
Physical address |
0x400C B009 |
Instance |
ADI_4_AUX |
Description |
Control ADC |
||
Type |
RW |
Bits |
Field Name |
Description |
Type |
Reset |
||
7:5 |
Reserved |
Software should not rely on the value of a reserved. Writing any other value than the reset value may result in undefined behavior.(RW std text) |
RW |
0x0 |
||
4 |
Reserved |
Internal |
RW |
0 |
||
3 |
Reserved |
Internal |
RW |
0 |
||
2:1 |
Reserved |
Internal |
RW |
0x0 |
||
0 |
Reserved |
Internal |
RW |
0 |
Address offset |
0x0000 000A |
||
Physical address |
0x400C B00A |
Instance |
ADI_4_AUX |
Description |
Analog To Digital Reference 0 |
||
Type |
RW |
Bits |
Field Name |
Description |
Type |
Reset |
||
7 |
Reserved |
Software should not rely on the value of a reserved. Writing any other value than the reset value may result in undefined behavior.(RW std text) |
RW |
0 |
||
6 |
REF_ON_IDLE |
Keep ADCREF powered up in IDLE state when ADC0.SMPL_MODE = 0. |
RW |
0 |
||
5 |
Reserved |
Internal |
RW |
0 |
||
4 |
Reserved |
Internal |
RW |
0 |
||
3 |
SRC |
ADC reference source: |
RW |
0 |
||
2 |
Reserved |
Internal |
RW |
0 |
||
1 |
Reserved |
Internal |
RW |
0 |
||
0 |
EN |
ADC reference module enable: |
RW |
0 |
Address offset |
0x0000 000B |
||
Physical address |
0x400C B00B |
Instance |
ADI_4_AUX |
Description |
Analog To Digital Reference 1 |
||
Type |
RW |
Bits |
Field Name |
Description |
Type |
Reset |
||
7:6 |
Reserved |
Internal |
RW |
0x0 |
||
5:0 |
VTRIM |
Trim output voltage of ADC fixed reference (64 steps, 2's complement). Applies only for ADCREF0.SRC = 0. |
RW |
0x00 |
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