AUX_TDCIF

Instance: AUX_TDCIF
Component: AUX_TDC
Base address: 0x400c4000

 

AUX Time To Digital Converter

 

TOP:AUX_TDCIF Register Summary

Register Name

Type

Register Width (Bits)

Register Reset

Address Offset

Physical Address

CTL

RW

32

0x0000 0000

0x0000 0000

0x400C 4000

STAT

RO

32

0x0000 0006

0x0000 0004

0x400C 4004

RESULT

RO

32

0x0000 0002

0x0000 0008

0x400C 4008

SATCFG

RW

32

0x0000 000F

0x0000 000C

0x400C 400C

TRIGSRC

RW

32

0x0000 0000

0x0000 0010

0x400C 4010

TRIGCNT

RW

32

0x0000 0000

0x0000 0014

0x400C 4014

TRIGCNTLOAD

RW

32

0x0000 0000

0x0000 0018

0x400C 4018

TRIGCNTCFG

RW

32

0x0000 0000

0x0000 001C

0x400C 401C

PRECTL

RW

32

0x0000 001F

0x0000 0020

0x400C 4020

PRECNT

RW

32

0x0000 0000

0x0000 0024

0x400C 4024

TOP:AUX_TDCIF Register Descriptions

TOP:AUX_TDC:CTL

Address offset

0x0000 0000

Physical address

0x400C 4000

Instance

AUX_TDCIF

Description

Control

Type

RW

Bits

Field Name

Description

Type

Reset

31:2

Reserved

Software should not rely on the value of a reserved. Writing any other value than the reset value may result in undefined behavior.(RO std text)

RO

0x0000 0000

1:0

CMD

TDC command strobes

Value

ENUM name

Description

0x0

CLR_RESULT

This command clears STAT.SAT, STAT.DONE and results. Note: This is not needed as prerequisite for a measurement. Reliable clear is only guaranteed from IDLE state

0x1

RUN_SYNC_START

This command makes the TDC FSM start counting synchronously to the first rising edge that follows a required falling edge of the start event. This guarantees an edge triggered start and is recommended for frequency measurements. A falling edge of the start event may be missed if the command is issued close to it in time, but the TDC will catch later falling edges and guarantee that a measurement starts synchronously to the rising edge of the start event

0x2

RUN

This command makes the TDC FSM start and stop counting asynchronously. TDC measurement may start immediately if start is high and hence it may not give precise edge to edge measurements. Only recommended when start pulse is guaranteed to arrive at least 7 clock periods after the command

0x3

ABORT

This command forces the TDC back to IDLE state

WO

0x0



TOP:AUX_TDC:STAT

Address offset

0x0000 0004

Physical address

0x400C 4004

Instance

AUX_TDCIF

Description

Status

Type

RO

Bits

Field Name

Description

Type

Reset

31:10

Reserved

Software should not rely on the value of a reserved. Writing any other value than the reset value may result in undefined behavior.(RO std text)

RO

0x00 0000

9

Reserved

RO

0

8

Reserved

RO

0

7

SAT

Saturation flag for TDC measurement

0: Conversion has not saturated
1: Conversion stopped due to saturation

This field is cleared when starting new measurement or setting [CTL:CMD] to CLR_RESULT

RO

0

6

DONE

Measurement complete flag

0: Measurement not yet complete
1: Measurement complete

This field is cleared when starting new measurement or setting [CTL:CMD] to CLR_RESULT

RO

0

5:0

STATE

TDC internal state machine status

Value

ENUM name

Description

0x00

WAIT_START

Current state is TDC_STATE_WAIT_START

0x04

WAIT_START_STOP_CNT_EN

Current state is TDC_STATE_WAIT_STARTSTOPCNTEN

0x06

IDLE

Current state is TDC_STATE_IDLE

0x07

CLR_CNT

Current state is TDC_STATE_CLRCNT

0x08

WAIT_STOP

Current state is TDC_STATE_WAIT_STOP

0x0C

WAIT_STOP_CNTDWN

Current state is TDC_STATE_WAIT_STOPCNTDOWN

0x0E

GET_RESULT

Current state is TDC_STATE_GETRESULTS

0x0F

POR

Current state is TDC_STATE_POR

0x16

WAIT_CLR_CNT_DONE

Current state is TDC_STATE_WAIT_CLRCNT_DONE

0x1E

START_FALL

Current state is TDC_WAIT_STARTFALL

0x2E

FORCE_STOP

Current state is TDC_FORCESTOP

RO

0x06



TOP:AUX_TDC:RESULT

Address offset

0x0000 0008

Physical address

0x400C 4008

Instance

AUX_TDCIF

Description

Result

Result of last TDC conversion

Type

RO

Bits

Field Name

Description

Type

Reset

31:25

Reserved

Software should not rely on the value of a reserved. Writing any other value than the reset value may result in undefined behavior.(RO std text)

RO

0x00

24:0

VALUE

Result of the TDC conversion. The result is in clock edges of the clock selected in [OSC_DIG.CTL0.ACLK_TDC_SRC_SEL]. Both rising and falling edges are counted.

When saturating the result is slightly higher than the saturation limit, since it takes a non-zero time to stop the measurement. The highest saturation limit is 24 bits (see SATCFG.LIMIT) so maximum value of VALUE is hence slightly above 2^24.

RO

0x000 0002



TOP:AUX_TDC:SATCFG

Address offset

0x0000 000C

Physical address

0x400C 400C

Instance

AUX_TDCIF

Description

Saturation Configuration

Type

RW

Bits

Field Name

Description

Type

Reset

31:4

Reserved

Software should not rely on the value of a reserved. Writing any other value than the reset value may result in undefined behavior.(RO std text)

RO

0x000 0000

3:0

LIMIT

Select when the TDC should time out. Values not enumerated is not supported

Value

ENUM name

Description

0x3

R13

Result bit 13 : TDC saturates 2^13 ticks

0x4

R14

Result bit 14 : TDC saturates at 2^14 ticks

0x5

R15

Result bit 15 : TDC saturates at 2^15 ticks

0x6

R16

Result bit 16 : TDC saturates at 2^16 ticks

0x7

R17

Result bit 17 : TDC saturates at 2^17 ticks

0x8

R18

Result bit 18 : TDC saturates at 2^18 ticks

0x9

R19

Result bit 19 : TDC saturates at 2^19 ticks

0xA

R20

Result bit 20 : TDC saturates at 2^20 ticks

0xB

R21

Result bit 21 : TDC saturates at 2^21 ticks

0xC

R22

Result bit 22 : TDC saturates at 2^22 ticks

0xD

R23

Result bit 23 : TDC saturates at 2^23 ticks

0xF

ROVF

Result bit 24 : TDC saturates at 2^24 ticks

RW

0xF



TOP:AUX_TDC:TRIGSRC

Address offset

0x0000 0010

Physical address

0x400C 4010

Instance

AUX_TDCIF

Description

Trigger Source

TDC start/stop trigger source selection

Type

RW

Bits

Field Name

Description

Type

Reset

31:14

Reserved

Software should not rely on the value of a reserved. Writing any other value than the reset value may result in undefined behavior.(RO std text)

RO

0x0 0000

13

STOP_POL

Polarity of stop signal. Note! Must not be changed if STAT.STATE is not IDLE

Value

ENUM name

Description

0

HIGH

TDC stops when high level is detected

1

LOW

TDC stops when low level is detected

RW

0

12:8

STOP_SRC

Selects the asynchronous stop signal Note! Must not be changed if STAT.STATE is not IDLE

Value

ENUM name

Description

0x00

AON_RTC_CH2

Selects AON_RTC_CH2

0x01

AUX_COMPA

Selects AUX_COMPA

0x02

AUX_COMPB

Selects AUX_COMPB

0x03

ISRC_RESET

Selects ISRC_RESET

0x04

TIMER0_EV

Selects TIMER0_EV

0x05

TIMER1_EV

Selects TIMER1_EV

0x06

SMPH_AUTOTAKE_DONE

Selects SMPH_AUTOTAKE_DONE

0x07

ADC_DONE

Selects ADC_DONE

0x08

ADC_FIFO_ALMOST_FULL

Selects ADC_FIFO_ALMOST_FULL

0x09

OBSMUX0

Selects OBSMUX0

0x0A

OBSMUX1

Selects OBSMUX1

0x0B

AON_SW

Selects AON_SW

0x0C

AON_PROG_WU

Selects AON_PROG_WU

0x0D

AUXIO0

Selects AUXIO0

0x0E

AUXIO1

Selects AUXIO1

0x0F

AUXIO2

Selects AUXIO2

0x10

AUXIO3

Selects AUXIO3

0x11

AUXIO4

Selects AUXIO4

0x12

AUXIO5

Selects AUXIO5

0x13

AUXIO6

Selects AUXIO6

0x14

AUXIO7

Selects AUXIO7

0x15

AUXIO8

Selects AUXIO8

0x16

AUXIO9

Selects AUXIO9

0x17

AUXIO10

Selects AUXIO10

0x18

AUXIO11

Selects AUXIO11

0x19

AUXIO12

Selects AUXIO12

0x1A

AUXIO13

Selects AUXIO13

0x1B

AUXIO14

Selects AUXIO14

0x1C

AUXIO15

Selects AUXIO15

0x1D

ACLK_REF

Selects ACLK_REF

0x1E

MCU_EV

Selects MCU_EV

0x1F

TDC_PRE

Selects TDC_PRE

RW

0x00

7:6

Reserved

Software should not rely on the value of a reserved. Writing any other value than the reset value may result in undefined behavior.(RO std text)

RO

0x0

5

START_POL

Polarity of start signal. Note! Must not be changed if STAT.STATE is not IDLE

Value

ENUM name

Description

0

HIGH

TDC starts when high level is detected

1

LOW

TDC starts when low level is detected

RW

0

4:0

START_SRC

Selects the asynchronous start signal Note! Must not be changed if STAT.STATE is not IDLE

Value

ENUM name

Description

0x00

AON_RTC_CH2

Selects AON_RTC_CH2

0x01

AUX_COMPA

Selects AUX_COMPA

0x02

AUX_COMPB

Selects AUX_COMPB

0x03

ISRC_RESET

Selects ISRC_RESET

0x04

TIMER0_EV

Selects TIMER0_EV

0x05

TIMER1_EV

Selects TIMER1_EV

0x06

SMPH_AUTOTAKE_DONE

Selects SMPH_AUTOTAKE_DONE

0x07

ADC_DONE

Selects ADC_DONE

0x08

ADC_FIFO_ALMOST_FULL

Selects ADC_FIFO_ALMOST_FULL

0x09

OBSMUX0

Selects OBSMUX0

0x0A

OBSMUX1

Selects OBSMUX1

0x0B

AON_SW

Selects AON_SW

0x0C

AON_PROG_WU

Selects AON_PROG_WU

0x0D

AUXIO0

Selects AUXIO0

0x0E

AUXIO1

Selects AUXIO1

0x0F

AUXIO2

Selects AUXIO2

0x10

AUXIO3

Selects AUXIO3

0x11

AUXIO4

Selects AUXIO4

0x12

AUXIO5

Selects AUXIO5

0x13

AUXIO6

Selects AUXIO6

0x14

AUXIO7

Selects AUXIO7

0x15

AUXIO8

Selects AUXIO8

0x16

AUXIO9

Selects AUXIO9

0x17

AUXIO10

Selects AUXIO10

0x18

AUXIO11

Selects AUXIO11

0x19

AUXIO12

Selects AUXIO12

0x1A

AUXIO13

Selects AUXIO13

0x1B

AUXIO14

Selects AUXIO14

0x1C

AUXIO15

Selects AUXIO15

0x1D

ACLK_REF

Selects ACLK_REF

0x1E

MCU_EV

Selects MCU_EV

0x1F

TDC_PRE

Selects TDC_PRE

RW

0x00



TOP:AUX_TDC:TRIGCNT

Address offset

0x0000 0014

Physical address

0x400C 4014

Instance

AUX_TDCIF

Description

Trigger Counter

Stop counter status/control of TDC

Type

RW

Bits

Field Name

Description

Type

Reset

31:16

Reserved

Software should not rely on the value of a reserved. Writing any other value than the reset value may result in undefined behavior.(RO std text)

RO

0x0000

15:0

CNT

Remaining number of stop events that will be ignored. Writing to this register updates the value. The CNT will be loaded with the value of TRIGCNTLOAD.CNT at the start of every measurement.

When the stop counter is enabled the first CNT-1 stop events is ignored after which the TDC will stop measurement on event number CNT

Note! Must not be changed if STAT.STATE is not IDLE

RW

0x0000



TOP:AUX_TDC:TRIGCNTLOAD

Address offset

0x0000 0018

Physical address

0x400C 4018

Instance

AUX_TDCIF

Description

Trigger Counter Load

Stop counter control of TDC

Type

RW

Bits

Field Name

Description

Type

Reset

31:16

Reserved

Software should not rely on the value of a reserved. Writing any other value than the reset value may result in undefined behavior.(RO std text)

RO

0x0000

15:0

CNT

Selects the number of stop events that will be ignored by the TDC. This can be used to measure multiple periods of a clock signal. The value written to this field is loaded into the stop counter at the start of each measurement.

Note! Both values 0 and 1 will make the TDC stop on the first event after the start event

Note! Must not be changed if STAT.STATE is not IDLE

RW

0x0000



TOP:AUX_TDC:TRIGCNTCFG

Address offset

0x0000 001C

Physical address

0x400C 401C

Instance

AUX_TDCIF

Description

Trigger Counter Configuration

Type

RW

Bits

Field Name

Description

Type

Reset

31:1

Reserved

Software should not rely on the value of a reserved. Writing any other value than the reset value may result in undefined behavior.(RO std text)

RO

0x0000 0000

0

EN

Stop counter enable

0: Stop counter is disabled
1: Stop counter is enabled

RW

0



TOP:AUX_TDC:PRECTL

Address offset

0x0000 0020

Physical address

0x400C 4020

Instance

AUX_TDCIF

Description

Prescaler Control

The prescaler can be used to count events that are faster than the AUX clock speed. It can be used standalone or as a start/stop source for the TDC by configuring TRIGSRC.START_SRC and TRIGSRC.STOP_SRC to TDC_PRE. When counting fast signals with the TDC that are faster than 1/10th of the clock frequency of AUX it is recommended to use the prescaler.

Type

RW

Bits

Field Name

Description

Type

Reset

31:8

Reserved

Software should not rely on the value of a reserved. Writing any other value than the reset value may result in undefined behavior.(RO std text)

RO

0x00 0000

7

RESET_N

Prescaler reset control

0: Prescaler is held in reset
1: Prescaler is not held in reset

RW

0

6

RATIO

Prescaler ratio. This controls how often an event is generated on the TDC_PRE line. After the prescaler is reset the event output TDC_PRE is 0.

Value

ENUM name

Description

0

DIV16

Prescaler divides by 16. A rising edge on the output is generated for every 16 rising edges of the input (the output toggles on every 8th rising edge of the input).

1

DIV64

Prescaler divides by 64. A rising edge on the output is generated for every 64 rising edges of the input (the output toggles on every 32th rising edge of the input). .

RW

0

5

Reserved

Software should not rely on the value of a reserved. Writing any other value than the reset value may result in undefined behavior.(RO std text)

RO

0

4:0

SRC

Selects event for prescaler to use as input
Note! Only change when prescaler is in reset

Value

ENUM name

Description

0x00

AON_RTC_CH2

Selects AON_RTC_CH2

0x01

AUX_COMPA

Selects AUX_COMPA

0x02

AUX_COMPB

Selects AUX_COMPB

0x03

ISRC_RESET

Selects ISRC_RESET

0x04

TIMER0_EV

Selects TIMER0_EV

0x05

TIMER1_EV

Selects TIMER1_EV

0x06

SMPH_AUTOTAKE_DONE

Selects SMPH_AUTOTAKE_DONE

0x07

ADC_DONE

Selects ADC_DONE

0x08

ADC_FIFO_ALMOST_FULL

Selects ADC_FIFO_ALMOST_FULL

0x09

OBSMUX0

Selects OBSMUX0

0x0A

OBSMUX1

Selects OBSMUX1

0x0B

AON_SW

Selects AON_SW

0x0C

AON_PROG_WU

Selects AON_PROG_WU

0x0D

AUXIO0

Selects AUXIO0

0x0E

AUXIO1

Selects AUXIO1

0x0F

AUXIO2

Selects AUXIO2

0x10

AUXIO3

Selects AUXIO3

0x11

AUXIO4

Selects AUXIO4

0x12

AUXIO5

Selects AUXIO5

0x13

AUXIO6

Selects AUXIO6

0x14

AUXIO7

Selects AUXIO7

0x15

AUXIO8

Selects AUXIO8

0x16

AUXIO9

Selects AUXIO9

0x17

AUXIO10

Selects AUXIO10

0x18

AUXIO11

Selects AUXIO11

0x19

AUXIO12

Selects AUXIO12

0x1A

AUXIO13

Selects AUXIO13

0x1B

AUXIO14

Selects AUXIO14

0x1C

AUXIO15

Selects AUXIO15

0x1D

ACLK_REF

Selects ACLK_REF

0x1E

MCU_EV

Selects MCU_EV

0x1F

ADC_IRQ

Selects ADC_IRQ

RW

0x1F



TOP:AUX_TDC:PRECNT

Address offset

0x0000 0024

Physical address

0x400C 4024

Instance

AUX_TDCIF

Description

Prescaler Counter

Value of prescaler counter

Type

RW

Bits

Field Name

Description

Type

Reset

31:16

Reserved

Software should not rely on the value of a reserved. Writing any other value than the reset value may result in undefined behavior.(RO std text)

RO

0x0000

15:0

CNT

Writing to this register will latch the contents of the 16 bit prescaler counter (The value written is don't care).

Reading will return the latched value.

RW

0x0000