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ioc.c
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1 /******************************************************************************
2 * Filename: ioc.c
3 * Revised: 2015-01-13 16:59:55 +0100 (ti, 13 jan 2015)
4 * Revision: 42365
5 *
6 * Description: Driver for the IOC.
7 *
8 * Copyright (c) 2015, Texas Instruments Incorporated
9 * All rights reserved.
10 *
11 * Redistribution and use in source and binary forms, with or without
12 * modification, are permitted provided that the following conditions are met:
13 *
14 * 1) Redistributions of source code must retain the above copyright notice,
15 * this list of conditions and the following disclaimer.
16 *
17 * 2) Redistributions in binary form must reproduce the above copyright notice,
18 * this list of conditions and the following disclaimer in the documentation
19 * and/or other materials provided with the distribution.
20 *
21 * 3) Neither the name of the ORGANIZATION nor the names of its contributors may
22 * be used to endorse or promote products derived from this software without
23 * specific prior written permission.
24 *
25 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
26 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
27 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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37 ******************************************************************************/
38 
39 #include <driverlib/ioc.h>
40 
41 //*****************************************************************************
42 //
43 // Handle support for DriverLib in ROM:
44 // This section will undo prototype renaming made in the header file
45 //
46 //*****************************************************************************
47 #ifndef DRIVERLIB_GENERATE_ROM
48  #undef IOCPortConfigureSet
49  #define IOCPortConfigureSet NOROM_IOCPortConfigureSet
50  #undef IOCPortConfigureGet
51  #define IOCPortConfigureGet NOROM_IOCPortConfigureGet
52  #undef IOCIOShutdownSet
53  #define IOCIOShutdownSet NOROM_IOCIOShutdownSet
54  #undef IOCIOJTagSet
55  #define IOCIOJTagSet NOROM_IOCIOJTagSet
56  #undef IOCIOModeSet
57  #define IOCIOModeSet NOROM_IOCIOModeSet
58  #undef IOCIOIntSet
59  #define IOCIOIntSet NOROM_IOCIOIntSet
60  #undef IOCIOPortPullSet
61  #define IOCIOPortPullSet NOROM_IOCIOPortPullSet
62  #undef IOCIOHystSet
63  #define IOCIOHystSet NOROM_IOCIOHystSet
64  #undef IOCIOInputSet
65  #define IOCIOInputSet NOROM_IOCIOInputSet
66  #undef IOCIOSlewCtrlSet
67  #define IOCIOSlewCtrlSet NOROM_IOCIOSlewCtrlSet
68  #undef IOCIODrvStrengthSet
69  #define IOCIODrvStrengthSet NOROM_IOCIODrvStrengthSet
70  #undef IOCIOPortIdSet
71  #define IOCIOPortIdSet NOROM_IOCIOPortIdSet
72  #undef IOCIntEnable
73  #define IOCIntEnable NOROM_IOCIntEnable
74  #undef IOCIntDisable
75  #define IOCIntDisable NOROM_IOCIntDisable
76  #undef IOCPinTypeGpioInput
77  #define IOCPinTypeGpioInput NOROM_IOCPinTypeGpioInput
78  #undef IOCPinTypeGpioOutput
79  #define IOCPinTypeGpioOutput NOROM_IOCPinTypeGpioOutput
80  #undef IOCPinTypeUart
81  #define IOCPinTypeUart NOROM_IOCPinTypeUart
82  #undef IOCPinTypeSsiMaster
83  #define IOCPinTypeSsiMaster NOROM_IOCPinTypeSsiMaster
84  #undef IOCPinTypeSsiSlave
85  #define IOCPinTypeSsiSlave NOROM_IOCPinTypeSsiSlave
86  #undef IOCPinTypeI2c
87  #define IOCPinTypeI2c NOROM_IOCPinTypeI2c
88  #undef IOCPinTypeSpis
89  #define IOCPinTypeSpis NOROM_IOCPinTypeSpis
90  #undef IOCPinTypeAux
91  #define IOCPinTypeAux NOROM_IOCPinTypeAux
92 #endif
93 
94 //*****************************************************************************
95 //
96 // This is the mapping between an IO and the corresponding configuration
97 // register.
98 //
99 //*****************************************************************************
100 static const uint32_t g_pui32IOCfgReg[] =
101 {
109 };
110 
111 //*****************************************************************************
112 //
114 //
115 //*****************************************************************************
116 void
117 IOCPortConfigureSet(uint32_t ui32IOId, uint32_t ui32PortId,
118  uint32_t ui32IOConfig)
119 {
120  uint32_t ui32Reg;
121 
122  //
123  // Check the arguments.
124  //
125  ASSERT(ui32IOId <= IOID_31);
126  ASSERT(ui32PortId <= IOC_PORT_RFC_SMI_CL_IN);
127 
128  //
129  // Get the register address.
130  //
131  ui32Reg = IOC_BASE + g_pui32IOCfgReg[ui32IOId];
132 
133  //
134  // Configure the port.
135  //
136  HWREG(ui32Reg) = ui32IOConfig | ui32PortId;
137 }
138 
139 //*****************************************************************************
140 //
142 //
143 //*****************************************************************************
144 uint32_t
145 IOCPortConfigureGet(uint32_t ui32IOId)
146 {
147  uint32_t ui32Reg;
148 
149  //
150  // Check the arguments.
151  //
152  ASSERT(ui32IOId <= IOID_31);
153 
154  //
155  // Get the register address.
156  //
157  ui32Reg = IOC_BASE + g_pui32IOCfgReg[ui32IOId];
158 
159  //
160  // Return the IO configuration.
161  //
162  return HWREG(ui32Reg);
163 }
164 
165 //*****************************************************************************
166 //
168 //
169 //*****************************************************************************
170 void
171 IOCIOShutdownSet(uint32_t ui32IOId, uint32_t ui32IOShutdown)
172 {
173  uint32_t ui32Reg;
174  uint32_t ui32Config;
175 
176  //
177  // Check the arguments.
178  //
179  ASSERT(ui32IOId <= IOID_31);
180  ASSERT((ui32IOShutdown == IOC_NO_WAKE_UP) ||
181  (ui32IOShutdown == IOC_WAKE_ON_LOW) ||
182  (ui32IOShutdown == IOC_WAKE_ON_HIGH));
183 
184  //
185  // Get the register address.
186  //
187  ui32Reg = IOC_BASE + g_pui32IOCfgReg[ui32IOId];
188 
189  //
190  // Configure the IO.
191  //
192  ui32Config = HWREG(ui32Reg);
193  ui32Config &= ~IOC_IOCFG0_WU_CFG_M;
194  HWREG(ui32Reg) = ui32Config | ui32IOShutdown;
195 }
196 
197 
198 //*****************************************************************************
199 //
201 //
202 //*****************************************************************************
203 void
204 IOCIOModeSet(uint32_t ui32IOId, uint32_t ui32IOMode)
205 {
206  uint32_t ui32Reg;
207  uint32_t ui32Config;
208 
209  //
210  // Check the arguments.
211  //
212  ASSERT(ui32IOId <= IOID_31);
213  ASSERT((ui32IOMode == IOC_IOMODE_NORMAL) ||
214  (ui32IOMode == IOC_IOMODE_INV) ||
215  (ui32IOMode == IOC_IOMODE_OPEN_DRAIN_NORMAL) ||
216  (ui32IOMode == IOC_IOMODE_OPEN_DRAIN_INV) ||
217  (ui32IOMode == IOC_IOMODE_OPEN_SRC_NORMAL) ||
218  (ui32IOMode == IOC_IOMODE_OPEN_SRC_INV));
219 
220  //
221  // Get the register address.
222  //
223  ui32Reg = IOC_BASE + g_pui32IOCfgReg[ui32IOId];
224 
225  //
226  // Configure the IO.
227  //
228  ui32Config = HWREG(ui32Reg);
229  ui32Config &= ~IOC_IOCFG0_IOMODE_M;
230  HWREG(ui32Reg) = ui32Config | ui32IOMode;
231 }
232 
233 //*****************************************************************************
234 //
236 //
237 //*****************************************************************************
238 void
239 IOCIOIntSet(uint32_t ui32IOId, uint32_t ui32Int, uint32_t ui32EdgeDet)
240 {
241  uint32_t ui32IOReg;
242  uint32_t ui32Config;
243 
244  //
245  // Check the arguments.
246  //
247  ASSERT(ui32IOId <= IOID_31);
248  ASSERT((ui32Int == IOC_INT_ENABLE) ||
249  (ui32Int == IOC_INT_DISABLE));
250  ASSERT((ui32EdgeDet == IOC_NO_EDGE) ||
251  (ui32EdgeDet == IOC_FALLING_EDGE) ||
252  (ui32EdgeDet == IOC_RISING_EDGE) ||
253  (ui32EdgeDet == IOC_BOTH_EDGES));
254 
255  //
256  // Get the register address.
257  //
258  ui32IOReg = IOC_BASE + g_pui32IOCfgReg[ui32IOId];
259 
260  //
261  // Configure the IO.
262  //
263  ui32Config = HWREG(ui32IOReg);
265  HWREG(ui32IOReg) = ui32Config | ((ui32Int ? IOC_IOCFG0_EDGE_IRQ_EN : 0) | ui32EdgeDet);
266 }
267 
268 //*****************************************************************************
269 //
271 //
272 //*****************************************************************************
273 void
274 IOCIOPortPullSet(uint32_t ui32IOId, uint32_t ui32Pull)
275 {
276  uint32_t ui32IOReg;
277  uint32_t ui32Config;
278 
279  //
280  // Check the argument.
281  //
282  ASSERT(ui32IOId <= IOID_31);
283  ASSERT((ui32Pull == IOC_NO_IOPULL) ||
284  (ui32Pull == IOC_IOPULL_UP) ||
285  (ui32Pull == IOC_IOPULL_DOWN));
286 
287  //
288  // Get the register address.
289  //
290  ui32IOReg = IOC_BASE + g_pui32IOCfgReg[ui32IOId];
291 
292  //
293  // Configure the IO.
294  //
295  ui32Config = HWREG(ui32IOReg);
296  ui32Config &= ~IOC_IOCFG0_PULL_CTL_M;
297  HWREG(ui32IOReg) = ui32Config | ui32Pull;
298 }
299 
300 //*****************************************************************************
301 //
303 //
304 //*****************************************************************************
305 void
306 IOCIOHystSet(uint32_t ui32IOId, uint32_t ui32Hysteresis)
307 {
308  uint32_t ui32IOReg;
309  uint32_t ui32Config;
310 
311  //
312  // Check the arguments.
313  //
314  ASSERT(ui32IOId <= IOID_31);
315  ASSERT((ui32Hysteresis == IOC_HYST_ENABLE) ||
316  (ui32Hysteresis == IOC_HYST_DISABLE));
317 
318  //
319  // Get the register address.
320  //
321  ui32IOReg = IOC_BASE + g_pui32IOCfgReg[ui32IOId];
322 
323  //
324  // Configure the IO.
325  //
326  ui32Config = HWREG(ui32IOReg);
327  ui32Config &= ~IOC_IOCFG0_HYST_EN;
328  HWREG(ui32IOReg) = ui32Config | ui32Hysteresis;
329 }
330 
331 //*****************************************************************************
332 //
334 //
335 //*****************************************************************************
336 void
337 IOCIOInputSet(uint32_t ui32IOId, uint32_t ui32Input)
338 {
339  uint32_t ui32IOReg;
340  uint32_t ui32Config;
341 
342  //
343  // Check the arguments.
344  //
345  ASSERT(ui32IOId <= IOID_31);
346  ASSERT((ui32Input == IOC_INPUT_ENABLE) ||
347  (ui32Input == IOC_INPUT_DISABLE));
348 
349  //
350  // Get the register address.
351  //
352  ui32IOReg = IOC_BASE + g_pui32IOCfgReg[ui32IOId];
353 
354  //
355  // Configure the IO.
356  //
357  ui32Config = HWREG(ui32IOReg);
358  ui32Config &= ~IOC_IOCFG0_IE;
359  HWREG(ui32IOReg) = ui32Config | ui32Input;
360 }
361 
362 //*****************************************************************************
363 //
365 //
366 //*****************************************************************************
367 void
368 IOCIOSlewCtrlSet(uint32_t ui32IOId, uint32_t ui32SlewEnable)
369 {
370  uint32_t ui32IOReg;
371  uint32_t ui32Config;
372 
373  //
374  // Check the arguments.
375  //
376  ASSERT(ui32IOId <= IOID_31);
377  ASSERT((ui32SlewEnable == IOC_SLEW_ENABLE) ||
378  (ui32SlewEnable == IOC_SLEW_DISABLE));
379 
380  //
381  // Get the register address.
382  //
383  ui32IOReg = IOC_BASE + g_pui32IOCfgReg[ui32IOId];
384 
385  //
386  // Configure the IO.
387  //
388  ui32Config = HWREG(ui32IOReg);
389  ui32Config &= ~IOC_IOCFG0_SLEW_RED;
390  HWREG(ui32IOReg) = ui32Config | ui32SlewEnable;
391 }
392 
393 //*****************************************************************************
394 //
396 //
397 //*****************************************************************************
398 void
399 IOCIODrvStrengthSet(uint32_t ui32IOId, uint32_t ui32IOCurrent,
400  uint32_t ui32DrvStrength)
401 {
402  uint32_t ui32IOReg;
403  uint32_t ui32Config;
404 
405  //
406  // Check the arguments.
407  //
408  ASSERT(ui32IOId <= IOID_31);
409  ASSERT((ui32IOCurrent == IOC_CURRENT_2MA) ||
410  (ui32IOCurrent == IOC_CURRENT_4MA) ||
411  (ui32IOCurrent == IOC_CURRENT_8MA) ||
412  (ui32IOCurrent == IOC_CURRENT_16MA));
413  ASSERT((ui32DrvStrength == IOC_STRENGTH_MIN) ||
414  (ui32DrvStrength == IOC_STRENGTH_MAX) ||
415  (ui32DrvStrength == IOC_STRENGTH_MED) ||
416  (ui32DrvStrength == IOC_STRENGTH_AUTO));
417 
418  //
419  // Get the register address.
420  //
421  ui32IOReg = IOC_BASE + g_pui32IOCfgReg[ui32IOId];
422 
423  //
424  // Configure the IO.
425  //
426  ui32Config = HWREG(ui32IOReg);
427  ui32Config &= ~(IOC_IOCFG0_IOCURR_M | IOC_IOCFG0_IOSTR_M);
428  HWREG(ui32IOReg) = ui32Config | (ui32IOCurrent | ui32DrvStrength);
429 }
430 
431 //*****************************************************************************
432 //
434 //
435 //*****************************************************************************
436 void
437 IOCIOPortIdSet(uint32_t ui32IOId, uint32_t ui32PortId)
438 {
439  uint32_t ui32IOReg;
440  uint32_t ui32Config;
441 
442  //
443  // Check the arguments.
444  //
445  ASSERT(ui32IOId <= IOID_31);
446  ASSERT(ui32PortId <= IOC_PORT_RFC_SMI_CL_IN);
447 
448  //
449  // Get the register address.
450  //
451  ui32IOReg = IOC_BASE + g_pui32IOCfgReg[ui32IOId];
452 
453  //
454  // Configure the IO.
455  //
456  ui32Config = HWREG(ui32IOReg);
457  ui32Config &= ~IOC_IOCFG0_PORT_ID_M;
458  HWREG(ui32IOReg) = ui32Config | ui32PortId;
459 }
460 
461 //*****************************************************************************
462 //
464 //
465 //*****************************************************************************
466 void
467 IOCIntEnable(uint32_t ui32IOId)
468 {
469  uint32_t ui32IOReg;
470  uint32_t ui32Config;
471 
472  //
473  // Check the arguments.
474  //
475  ASSERT(ui32IOId <= IOID_31);
476 
477  //
478  // Get the register address.
479  //
480  ui32IOReg = IOC_BASE + g_pui32IOCfgReg[ui32IOId];
481 
482  //
483  // Enable the specified interrupt.
484  //
485  ui32Config = HWREG(ui32IOReg);
486  ui32Config |= IOC_IOCFG0_EDGE_IRQ_EN;
487  HWREG(ui32IOReg) = ui32Config;
488 }
489 
490 //*****************************************************************************
491 //
493 //
494 //*****************************************************************************
495 void
496 IOCIntDisable(uint32_t ui32IOId)
497 {
498  uint32_t ui32IOReg;
499  uint32_t ui32Config;
500 
501  //
502  // Check the arguments.
503  //
504  ASSERT(ui32IOId <= IOID_31);
505 
506  //
507  // Get the register address.
508  //
509  ui32IOReg = IOC_BASE + g_pui32IOCfgReg[ui32IOId];
510 
511  //
512  // Disable the specified interrupt.
513  //
514  ui32Config = HWREG(ui32IOReg);
515  ui32Config &= ~IOC_IOCFG0_EDGE_IRQ_EN;
516  HWREG(ui32IOReg) = ui32Config;
517 }
518 
519 //*****************************************************************************
520 //
522 //
523 //*****************************************************************************
524 void
525 IOCPinTypeGpioInput(uint32_t ui32IOId)
526 {
527  //
528  // Check the arguments.
529  //
530  ASSERT(ui32IOId <= IOID_31);
531 
532  //
533  // Setup the IO for standard input.
534  //
536 
537  //
538  // Enable input mode in the GPIO module.
539  //
540  GPIODirModeSet(1 << ui32IOId, GPIO_DIR_MODE_IN);
541 }
542 
543 //*****************************************************************************
544 //
546 //
547 //*****************************************************************************
548 void
549 IOCPinTypeGpioOutput(uint32_t ui32IOId)
550 {
551  //
552  // Check the arguments.
553  //
554  ASSERT(ui32IOId <= IOID_31);
555 
556  //
557  // Setup the IO for standard input.
558  //
560 
561  //
562  // Enable output mode in the GPIO module.
563  //
564  GPIODirModeSet(1 << ui32IOId, GPIO_DIR_MODE_OUT);
565 }
566 
567 //*****************************************************************************
568 //
570 //
571 //*****************************************************************************
572 void
573 IOCPinTypeUart(uint32_t ui32Base, uint32_t ui32Rx, uint32_t ui32Tx,
574  uint32_t ui32Cts, uint32_t ui32Rts)
575 {
576  //
577  // Check the arguments.
578  //
579  ASSERT(ui32Base == UART0_BASE);
580  ASSERT((ui32Rx <= IOID_31) || (ui32Rx == IOID_UNUSED));
581  ASSERT((ui32Tx <= IOID_31) || (ui32Tx == IOID_UNUSED));
582  ASSERT((ui32Cts <= IOID_31) || (ui32Cts == IOID_UNUSED));
583  ASSERT((ui32Rts <= IOID_31) || (ui32Rts == IOID_UNUSED));
584 
585  //
586  // Setup the IOs in the desired configuration.
587  //
588  if(ui32Rx != IOID_UNUSED)
589  {
591  }
592  if(ui32Tx != IOID_UNUSED)
593  {
595  }
596  if(ui32Cts != IOID_UNUSED)
597  {
599  }
600  if(ui32Rts != IOID_UNUSED)
601  {
603  }
604 }
605 
606 //*****************************************************************************
607 //
609 //
610 //*****************************************************************************
611 void
612 IOCPinTypeSsiMaster(uint32_t ui32Base, uint32_t ui32Rx,
613  uint32_t ui32Tx, uint32_t ui32Fss,
614  uint32_t ui32Clk)
615 {
616  //
617  // Check the arguments.
618  //
619  ASSERT((ui32Base == SSI0_BASE) || (ui32Base == SSI1_BASE));
620  ASSERT((ui32Rx <= IOID_31) || (ui32Rx == IOID_UNUSED));
621  ASSERT((ui32Tx <= IOID_31) || (ui32Tx == IOID_UNUSED));
622  ASSERT((ui32Fss <= IOID_31) || (ui32Fss == IOID_UNUSED));
623  ASSERT((ui32Clk <= IOID_31) || (ui32Clk == IOID_UNUSED));
624 
625  //
626  // Setup the IOs in the desired configuration.
627  //
628  if(ui32Base == SSI0_BASE)
629  {
630  if(ui32Rx != IOID_UNUSED)
631  {
633  }
634  if(ui32Tx != IOID_UNUSED)
635  {
637  }
638  if(ui32Fss != IOID_UNUSED)
639  {
641  }
642  if(ui32Clk != IOID_UNUSED)
643  {
645  }
646  }
647  else
648  {
649  if(ui32Rx != IOID_UNUSED)
650  {
652  }
653  if(ui32Tx != IOID_UNUSED)
654  {
656  }
657  if(ui32Fss != IOID_UNUSED)
658  {
660  }
661  if(ui32Clk != IOID_UNUSED)
662  {
664  }
665  }
666 }
667 
668 //*****************************************************************************
669 //
671 //
672 //*****************************************************************************
673 void
674 IOCPinTypeSsiSlave(uint32_t ui32Base, uint32_t ui32Rx,
675  uint32_t ui32Tx, uint32_t ui32Fss,
676  uint32_t ui32Clk)
677 {
678  //
679  // Check the arguments.
680  //
681  ASSERT((ui32Base == SSI0_BASE) || (ui32Base == SSI1_BASE));
682  ASSERT((ui32Rx <= IOID_31) || (ui32Rx == IOID_UNUSED));
683  ASSERT((ui32Tx <= IOID_31) || (ui32Tx == IOID_UNUSED));
684  ASSERT((ui32Fss <= IOID_31) || (ui32Fss == IOID_UNUSED));
685  ASSERT((ui32Clk <= IOID_31) || (ui32Clk == IOID_UNUSED));
686 
687  //
688  // Setup the IOs in the desired configuration.
689  //
690  if(ui32Base == SSI0_BASE)
691  {
692  if(ui32Rx != IOID_UNUSED)
693  {
695  }
696  if(ui32Tx != IOID_UNUSED)
697  {
699  }
700  if(ui32Fss != IOID_UNUSED)
701  {
703  }
704  if(ui32Clk != IOID_UNUSED)
705  {
707  }
708  }
709  else
710  {
711  if(ui32Rx != IOID_UNUSED)
712  {
714  }
715  if(ui32Tx != IOID_UNUSED)
716  {
718  }
719  if(ui32Fss != IOID_UNUSED)
720  {
722  }
723  if(ui32Clk != IOID_UNUSED)
724  {
726  }
727  }
728 }
729 
730 //*****************************************************************************
731 //
733 //
734 //*****************************************************************************
735 void
736 IOCPinTypeI2c(uint32_t ui32Base, uint32_t ui32Data, uint32_t ui32Clk)
737 {
738  uint32_t ui32IOConfig;
739 
740  //
741  // Check the arguments.
742  //
743  ASSERT((ui32Data <= IOID_31) || (ui32Data == IOID_UNUSED));
744  ASSERT((ui32Clk <= IOID_31) || (ui32Clk == IOID_UNUSED));
745 
746  //
747  // Define the IO configuration parameters.
748  //
749  ui32IOConfig = IOC_CURRENT_2MA | IOC_STRENGTH_AUTO | IOC_IOPULL_UP |
753 
754  //
755  // Setup the IOs in the desired configuration.
756  //
757  IOCPortConfigureSet(ui32Data, IOC_PORT_MCU_I2C_MSSDA, ui32IOConfig);
758  IOCPortConfigureSet(ui32Clk, IOC_PORT_MCU_I2C_MSSCL, ui32IOConfig);
759 }
760 
761 //*****************************************************************************
762 //
764 //
765 //*****************************************************************************
766 void
767 IOCPinTypeSpis(uint32_t ui32Rx, uint32_t ui32Tx, uint32_t ui32Fss,
768  uint32_t ui32Clk)
769 {
770  //
771  // Check the arguments.
772  //
773  ASSERT((ui32Rx <= IOID_31) || (ui32Rx == IOID_UNUSED));
774  ASSERT((ui32Tx <= IOID_31) || (ui32Tx == IOID_UNUSED));
775  ASSERT((ui32Fss <= IOID_31) || (ui32Fss == IOID_UNUSED));
776  ASSERT((ui32Clk <= IOID_31) || (ui32Clk == IOID_UNUSED));
777 
778  //
779  // Setup the IOs in the desired configuration.
780  //
781  if(ui32Rx != IOID_UNUSED)
782  {
784  }
785  if(ui32Tx != IOID_UNUSED)
786  {
788  }
789  if(ui32Fss != IOID_UNUSED)
790  {
792  }
793  if(ui32Clk != IOID_UNUSED)
794  {
796  }
797 }
798 
799 //*****************************************************************************
800 //
802 //
803 //*****************************************************************************
804 void
805 IOCPinTypeAux(uint32_t ui32IOId)
806 {
807  //
808  // Check the arguments.
809  //
810  ASSERT((ui32IOId <= IOID_31) || (ui32IOId == IOID_UNUSED));
811 
812  //
813  // Setup the IO.
814  //
816 }
#define IOC_PORT_MCU_SSI1_RX
Definition: ioc.h:196
#define IOC_IOMODE_OPEN_SRC_INV
Definition: ioc.h:251
#define IOC_PORT_MCU_UART0_RTS
Definition: ioc.h:186
#define IOC_PORT_MCU_SSI1_TX
Definition: ioc.h:197
#define IOC_FALLING_EDGE
Definition: ioc.h:261
#define IOC_WAKE_ON_HIGH
Definition: ioc.h:235
void IOCIntDisable(uint32_t ui32IOId)
Disables individual IO edge interrupt sources.
Definition: ioc.c:496
#define IOC_INPUT_ENABLE
Definition: ioc.h:220
void IOCIOSlewCtrlSet(uint32_t ui32IOId, uint32_t ui32SlewEnable)
Enable/disable the slew control on an IO port.
Definition: ioc.c:368
#define IOC_PORT_MCU_I2C_MSSDA
Definition: ioc.h:181
void IOCPinTypeSsiMaster(uint32_t ui32Base, uint32_t ui32Rx, uint32_t ui32Tx, uint32_t ui32Fss, uint32_t ui32Clk)
Configure a set of IOs for standard SSI peripheral master control.
Definition: ioc.c:612
#define IOC_STRENGTH_MED
Definition: ioc.h:293
void IOCPinTypeI2c(uint32_t ui32Base, uint32_t ui32Data, uint32_t ui32Clk)
Configure a set of IOs for standard I2C peripheral control.
Definition: ioc.c:736
void IOCIOShutdownSet(uint32_t ui32IOId, uint32_t ui32IOShutdown)
Set wake-up on an IO port.
Definition: ioc.c:171
#define IOC_IOMODE_OPEN_DRAIN_INV
Definition: ioc.h:246
#define IOC_STRENGTH_MAX
Definition: ioc.h:291
#define IOC_IOMODE_OPEN_SRC_NORMAL
Definition: ioc.h:249
#define IOC_PORT_AON_SCK
Definition: ioc.h:172
#define IOC_CURRENT_16MA
Definition: ioc.h:287
#define IOC_PORT_MCU_SSI1_CLK
Definition: ioc.h:199
#define ASSERT(expr)
Definition: debug.h:65
#define IOC_IOPULL_DOWN
Definition: ioc.h:275
#define IOC_PORT_AUX_IO
Definition: ioc.h:176
#define IOID_UNUSED
Definition: ioc.h:154
__STATIC_INLINE void GPIODirModeSet(uint32_t ui32Pins, uint32_t ui32Dir)
Sets the direction of the specified pin(s).
Definition: gpio.h:149
#define GPIO_DIR_MODE_OUT
Definition: gpio.h:121
#define IOC_BOTH_EDGES
Definition: ioc.h:263
#define IOC_STD_INPUT
Definition: ioc.h:302
#define IOC_PORT_GPIO
Definition: ioc.h:170
#define IOC_IOPULL_UP
Definition: ioc.h:274
#define IOC_PORT_MCU_I2C_MSSCL
Definition: ioc.h:182
void IOCPinTypeSsiSlave(uint32_t ui32Base, uint32_t ui32Rx, uint32_t ui32Tx, uint32_t ui32Fss, uint32_t ui32Clk)
Configure a set of IOs for standard SSI peripheral slave control.
Definition: ioc.c:674
void IOCIOHystSet(uint32_t ui32IOId, uint32_t ui32Hysteresis)
Configure hysteresis on and IO port.
Definition: ioc.c:306
void IOCIOInputSet(uint32_t ui32IOId, uint32_t ui32Input)
Enable/disable IO port as input.
Definition: ioc.c:337
void IOCIntEnable(uint32_t ui32IOId)
Enables individual IO edge detect interrupt.
Definition: ioc.c:467
#define IOC_IOMODE_INV
Definition: ioc.h:243
#define IOC_PORT_AON_SCS
Definition: ioc.h:171
#define IOC_STD_OUTPUT
Definition: ioc.h:308
void IOCIODrvStrengthSet(uint32_t ui32IOId, uint32_t ui32IOCurrent, uint32_t ui32DrvStrength)
Configure the drive strength and maxium current of an IO port.
Definition: ioc.c:399
#define IOC_INT_DISABLE
Definition: ioc.h:265
#define IOC_PORT_MCU_SSI0_TX
Definition: ioc.h:178
#define IOC_PORT_MCU_UART0_TX
Definition: ioc.h:184
#define IOC_SLEW_ENABLE
Definition: ioc.h:218
#define IOC_RISING_EDGE
Definition: ioc.h:262
#define IOC_INPUT_DISABLE
Definition: ioc.h:221
void IOCPinTypeAux(uint32_t ui32IOId)
Configure an IO for AUX control.
Definition: ioc.c:805
#define IOC_NO_WAKE_UP
Definition: ioc.h:233
#define IOC_PORT_MCU_SSI1_FSS
Definition: ioc.h:198
#define IOC_WAKE_ON_LOW
Definition: ioc.h:234
void IOCIOIntSet(uint32_t ui32IOId, uint32_t ui32Int, uint32_t ui32EdgeDet)
Setup interrupt detection on an IO Port.
Definition: ioc.c:239
#define IOC_PORT_AON_SDO
Definition: ioc.h:174
uint32_t IOCPortConfigureGet(uint32_t ui32IOId)
Get the configuration of an IO port.
Definition: ioc.c:145
#define IOC_PORT_MCU_SSI0_CLK
Definition: ioc.h:180
#define IOC_STRENGTH_MIN
Definition: ioc.h:295
#define IOC_CURRENT_2MA
Definition: ioc.h:284
void IOCPortConfigureSet(uint32_t ui32IOId, uint32_t ui32PortId, uint32_t ui32IOConfig)
Set the configuration of an IO port.
Definition: ioc.c:117
#define IOC_NO_EDGE
Definition: ioc.h:260
void IOCPinTypeGpioOutput(uint32_t ui32IOId)
Setup an IO for standard GPIO output.
Definition: ioc.c:549
#define IOC_PORT_MCU_SSI0_RX
Definition: ioc.h:177
#define GPIO_DIR_MODE_IN
Definition: gpio.h:120
void IOCIOPortIdSet(uint32_t ui32IOId, uint32_t ui32PortId)
Setup the Port ID for this IO.
Definition: ioc.c:437
#define IOC_IOMODE_OPEN_DRAIN_NORMAL
Definition: ioc.h:244
#define IOC_PORT_AON_SDI
Definition: ioc.h:173
#define IOC_HYST_ENABLE
Definition: ioc.h:222
void IOCPinTypeGpioInput(uint32_t ui32IOId)
Setup an IO for standard GPIO input.
Definition: ioc.c:525
#define IOC_PORT_MCU_UART0_RX
Definition: ioc.h:183
#define IOC_SLEW_DISABLE
Definition: ioc.h:219
#define IOC_CURRENT_8MA
Definition: ioc.h:286
#define IOC_PORT_MCU_UART0_CTS
Definition: ioc.h:185
#define IOC_CURRENT_4MA
Definition: ioc.h:285
#define IOC_INT_ENABLE
Definition: ioc.h:264
#define IOC_STRENGTH_AUTO
Definition: ioc.h:289
#define IOC_HYST_DISABLE
Definition: ioc.h:223
#define IOID_31
Definition: ioc.h:153
#define IOC_IOMODE_NORMAL
Definition: ioc.h:242
void IOCPinTypeUart(uint32_t ui32Base, uint32_t ui32Rx, uint32_t ui32Tx, uint32_t ui32Cts, uint32_t ui32Rts)
Configure a set of IOs for standard UART peripheral control.
Definition: ioc.c:573
#define IOC_PORT_MCU_SSI0_FSS
Definition: ioc.h:179
#define IOC_NO_IOPULL
Definition: ioc.h:273
void IOCIOModeSet(uint32_t ui32IOId, uint32_t ui32IOMode)
Set the IO Mode of an IO Port.
Definition: ioc.c:204
void IOCIOPortPullSet(uint32_t ui32IOId, uint32_t ui32Pull)
Set the pull on an IO port.
Definition: ioc.c:274
void IOCPinTypeSpis(uint32_t ui32Rx, uint32_t ui32Tx, uint32_t ui32Fss, uint32_t ui32Clk)
Configure a set of IOs for standard SPIS peripheral control.
Definition: ioc.c:767