DATA SHEET
CC2640 SimpleLink™ Bluetooth® Wireless MCU
1 Device Overview
1.1 Features
- Microcontroller
- Powerful ARM® Cortex®-M3
- EEMBC CoreMark® Score: 142
- Up to 48-MHz Clock Speed
- 128KB of In-System Programmable Flash
- 8KB of SRAM for Cache
- 20KB of Ultralow-Leakage SRAM
- 2-Pin cJTAG and JTAG Debugging
- Supports Over-The-Air Upgrade (OTA)
- Ultralow-Power Sensor Controller
- Can Run Autonomous From the Rest of the System
- 16-Bit Architecture
- 2KB of Ultralow-Leakage SRAM for Code and Data
- Efficient Code Size Architecture, Placing Drivers, Bluetooth® Low Energy Controller, and Bootloader in ROM
- RoHS-Compliant Packages
- 4-mm × 4-mm RSM VQFN32 (10 GPIOs)
- 5-mm × 5-mm RHB VQFN32 (15 GPIOs)
- 7-mm × 7-mm RGZ VQFN48 (31 GPIOs)
- Peripherals
- All Digital Peripheral Pins Can Be Routed to Any GPIO
- Four General-Purpose Timer Modules
(Eight 16-Bit or Four 32-Bit Timers, PWM Each) - 12-Bit ADC, 200-ksamples/s, 8-Channel Analog MUX
- Continuous Time Comparator
- Ultralow-Power Analog Comparator
- Programmable Current Source
- UART
- 2× SSI (SPI, MICROWIRE, TI)
- I2C
- I2S
- Real-Time Clock (RTC)
- AES-128 Security Module
- True Random Number Generator (TRNG)
- 10, 15, or 31 GPIOs, Depending on Package Option
- Support for Eight Capacitive-Sensing Buttons
- Integrated Temperature Sensor
- External System
- On-Chip internal DC-DC Converter
- Very Few External Components
- Seamless Integration With the SimpleLink™ CC2590 and CC2592 Range Extenders
- Pin Compatible With the SimpleLink CC13xx in 4-mm × 4-mm and 5-mm × 5-mm VQFN Packages
- Low Power
- Wide Supply Voltage Range
- Normal Operation: 1.8 to 3.8 V
- External Regulator Mode: 1.7 to 1.95 V
- Active-Mode RX: 5.9 mA
- Active-Mode TX at 0 dBm: 6.1 mA
- Active-Mode TX at +5 dBm: 9.1 mA
- Active-Mode MCU: 61 µA/MHz
- Active-Mode MCU: 48.5 CoreMark/mA
- Active-Mode Sensor Controller: 8.2 µA/MHz
- Standby: 1 µA (RTC Running and RAM/CPU Retention)
- Shutdown: 100 nA (Wake Up on External Events)
- Wide Supply Voltage Range
- RF Section
- 2.4-GHz RF Transceiver Compatible With Bluetooth Low Energy (BLE) 4.2 Specification
- Excellent Receiver Sensitivity (–97 dBm for BLE), Selectivity, and Blocking Performance
- Link budget of 102 dB for BLE
- Programmable Output Power up to +5 dBm
- Single-Ended or Differential RF Interface
- Suitable for Systems Targeting Compliance With Worldwide Radio Frequency Regulations
- ETSI EN 300 328 (Europe)
- EN 300 440 Class 2 (Europe)
- FCC CFR47 Part 15 (US)
- ARIB STD-T66 (Japan)
- Tools and Development Environment
- Full-Feature and Low-Cost Development Kits
- Multiple Reference Designs for Different RF Configurations
- Packet Sniffer PC Software
- Sensor Controller Studio
- SmartRF™ Studio
- SmartRF Flash Programmer 2
- IAR Embedded Workbench® for ARM
- Code Composer Studio™
1.2 Applications
- Home and Building Automation
- Connected Appliances
- Lighting
- Locks
- Gateways
- Security Systems
- Industrial
- Logistics
- Production and Manufacturing
- Automation
- Asset Tracking and Management
- Remote Display
- Cable Replacement
- HMI
- Access Control
- Retail
- Beacons
- Advertising
- ESL and Price Tags
- Point of Sales and Payment Systems
- Health and Medical
- Thermometers
- SpO2
- Blood Glucose and Pressure Meters
- Weight Scales
- Vitals Monitoring
- Hearing Aids
- Sports and Fitness
- Activity Monitors and Fitness Trackers
- Heart Rate Monitors
- Running Sensors
- Biking Sensors
- Sports Watches
- Gym Equipment
- Team Sports Equipment
- HID
- Remote Controls
- Keyboards and Mice
- Gaming
- Accessories
- Toys
- Trackers
- Luggage Tags
- Wearables
1.3 Description
The CC2640 device is a wireless MCU targeting Bluetooth applications.
The device is a member of the CC26xx family of cost-effective, ultralow power, 2.4-GHz RF devices. Very low active RF and MCU current and low-power mode current consumption provide excellent battery lifetime and allow for operation on small coin cell batteries and in energy-harvesting applications.
The CC2640 device contains a 32-bit ARM Cortex-M3 processor that runs at 48 MHz as the main processor and a rich peripheral feature set that includes a unique ultralow power sensor controller. This sensor controller is ideal for interfacing external sensors and for collecting analog and digital data autonomously while the rest of the system is in sleep mode. Thus, the CC2640 device is ideal for a wide range of applications where long battery lifetime, small form factor, and ease of use is important.
The Bluetooth Low Energy controller is embedded into ROM and runs partly on an ARM Cortex-M0 processor. This architecture improves overall system performance and power consumption and frees up flash memory for the application.
The Bluetooth stack is available free of charge from www.ti.com.
Device Information(1)
| PART NUMBER | PACKAGE | BODY SIZE (NOM) |
|---|---|---|
| CC2640F128RGZ | VQFN (48) | 7.00 mm × 7.00 mm |
| CC2640F128RHB | VQFN (32) | 5.00 mm × 5.00 mm |
| CC2640F128RSM | VQFN (32) | 4.00 mm × 4.00 mm |
(1) For more information, see Section 9, Mechanical Packaging and Orderable Information.
1.3.1 Functional Block Diagram
Figure 1-1 shows a block diagram for the CC2640.
Figure 1-1 Block Diagram
2 Revision History
Changes from October 23, 2015 to July 5, 2016 (from A Revision () to B Revision)
- Added split VDDS supply rail feature Go
- Added 5-Mbps proprietary modeGo
- Added option for up to 80-Ω ESR when CL is 6 pF or lower Go
- Added tolerance for RCOSC_LF and RTC accuracy content Go
- Updated the Soc ADC internal voltage reference specification in Section 5.16 Go
- Moved all SSI parameters to Section 5.22 Go
- Added 0-dBm setting to the TX Current Consumption vs Supply Voltage (VDDS) graph Go
- Changed Figure 5-11, Receive Mode Current vs Supply Voltage (VDDS) Go
- Added Figure 5-21, Supply Current vs Temperature Go
Changes from February 15, 2015 to October 22, 2015 (from * Revision () to A Revision)
- Removed RHB package option from CC2620Go
- Added motional inductance recommendation to the 24-MHz XOSC table Go
- Added SPI timing parameters Go
- Added VOH and VOL min and max values for 4-mA and 8-mA load Go
- Added min and max values for VIH and VIL Go
- Added BLE Sensitivity vs Channel FrequencyGo
- Added RF Output Power vs Channel FrequencyGo
- Added Figure 5-11, Receive Mode Current vs Supply Voltage (VDDS)Go
- Changed Figure 5-20, SoC ADC ENOB vs Sampling Frequency (Input Frequency = FS / 10)Go
- Clarified Brown Out Detector status and functionality in the Power Modes table. Go
- Added application circuit schematics and layout for 5XD and 4XS Go
3 Device Comparison
Table 3-1 Device Family Overview
| DEVICE | PHY SUPPORT | FLASH (KB) | RAM (KB) | GPIO | PACKAGE(1) |
|---|---|---|---|---|---|
| CC2650F128xxx | Multi-Protocol(2) | 128 | 20 | 31, 15, 10 | RGZ, RHB, RSM |
| CC2640F128xxx | Bluetooth low energy (Normal) | 128 | 20 | 31, 15, 10 | RGZ, RHB, RSM |
| CC2630F128xxx | IEEE 802.15.4 (ZigBee®/6LoWPAN) | 128 | 20 | 31, 15, 10 | RGZ, RHB, RSM |
| CC2620F128xxx | IEEE 802.15.4 (RF4CE) | 128 | 20 | 31, 10 | RGZ, RSM |
(1) Package designator replaces the xxx in device name to form a complete device name, RGZ is 7-mm × 7-mm VQFN48, RHB is
5-mm × 5-mm VQFN32, and RSM is 4-mm × 4-mm VQFN32.
5-mm × 5-mm VQFN32, and RSM is 4-mm × 4-mm VQFN32.
(2) The CC2650 device supports all PHYs and can be reflashed to run all the supported standards.
3.1 Related Products
-
Wireless Connectivity The wireless connectivity portfolio offers a wide selection of low power RF solutions suitable for a broad range of application. The offerings range from fully customized solutions to turn key offerings with pre-certified hardware and software (protocol).
-
Sub-1 GHz Long-range, low power wireless connectivity solutions are offered in a wide range of Sub-1 GHz ISM bands.
-
Companion Products Review products that are frequently purchased or used in conjunction with this product.
-
SimpleLink™ CC2650 Wireless MCU LaunchPad™ Kit The CC2650 LaunchPad kit brings easy Bluetooth® Smart connectivity to the LaunchPad kit ecosystem with the SimpleLink ultra-low power CC26xx family of devices. This LaunchPad kit also supports development for multi-protocol support for the SimpleLink multi-standard CC2650 wireless MCU and the rest of CC26xx family of products: CC2630 wireless MCU for ZigBee®/6LoWPAN and CC2640 wireless MCU for Bluetooth® Smart.
-
Reference Designs for CC2640 TI Designs Reference Design Library is a robust reference design library spanning analog, embedded processor and connectivity. Created by TI experts to help you jump-start your system design, all TI Designs include schematic or block diagrams, BOMs and design files to speed your time to market. Search and download designs at ti.com/tidesigns.
4 Terminal Configuration and Functions
4.1 Pin Diagram – RGZ Package
NOTE:
I/O pins marked in bold have high drive capabilities. I/O pins marked in italics have analog capabilities.48-Pin VQFN
(7-mm × 7-mm) Pinout, 0.5-mm Pitch
4.2 Signal Descriptions – RGZ Package
Table 4-1 Signal Descriptions – RGZ Package
| NAME | NO. | TYPE | DESCRIPTION |
|---|---|---|---|
| DCDC_SW | 33 | Power | Output from internal DC-DC(1) |
| DCOUPL | 23 | Power | 1.27-V regulated digital-supply decoupling capacitor(2) |
| DIO_0 | 5 | Digital I/O | GPIO, Sensor Controller |
| DIO_1 | 6 | Digital I/O | GPIO, Sensor Controller |
| DIO_2 | 7 | Digital I/O | GPIO, Sensor Controller |
| DIO_3 | 8 | Digital I/O | GPIO, Sensor Controller |
| DIO_4 | 9 | Digital I/O | GPIO, Sensor Controller |
| DIO_5 | 10 | Digital I/O | GPIO, Sensor Controller, high-drive capability |
| DIO_6 | 11 | Digital I/O | GPIO, Sensor Controller, high-drive capability |
| DIO_7 | 12 | Digital I/O | GPIO, Sensor Controller, high-drive capability |
| DIO_8 | 14 | Digital I/O | GPIO |
| DIO_9 | 15 | Digital I/O | GPIO |
| DIO_10 | 16 | Digital I/O | GPIO |
| DIO_11 | 17 | Digital I/O | GPIO |
| DIO_12 | 18 | Digital I/O | GPIO |
| DIO_13 | 19 | Digital I/O | GPIO |
| DIO_14 | 20 | Digital I/O | GPIO |
| DIO_15 | 21 | Digital I/O | GPIO |
| DIO_16 | 26 | Digital I/O | GPIO, JTAG_TDO, high-drive capability |
| DIO_17 | 27 | Digital I/O | GPIO, JTAG_TDI, high-drive capability |
| DIO_18 | 28 | Digital I/O | GPIO |
| DIO_19 | 29 | Digital I/O | GPIO |
| DIO_20 | 30 | Digital I/O | GPIO |
| DIO_21 | 31 | Digital I/O | GPIO |
| DIO_22 | 32 | Digital I/O | GPIO |
| DIO_23 | 36 | Digital/Analog I/O | GPIO, Sensor Controller, Analog |
| DIO_24 | 37 | Digital/Analog I/O | GPIO, Sensor Controller, Analog |
| DIO_25 | 38 | Digital/Analog I/O | GPIO, Sensor Controller, Analog |
| DIO_26 | 39 | Digital/Analog I/O | GPIO, Sensor Controller, Analog |
| DIO_27 | 40 | Digital/Analog I/O | GPIO, Sensor Controller, Analog |
| DIO_28 | 41 | Digital/Analog I/O | GPIO, Sensor Controller, Analog |
| DIO_29 | 42 | Digital/Analog I/O | GPIO, Sensor Controller, Analog |
| DIO_30 | 43 | Digital/Analog I/O | GPIO, Sensor Controller, Analog |
| JTAG_TMSC | 24 | Digital I/O | JTAG TMSC, high-drive capability |
| JTAG_TCKC | 25 | Digital I/O | JTAG TCKC |
| RESET_N | 35 | Digital input | Reset, active-low. No internal pullup. |
| RF_P | 1 | RF I/O | Positive RF input signal to LNA during RX Positive RF output signal to PA during TX |
| RF_N | 2 | RF I/O | Negative RF input signal to LNA during RX Negative RF output signal to PA during TX |
| VDDR | 45 | Power | 1.7-V to 1.95-V supply, typically connect to output of internal DC-DC(2)(3) |
| VDDR_RF | 48 | Power | 1.7-V to 1.95-V supply, typically connect to output of internal DC-DC(2)(4) |
| VDDS | 44 | Power | 1.8-V to 3.8-V main chip supply(1) |
| VDDS2 | 13 | Power | 1.8-V to 3.8-V DIO supply(1) |
| VDDS3 | 22 | Power | 1.8-V to 3.8-V DIO supply(1) |
| VDDS_DCDC | 34 | Power | 1.8-V to 3.8-V DC-DC supply |
| X32K_Q1 | 3 | Analog I/O | 32-kHz crystal oscillator pin 1 |
| X32K_Q2 | 4 | Analog I/O | 32-kHz crystal oscillator pin 2 |
| X24M_N | 46 | Analog I/O | 24-MHz crystal oscillator pin 1 |
| X24M_P | 47 | Analog I/O | 24-MHz crystal oscillator pin 2 |
| EGP | Power | Ground – Exposed Ground Pad | |
(1) See technical reference manual (listed in Section 8.3) for more details.
(2) Do not supply external circuitry from this pin.
(3) If internal DC-DC is not used, this pin is supplied internally from the main LDO.
(4) If internal DC-DC is not used, this pin must be connected to VDDR for supply from the main LDO.
4.3 Pin Diagram – RHB Package
NOTE:
I/O pins marked in bold have high drive capabilities. I/O pins marked in italics have analog capabilities.32-Pin VQFN
(5-mm × 5-mm) Pinout, 0.5-mm Pitch
4.4 Signal Descriptions – RHB Package
Table 4-2 Signal Descriptions – RHB Package
| NAME | NO. | TYPE | DESCRIPTION |
|---|---|---|---|
| DCDC_SW | 17 | Power | Output from internal DC-DC(1) |
| DCOUPL | 12 | Power | 1.27-V regulated digital-supply decoupling(2) |
| DIO_0 | 6 | Digital I/O | GPIO, Sensor Controller |
| DIO_1 | 7 | Digital I/O | GPIO, Sensor Controller |
| DIO_2 | 8 | Digital I/O | GPIO, Sensor Controller, high-drive capability |
| DIO_3 | 9 | Digital I/O | GPIO, Sensor Controller, high-drive capability |
| DIO_4 | 10 | Digital I/O | GPIO, Sensor Controller, high-drive capability |
| DIO_5 | 15 | Digital I/O | GPIO, High drive capability, JTAG_TDO |
| DIO_6 | 16 | Digital I/O | GPIO, High drive capability, JTAG_TDI |
| DIO_7 | 20 | Digital/Analog I/O | GPIO, Sensor Controller, Analog |
| DIO_8 | 21 | Digital/Analog I/O | GPIO, Sensor Controller, Analog |
| DIO_9 | 22 | Digital/Analog I/O | GPIO, Sensor Controller, Analog |
| DIO_10 | 23 | Digital/Analog I/O | GPIO, Sensor Controller, Analog |
| DIO_11 | 24 | Digital/Analog I/O | GPIO, Sensor Controller, Analog |
| DIO_12 | 25 | Digital/Analog I/O | GPIO, Sensor Controller, Analog |
| DIO_13 | 26 | Digital/Analog I/O | GPIO, Sensor Controller, Analog |
| DIO_14 | 27 | Digital/Analog I/O | GPIO, Sensor Controller, Analog |
| JTAG_TMSC | 13 | Digital I/O | JTAG TMSC, high-drive capability |
| JTAG_TCKC | 14 | Digital I/O | JTAG TCKC |
| RESET_N | 19 | Digital input | Reset, active-low. No internal pullup. |
| RF_N | 2 | RF I/O | Negative RF input signal to LNA during RX Negative RF output signal to PA during TX |
| RF_P | 1 | RF I/O | Positive RF input signal to LNA during RX Positive RF output signal to PA during TX |
| RX_TX | 3 | RF I/O | Optional bias pin for the RF LNA |
| VDDR | 29 | Power | 1.7-V to 1.95-V supply, typically connect to output of internal DC-DC(3)(2) |
| VDDR_RF | 32 | Power | 1.7-V to 1.95-V supply, typically connect to output of internal DC-DC(2)(4) |
| VDDS | 28 | Power | 1.8-V to 3.8-V main chip supply(1) |
| VDDS2 | 11 | Power | 1.8-V to 3.8-V GPIO supply(1) |
| VDDS_DCDC | 18 | Power | 1.8-V to 3.8-V DC-DC supply |
| X32K_Q1 | 4 | Analog I/O | 32-kHz crystal oscillator pin 1 |
| X32K_Q2 | 5 | Analog I/O | 32-kHz crystal oscillator pin 2 |
| X24M_N | 30 | Analog I/O | 24-MHz crystal oscillator pin 1 |
| X24M_P | 31 | Analog I/O | 24-MHz crystal oscillator pin 2 |
| EGP | Power | Ground – Exposed Ground Pad | |
(1) See technical reference manual (listed in Section 8.3) for more details.
(2) Do not supply external circuitry from this pin.
(3) If internal DC-DC is not used, this pin is supplied internally from the main LDO.
(4) If internal DC-DC is not used, this pin must be connected to VDDR for supply from the main LDO.
4.5 Pin Diagram – RSM Package
NOTE:
I/O pins marked in bold have high drive capabilities. I/O pins marked in italics have analog capabilities.32-Pin VQFN
(4-mm × 4-mm) Pinout, 0.4-mm Pitch
4.6 Signal Descriptions – RSM Package
Table 4-3 Signal Descriptions – RSM Package
| NAME | NO. | TYPE | DESCRIPTION |
|---|---|---|---|
| DCDC_SW | 18 | Power | Output from internal DC-DC. (1). Tie to ground for external regulator mode (1.7-V to 1.95-V operation) |
| DCOUPL | 12 | Power | 1.27-V regulated digital-supply decoupling capacitor(2) |
| DIO_0 | 8 | Digital I/O | GPIO, Sensor Controller, high-drive capability |
| DIO_1 | 9 | Digital I/O | GPIO, Sensor Controller, high-drive capability |
| DIO_2 | 10 | Digital I/O | GPIO, Sensor Controller, high-drive capability |
| DIO_3 | 15 | Digital I/O | GPIO, High drive capability, JTAG_TDO |
| DIO_4 | 16 | Digital I/O | GPIO, High drive capability, JTAG_TDI |
| DIO_5 | 22 | Digital/Analog I/O | GPIO, Sensor Controller, Analog |
| DIO_6 | 23 | Digital/Analog I/O | GPIO, Sensor Controller, Analog |
| DIO_7 | 24 | Digital/Analog I/O | GPIO, Sensor Controller, Analog |
| DIO_8 | 25 | Digital/Analog I/O | GPIO, Sensor Controller, Analog |
| DIO_9 | 26 | Digital/Analog I/O | GPIO, Sensor Controller, Analog |
| JTAG_TMSC | 13 | Digital I/O | JTAG TMSC |
| JTAG_TCKC | 14 | Digital I/O | JTAG TCKC |
| RESET_N | 21 | Digital Input | Reset, active-low. No internal pullup. |
| RF_N | 2 | RF I/O | Negative RF input signal to LNA during RX Negative RF output signal to PA during TX |
| RF_P | 1 | RF I/O | Positive RF input signal to LNA during RX Positive RF output signal to PA during TX |
| RX_TX | 4 | RF I/O | Optional bias pin for the RF LNA |
| VDDR | 28 | Power | 1.7-V to 1.95-V supply, typically connect to output of internal DC-DC. (2)(3) |
| VDDR_RF | 32 | Power | 1.7-V to 1.95-V supply, typically connect to output of internal DC-DC(2)(4) |
| VDDS | 27 | Power | 1.8-V to 3.8-V main chip supply(1) |
| VDDS2 | 11 | Power | 1.8-V to 3.8-V GPIO supply(1) |
| VDDS_DCDC | 19 | Power | 1.8-V to 3.8-V DC-DC supply. Tie to ground for external regulator mode (1.7-V to 1.95-V operation). |
| VSS | 3, 7, 17, 20, 29 | Power | Ground |
| X32K_Q1 | 5 | Analog I/O | 32-kHz crystal oscillator pin 1 |
| X32K_Q2 | 6 | Analog I/O | 32-kHz crystal oscillator pin 2 |
| X24M_N | 30 | Analog I/O | 24-MHz crystal oscillator pin 1 |
| X24M_P | 31 | Analog I/O | 24-MHz crystal oscillator pin 2 |
| EGP | Power | Ground – Exposed Ground Pad | |
(1) See technical reference manual (listed in Section 8.3) for more details.
(2) Do not supply external circuitry from this pin.
(3) If internal DC-DC is not used, this pin is supplied internally from the main LDO.
(4) If internal DC-DC is not used, this pin must be connected to VDDR for supply from the main LDO.
5 Specifications
5.1 Absolute Maximum Ratings
over operating free-air temperature range (unless otherwise noted)(1)(2)| MIN | MAX | UNIT | ||
|---|---|---|---|---|
| Supply voltage (VDDS, VDDS2, and VDDS3) | VDDR supplied by internal DC-DC regulator or internal GLDO. VDDS_DCDC connected to VDDS on PCB. | –0.3 | 4.1 | V |
| Supply voltage (VDDS(3) and VDDR) | External regulator mode (VDDS and VDDR pins connected on PCB) | –0.3 | 2.25 | V |
| Voltage on any digital pin(4)(5) | –0.3 | VDDSx + 0.3, max 4.1 | V | |
| Voltage on crystal oscillator pins, X32K_Q1, X32K_Q2, X24M_N and X24M_P | –0.3 | VDDR + 0.3, max 2.25 | V | |
| Voltage on ADC input (Vin) | Voltage scaling enabled | –0.3 | VDDS | V |
| Voltage scaling disabled, internal reference | –0.3 | 1.49 | ||
| Voltage scaling disabled, VDDS as reference | –0.3 | VDDS / 2.9 | ||
| Input RF level | 5 | dBm | ||
| Tstg | Storage temperature | –40 | 150 | °C |
(1) All voltage values are with respect to ground, unless otherwise noted.
(2) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(3) In external regulator mode, VDDS2 and VDDS3 must be at the same potential as VDDS.
(4) Including analog-capable DIO.
(5) Each pin is referenced to a specific VDDSx (VDDS, VDDS2 or VDDS3). For a pin-to-VDDS mapping table, see Table 6-3.
5.2 ESD Ratings
| VALUE | UNIT | ||||
|---|---|---|---|---|---|
| VESD | Electrostatic discharge (ESD) performance | Human body model (HBM), per ANSI/ESDA/JEDEC JS001(1) | All pins | ±2500 | V |
| Charged device model (CDM), per JESD22-C101(2) | RF pins | ±750 | |||
| Non-RF pins | ±750 | ||||
(1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
(2) JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.
5.3 Recommended Operating Conditions
over operating free-air temperature range (unless otherwise noted)| MIN | MAX | UNIT | ||
|---|---|---|---|---|
| Ambient temperature range | –40 | 85 | °C | |
| Operating supply voltage (VDDS and VDDR), external regulator mode | For operation in 1.8-V systems (VDDS and VDDR pins connected on PCB, internal DC-DC cannot be used) |
1.7 | 1.95 | V |
| Operating supply voltage VDDS | For operation in battery-powered and 3.3-V systems (internal DC-DC can be used to minimize power consumption) |
1.8 | 3.8 | V |
| Operating supply voltages VDDS2 and VDDS3 | 0.7 × VDDS, min 1.8 | 3.8 | V | |
5.4 Power Consumption Summary
Measured on the TI CC2650EM-5XD reference design with Tc = 25°C, VDDS = 3.0 V with internal DC-DC converter, unless otherwise noted.| PARAMETER | TEST CONDITIONS | MIN | TYP | MAX | UNIT | |
|---|---|---|---|---|---|---|
| Icore | Core current consumption | Reset. RESET_N pin asserted or VDDS below Power-on-Reset threshold | 100 | nA | ||
| Shutdown. No clocks running, no retention | 150 | |||||
| Standby. With RTC, CPU, RAM and (partial) register retention. RCOSC_LF | 1 | µA | ||||
| Standby. With RTC, CPU, RAM and (partial) register retention. XOSC_LF | 1.2 | |||||
| Standby. With Cache, RTC, CPU, RAM and (partial) register retention. RCOSC_LF | 2.5 | |||||
| Standby. With Cache, RTC, CPU, RAM and (partial) register retention. XOSC_LF | 2.7 | |||||
| Idle. Supply Systems and RAM powered. | 550 | |||||
| Active. Core running CoreMark | 1.45 mA + 31 µA/MHz |
|||||
| Radio RX (1) | 5.9 | mA | ||||
| Radio RX(2) | 6.1 | |||||
| Radio TX, 0-dBm output power(1) | 6.1 | |||||
| Radio TX, 5-dBm output power(2) | 9.1 | |||||
| Peripheral Current Consumption (Adds to core current Icore for each peripheral unit activated)(3) | ||||||
| Iperi | Peripheral power domain | Delta current with domain enabled | 20 | µA | ||
| Serial power domain | Delta current with domain enabled | 13 | µA | |||
| RF Core | Delta current with power domain enabled, clock enabled, RF core idle | 237 | µA | |||
| µDMA | Delta current with clock enabled, module idle | 130 | µA | |||
| Timers | Delta current with clock enabled, module idle | 113 | µA | |||
| I2C | Delta current with clock enabled, module idle | 12 | µA | |||
| I2S | Delta current with clock enabled, module idle | 36 | µA | |||
| SSI | Delta current with clock enabled, module idle | 93 | µA | |||
| UART | Delta current with clock enabled, module idle | 164 | µA | |||
(1) Single-ended RF mode is optimized for size and power consumption. Measured on CC2650EM-4XS.
(2) Differential RF mode is optimized for RF performance. Measured on CC2650EM-5XD.
(3) Iperi is not supported in Standby or Shutdown.
5.5 General Characteristics
Measured on the TI CC2650EM-5XD reference design with Tc = 25°C, VDDS = 3.0 V, unless otherwise noted.| PARAMETER | TEST CONDITIONS | MIN | TYP | MAX | UNIT |
|---|---|---|---|---|---|
| FLASH MEMORY | |||||
| Supported flash erase cycles before failure | 100 | k Cycles | |||
| Flash page/sector erase current | Average delta current | 12.6 | mA | ||
| Flash page/sector size | 4 | KB | |||
| Flash write current | Average delta current, 4 bytes at a time | 8.15 | mA | ||
| Flash page/sector erase time(1) | 8 | ms | |||
| Flash write time(1) | 4 bytes at a time | 8 | µs | ||
(1) This number is dependent on Flash aging and will increase over time and erase cycles.
5.6 1-Mbps GFSK (Bluetooth low energy Technology) – RX
Measured on the TI CC2650EM-5XD reference design with Tc = 25°C, VDDS = 3.0 V, fRF = 2440 MHz, unless otherwise noted.| PARAMETER | TEST CONDITIONS | MIN | TYP | MAX | UNIT |
|---|---|---|---|---|---|
| Receiver sensitivity | Differential mode. Measured at the CC2650EM-5XD SMA connector, BER = 10–3 | –97 | dBm | ||
| Receiver sensitivity | Single-ended mode. Measured on CC2650EM-4XS, at the SMA connector, BER = 10–3 | –96 | dBm | ||
| Receiver saturation | Differential mode. Measured at the CC2650EM-5XD SMA connector, BER = 10–3 | 4 | dBm | ||
| Receiver saturation | Single-ended mode. Measured on CC2650EM-4XS, at the SMA connector, BER = 10–3 | 0 | dBm | ||
| Frequency error tolerance | Difference between the incoming carrier frequency and the internally generated carrier frequency | –350 | 350 | kHz | |
| Data rate error tolerance | Difference between incoming data rate and the internally generated data rate | –750 | 750 | ppm | |
| Co-channel rejection (2) | Wanted signal at –67 dBm, modulated interferer in channel, BER = 10–3 |
–6 | dB | ||
| Selectivity, ±1 MHz (2) | Wanted signal at –67 dBm, modulated interferer at ±1 MHz, BER = 10–3 |
7 / 3(1) | dB | ||
| Selectivity, ±2 MHz (2) | Wanted signal at –67 dBm, modulated interferer at ±2 MHz, BER = 10–3 |
34 / 25(1) | dB | ||
| Selectivity, ±3 MHz (2) | Wanted signal at –67 dBm, modulated interferer at ±3 MHz, BER = 10–3 |
38 / 26(1) | dB | ||
| Selectivity, ±4 MHz (2) | Wanted signal at –67 dBm, modulated interferer at ±4 MHz, BER = 10–3 |
42 / 29(1) | dB | ||
| Selectivity, ±5 MHz or more(2) | Wanted signal at –67 dBm, modulated interferer at ≥ ±5 MHz, BER = 10–3 | 32 | dB | ||
| Selectivity, Image frequency(2) | Wanted signal at –67 dBm, modulated interferer at image frequency, BER = 10–3 |
25 | dB | ||
| Selectivity, Image frequency ±1 MHz(2) |
Wanted signal at –67 dBm, modulated interferer at ±1 MHz from image frequency, BER = 10–3 | 3 / 26(1) | dB | ||
| Out-of-band blocking (3) | 30 MHz to 2000 MHz | –20 | dBm | ||
| Out-of-band blocking | 2003 MHz to 2399 MHz | –5 | dBm | ||
| Out-of-band blocking | 2484 MHz to 2997 MHz | –8 | dBm | ||
| Out-of-band blocking | 3000 MHz to 12.75 GHz | –8 | dBm | ||
| Intermodulation | Wanted signal at 2402 MHz, –64 dBm. Two interferers at 2405 and 2408 MHz respectively, at the given power level | –34 | dBm | ||
| Spurious emissions, 30 to 1000 MHz |
Conducted measurement in a 50-Ω single-ended load. Suitable for systems targeting compliance with EN 300 328, EN 300 440 class 2, FCC CFR47, Part 15 and ARIB STD-T-66 | –71 | dBm | ||
| Spurious emissions, 1 to 12.75 GHz |
Conducted measurement in a 50 Ω single-ended load. Suitable for systems targeting compliance with EN 300 328, EN 300 440 class 2, FCC CFR47, Part 15 and ARIB STD-T-66 | –62 | dBm | ||
| RSSI dynamic range | 70 | dB | |||
| RSSI accuracy | ±4 | dB |
(1) X / Y, where X is +N MHz and Y is –N MHz.
(2) Numbers given as I/C dB.
(3) Excluding one exception at Fwanted / 2, per Bluetooth Specification.
5.7 1-Mbps GFSK (Bluetooth low energy Technology) – TX
Measured on the TI CC2650EM-5XD reference design with Tc = 25°C, VDDS = 3.0 V, fRF = 2440 MHz, unless otherwise noted.| PARAMETER | TEST CONDITIONS | MIN | TYP | MAX | UNIT |
|---|---|---|---|---|---|
| Output power, highest setting | Differential mode, delivered to a single-ended 50-Ω load through a balun | 5 | dBm | ||
| Output power, highest setting | Measured on CC2650EM-4XS, delivered to a single-ended 50-Ω load | 2 | dBm | ||
| Output power, lowest setting | Delivered to a single-ended 50-Ω load through a balun | –21 | dBm | ||
| Spurious emission conducted measurement(1) | f < 1 GHz, outside restricted bands | –43 | dBm | ||
| f < 1 GHz, restricted bands ETSI | –65 | dBm | |||
| f < 1 GHz, restricted bands FCC | –76 | dBm | |||
| f > 1 GHz, including harmonics | –46 | dBm |
(1) Suitable for systems targeting compliance with worldwide radio-frequency regulations ETSI EN 300 328 and EN 300 440 Class 2 (Europe), FCC CFR47 Part 15 (US), and ARIB STD-T66 (Japan).
5.8 2-Mbps GFSK (Bluetooth 5) – RX
Measured on the TI CC2650EM-5XD reference design with Tc = 25°C, VDDS = 3.0 V, fRF = 2440 MHz, unless otherwise noted.| PARAMETER | TEST CONDITIONS | MIN | TYP | MAX | UNIT |
|---|---|---|---|---|---|
| Receiver sensitivity | Differential mode. Measured at the CC2650EM-5XD SMA connector, BER = 10–3 | –92 | dBm | ||
| Receiver saturation | Differential mode. Measured at the CC2650EM-5XD SMA connector, BER = 10–3 | 4 | dBm | ||
| Frequency error tolerance | Difference between the incoming carrier frequency and the internally generated carrier frequency | –300 | 500 | kHz | |
| Data rate error tolerance | Difference between incoming data rate and the internally generated data rate | –1000 | 1000 | ppm | |
| Co-channel rejection (2) | Wanted signal at –67 dBm, modulated interferer in channel, BER = 10–3 |
–7 | dB | ||
| Selectivity, ±2 MHz (2) | Wanted signal at –67 dBm, modulated interferer at ±2 MHz, Image frequency is at -2 MHz BER = 10–3 |
8 / 4(1) | dB | ||
| Selectivity, ±4 MHz (2) | Wanted signal at –67 dBm, modulated interferer at ±4 MHz, BER = 10–3 |
31 / 26(1) | dB | ||
| Selectivity, ±6 MHz (2) | Wanted signal at –67 dBm, modulated interferer at ±6 MHz, BER = 10–3 |
37 / 38(1) | dB | ||
| Alternate channel rejection, ±7 MHz(2) | Wanted signal at –67 dBm, modulated interferer at ≥ ±7 MHz, BER = 10–3 | 37 / 36(1) | dB | ||
| Selectivity, Image frequency(2) | Wanted signal at –67 dBm, modulated interferer at image frequency, BER = 10–3 |
4 | dB | ||
| Selectivity, Image frequency ±2 MHz(2) |
Note that Image frequency + 2 MHz is the Co-channel. Wanted signal at –67 dBm, modulated interferer at ±2 MHz from image frequency, BER = 10–3 | -7 / 26(1) | dB | ||
| Out-of-band blocking (3) | 30 MHz to 2000 MHz | –33 | dBm | ||
| Out-of-band blocking | 2003 MHz to 2399 MHz | –15 | dBm | ||
| Out-of-band blocking | 2484 MHz to 2997 MHz | –12 | dBm | ||
| Out-of-band blocking | 3000 MHz to 12.75 GHz | –10 | dBm | ||
| Intermodulation | Wanted signal at 2402 MHz, –64 dBm. Two interferers at 2405 and 2408 MHz respectively, at the given power level | –45 | dBm |
(1) X / Y, where X is +N MHz and Y is –N MHz.
(2) Numbers given as I/C dB.
(3) Excluding one exception at Fwanted / 2, per Bluetooth Specification.
5.9 2-Mbps GFSK (Bluetooth 5) – TX
Measured on the TI CC2650EM-5XD reference design with Tc = 25°C, VDDS = 3.0 V, fRF = 2440 MHz, unless otherwise noted.| PARAMETER | TEST CONDITIONS | MIN | TYP | MAX | UNIT |
|---|---|---|---|---|---|
| Output power, highest setting | Differential mode, delivered to a single-ended 50-Ω load through a balun | 5 | dBm | ||
| Output power, highest setting | Measured on CC2650EM-4XS, delivered to a single-ended 50-Ω load | 2 | dBm | ||
| Output power, lowest setting | Delivered to a single-ended 50-Ω load through a balun | –21 | dBm | ||
| Spurious emission conducted measurement(1) | f < 1 GHz, outside restricted bands | –43 | dBm | ||
| f < 1 GHz, restricted bands ETSI | –65 | dBm | |||
| f < 1 GHz, restricted bands FCC | –76 | dBm | |||
| f > 1 GHz, including harmonics | –46 | dBm |
(1) Suitable for systems targeting compliance with worldwide radio-frequency regulations ETSI EN 300 328 and EN 300 440 Class 2 (Europe), FCC CFR47 Part 15 (US), and ARIB STD-T66 (Japan).
5.10 5-Mbps (Proprietary) – RX
Measured on the TI CC2650EM-5XD reference design with Tc = 25°C, VDDS = 3.0 V, fRF = 2440 MHz, unless otherwise noted.| PARAMETER | TEST CONDITIONS | MIN | TYP | MAX | UNIT |
|---|---|---|---|---|---|
| Receiver sensitivity | Differential mode. Measured at the CC2650EM-5XD SMA connector, BER = 10–3 | –81 | dBm | ||
| Receiver saturation | Differential mode. Measured at the CC2650EM-5XD SMA connector, BER = 10–3 | -11 | dBm | ||
| Frequency error tolerance | Difference between the incoming carrier frequency and the internally generated carrier frequency | –300 | 300 | kHz | |
| Data rate error tolerance | Difference between incoming data rate and the internally generated data rate | –200 | 200 | ppm | |
| Co-channel rejection (2) | Wanted signal 11 dB above sensitivity level, modulated interferer in channel, BER = 10–3 |
–19 | dB | ||
| Selectivity, ±4 MHz (2) | Wanted signal 11 dB above sensitivity level, modulated interferer at ±4 MHz BER = 10–3 |
9 / 9(1) | dB | ||
| Selectivity, ±5 MHz (2) | Wanted signal 11 dB above sensitivity level, modulated interferer at ±5 MHz, BER = 10–3 |
19 / 19(1) | dB | ||
| Selectivity, ±8 MHz (2) | Wanted signal 11 dB above sensitivity level, modulated interferer at ±8 MHz, BER = 10–3 |
28 / 28(1) | dB | ||
| Selectivity, ±10 MHz(2) | Wanted signal 11 dB above sensitivity level, modulated interferer at ±10 MHz, BER = 10–3 | 33 / 33(1) | dB | ||
| Selectivity, ±12 MHz(2) | Wanted signal 11 dB above sensitivity level, modulated interferer at ±12 MHz, BER = 10–3 |
37/ 37(1) | dB | ||
| Selectivity, ±15 MHz(2) | Wanted signal 11 dB above sensitivity level, modulated interferer at ±15 MHz, BER = 10–3 |
43/ 43(1) | dB | ||
| Blocker rejection ±10 MHz and above (2) | Wanted signal 3dB above sensitivity limit , CW interferer at ±10 MHz and above, BER = 10–3 | 40 | dB |
(1) X / Y, where X is +N MHz and Y is –N MHz.
(2) Numbers given as I/C dB.
5.11 5-Mbps (Proprietary) – TX
Measured on the TI CC2650EM-5XD reference design with Tc = 25°C, VDDS = 3.0 V, fRF = 2440 MHz, unless otherwise noted.| PARAMETER | TEST CONDITIONS | MIN | TYP | MAX | UNIT |
|---|---|---|---|---|---|
| Output power, highest setting | Differential mode, delivered to a single-ended 50-Ω load through a balun | 5 | dBm | ||
| Output power, highest setting | Measured on CC2650EM-4XS, delivered to a single-ended 50-Ω load | 2 | dBm | ||
| Output power, lowest setting | Delivered to a single-ended 50-Ω load through a balun | –21 | dBm | ||
| Occupied bandwidth | 95% BW | 2.4 | MHz | ||
| Occupied bandwidth | 99% BW | 3.7 | MHz | ||
| Spurious emission conducted measurement(1) | f < 1 GHz, outside restricted bands | –43 | dBm | ||
| f < 1 GHz, restricted bands ETSI | –65 | dBm | |||
| f < 1 GHz, restricted bands FCC | –76 | dBm | |||
| f > 1 GHz, including harmonics | –46 | dBm |
(1) Suitable for systems targeting compliance with worldwide radio-frequency regulations ETSI EN 300 328 and EN 300 440 Class 2 (Europe), FCC CFR47 Part 15 (US), and ARIB STD-T66 (Japan).
5.12 24-MHz Crystal Oscillator (XOSC_HF)
Tc = 25°C, VDDS = 3.0 V, unless otherwise noted.(1)| PARAMETER | TEST CONDITIONS | MIN | TYP | MAX | UNIT |
|---|---|---|---|---|---|
| ESR Equivalent series resistance(2) | 6 pF < CL ≤ 9 pF | 20 | 60 | Ω | |
| ESR Equivalent series resistance(2) | 5 pF < CL ≤ 6 pF | 80 | Ω | ||
| LM Motional inductance(2) | Relates to load capacitance (CL in Farads) |
< 1.6 × 10–24 / CL2 | H | ||
| CL Crystal load capacitance(2) | 5 | 9 | pF | ||
| Crystal frequency(2)(3) | 24 | MHz | |||
| Crystal frequency tolerance(2)(4) | –40 | 40 | ppm | ||
| Start-up time(3)(5) | 150 | µs |
(1) Probing or otherwise stopping the XTAL while the DC-DC converter is enabled may cause permanent damage to the device.
(2) The crystal manufacturer's specification must satisfy this requirement
(3) Measured on the TI CC2650EM-5XD reference design with Tc = 25°C, VDDS = 3.0 V
(4) Includes initial tolerance of the crystal, drift over temperature, ageing and frequency pulling due to incorrect load capacitance. As per Bluetooth specification.
(5) Kick-started based on a temperature and aging compensated RCOSC_HF using precharge injection.
5.13 32.768-kHz Crystal Oscillator (XOSC_LF)
Tc = 25°C, VDDS = 3.0 V, unless otherwise noted.| PARAMETER | TEST CONDITIONS | MIN | TYP | MAX | UNIT | |
|---|---|---|---|---|---|---|
| Crystal frequency(1) | 32.768 | kHz | ||||
| Crystal frequency tolerance, Bluetooth low-energy applications(1)(2) | –500 | 500 | ppm | |||
| ESR Equivalent series resistance(1) | 30 | 100 | kΩ | |||
| CL Crystal load capacitance(1) | 6 | 12 | pF | |||
(1) The crystal manufacturer's specification must satisfy this requirement
(2) Includes initial tolerance of the crystal, drift over temperature, ageing and frequency pulling due to incorrect load capacitance. As per Bluetooth specification.
5.14 48-MHz RC Oscillator (RCOSC_HF)
Measured on the TI CC2650EM-5XD reference design with Tc = 25°C, VDDS = 3.0 V, unless otherwise noted.| PARAMETER | TEST CONDITIONS | MIN | TYP | MAX | UNIT |
|---|---|---|---|---|---|
| Frequency | 48 | MHz | |||
| Uncalibrated frequency accuracy | ±1% | ||||
| Calibrated frequency accuracy(1) | ±0.25% | ||||
| Start-up time | 5 | µs |
(1) Accuracy relative to the calibration source (XOSC_HF).
5.15 32-kHz RC Oscillator (RCOSC_LF)
Measured on the TI CC2650EM-5XD reference design with Tc = 25°C, VDDS = 3.0 V, unless otherwise noted.| PARAMETER | TEST CONDITIONS | MIN | TYP | MAX | UNIT |
|---|---|---|---|---|---|
| Calibrated frequency(1) | 32.8 | kHz | |||
| Temperature coefficient | 50 | ppm/°C |
(1) The frequency accuracy of the Real Time Clock (RTC) is not directly dependent on the frequency accuracy of the 32-kHz RC Oscillator. The RTC can be calibrated to an accuracy within ±500 ppm of 32.768 kHz by measuring the frequency error of RCOSC_LF relative to XOSC_HF and compensating the RTC tick speed. The procedure is explained in Running Bluetooth® Low Energy on CC2640 Without 32 kHz Crystal.
5.16 ADC Characteristics
Tc = 25°C, VDDS = 3.0 V and voltage scaling enabled, unless otherwise noted.(1)| PARAMETER | TEST CONDITIONS | MIN | TYP | MAX | UNIT | |
|---|---|---|---|---|---|---|
| Input voltage range | 0 | VDDS | V | |||
| Resolution | 12 | Bits | ||||
| Sample rate | 200 | ksps | ||||
| Offset | Internal 4.3-V equivalent reference(2) | 2 | LSB | |||
| Gain error | Internal 4.3-V equivalent reference(2) | 2.4 | LSB | |||
| DNL(4) | Differential nonlinearity | >–1 | LSB | |||
| INL(5) | Integral nonlinearity | ±3 | LSB | |||
| ENOB | Effective number of bits | Internal 4.3-V equivalent reference(2), 200 ksps, 9.6-kHz input tone |
9.8 | Bits | ||
| VDDS as reference, 200 ksps, 9.6-kHz input tone | 10 | |||||
| Internal 1.44-V reference, voltage scaling disabled, 32 samples average, 200 ksps, 300-Hz input tone |
11.1 | |||||
| THD | Total harmonic distortion | Internal 4.3-V equivalent reference(2), 200 ksps, 9.6-kHz input tone |
–65 | dB | ||
| VDDS as reference, 200 ksps, 9.6-kHz input tone | –69 | |||||
| Internal 1.44-V reference, voltage scaling disabled, 32 samples average, 200 ksps, 300-Hz input tone |
–71 | |||||
| SINAD, SNDR |
Signal-to-noise and Distortion ratio |
Internal 4.3-V equivalent reference(2), 200 ksps, 9.6-kHz input tone |
60 | dB | ||
| VDDS as reference, 200 ksps, 9.6-kHz input tone | 63 | |||||
| Internal 1.44-V reference, voltage scaling disabled, 32 samples average, 200 ksps, 300-Hz input tone |
69 | |||||
| SFDR | Spurious-free dynamic range | Internal 4.3-V equivalent reference(2), 200 ksps, 9.6-kHz input tone |
67 | dB | ||
| VDDS as reference, 200 ksps, 9.6-kHz input tone | 72 | |||||
| Internal 1.44-V reference, voltage scaling disabled, 32 samples average, 200 ksps, 300-Hz input tone |
73 | |||||
| Conversion time | Serial conversion, time-to-output, 24-MHz clock | 50 | clock-cycles | |||
| Current consumption | Internal 4.3-V equivalent reference(2) | 0.66 | mA | |||
| Current consumption | VDDS as reference | 0.75 | mA | |||
| Reference voltage | Equivalent fixed internal reference (input voltage scaling enabled). For best accuracy, the ADC conversion should be initiated through the TIRTOS API in order to include the gain/offset compensation factors stored in FCFG1. | 4.3(2)(3) | V | |||
| Reference voltage | Fixed internal reference (input voltage scaling disabled). For best accuracy, the ADC conversion should be initiated through the TIRTOS API in order to include the gain/offset compensation factors stored in FCFG1. This value is derived from the scaled value (4.3V) as follows: Vref=4.3V*1408/4095 | 1.48 | V | |||
| Reference voltage | VDDS as reference (Also known as RELATIVE) (input voltage scaling enabled) | VDDS | V | |||
| Reference voltage | VDDS as reference (Also known as RELATIVE) (input voltage scaling disabled) | VDDS / 2.82(3) | V | |||
| Input Impedance | 200 ksps, voltage scaling enabled. Capacitive input, Input impedance depends on sampling frequency and sampling time | >1 | MΩ | |||
(1) Using IEEE Std
1241™-2010 for terminology and test methods.
(2) Input signal scaled down internally before conversion, as if voltage range was 0 to 4.3 V.
(3) Applied voltage must be within absolute maximum ratings (Section 5.1) at all times.
(4) No missing codes. Positive DNL typically varies from +0.3 to +3.5, depending on device (see Figure 5-22).
(5) For a typical example, see Figure 5-23.
5.17 Temperature Sensor
Measured on the TI CC2650EM-5XD reference design with Tc = 25°C, VDDS = 3.0 V, unless otherwise noted.| PARAMETER | TEST CONDITIONS | MIN | TYP | MAX | UNIT |
|---|---|---|---|---|---|
| Resolution | 4 | °C | |||
| Range | –40 | 85 | °C | ||
| Accuracy | ±5 | °C | |||
| Supply voltage coefficient(1) | 3.2 | °C/V |
(1) Automatically compensated when using supplied driver libraries.
5.18 Battery Monitor
Measured on the TI CC2650EM-5XD reference design with Tc = 25°C, VDDS = 3.0 V, unless otherwise noted.| PARAMETER | TEST CONDITIONS | MIN | TYP | MAX | UNIT |
|---|---|---|---|---|---|
| Resolution | 50 | mV | |||
| Range | 1.8 | 3.8 | V | ||
| Accuracy | 13 | mV |
5.19 Continuous Time Comparator
Tc = 25°C, VDDS = 3.0 V, unless otherwise noted.| PARAMETER | TEST CONDITIONS | MIN | TYP | MAX | UNIT |
|---|---|---|---|---|---|
| Input voltage range | 0 | VDDS | V | ||
| External reference voltage | 0 | VDDS | V | ||
| Internal reference voltage | DCOUPL as reference | 1.27 | V | ||
| Offset | 3 | mV | |||
| Hysteresis | <2 | mV | |||
| Decision time | Step from –10 mV to 10 mV | 0.72 | µs | ||
| Current consumption when enabled(1) | 8.6 | µA |
(1) Additionally, the bias module must be enabled when running in standby mode.
5.20 Low-Power Clocked Comparator
Tc = 25°C, VDDS = 3.0 V, unless otherwise noted.| PARAMETER | TEST CONDITIONS | MIN | TYP | MAX | UNIT |
|---|---|---|---|---|---|
| Input voltage range | 0 | VDDS | V | ||
| Clock frequency | 32 | kHz | |||
| Internal reference voltage, VDDS / 2 | 1.49 – 1.51 | V | |||
| Internal reference voltage, VDDS / 3 | 1.01 – 1.03 | V | |||
| Internal reference voltage, VDDS / 4 | 0.78 – 0.79 | V | |||
| Internal reference voltage, DCOUPL / 1 | 1.25 – 1.28 | V | |||
| Internal reference voltage, DCOUPL / 2 | 0.63 – 0.65 | V | |||
| Internal reference voltage, DCOUPL / 3 | 0.42 – 0.44 | V | |||
| Internal reference voltage, DCOUPL / 4 | 0.33 – 0.34 | V | |||
| Offset | <2 | mV | |||
| Hysteresis | <5 | mV | |||
| Decision time | Step from –50 mV to 50 mV | <1 | clock-cycle | ||
| Current consumption when enabled | 362 | nA |
5.21 Programmable Current Source
Tc = 25°C, VDDS = 3.0 V, unless otherwise noted.| PARAMETER | TEST CONDITIONS | MIN | TYP | MAX | UNIT |
|---|---|---|---|---|---|
| Current source programmable output range | 0.25 – 20 | µA | |||
| Resolution | 0.25 | µA | |||
| Current consumption(1) | Including current source at maximum programmable output | 23 | µA |
(1) Additionally, the bias module must be enabled when running in standby mode.
5.22 Synchronous Serial Interface (SSI)
Tc = 25°C, VDDS = 3.0 V, unless otherwise noted.| PARAMETER | TEST CONDITIONS | MIN | TYP | MAX | UNIT |
|---|---|---|---|---|---|
| S1(1) tclk_per (SSIClk period) | Device operating as SLAVE | 12 | 65024 | system clocks | |
| S2 (1) tclk_high (SSIClk high time) | Device operating as SLAVE | 0.5 | tclk_per | ||
| S3(1) tclk_low (SSIClk low time) | Device operating as SLAVE | 0.5 | tclk_per | ||
| S1 (TX only)(1) tclk_per (SSIClk period) | One-way communication to SLAVE - Device operating as MASTER | 4 | 65024 | system clocks | |
| S1 (TX and RX)(1) tclk_per (SSIClk period) | Normal duplex operation - Device operating as MASTER | 8 | 65024 | system clocks | |
| S2 (1) tclk_high (SSIClk high time) | Device operating as MASTER | 0.5 | tclk_per | ||
| S3 (1) tclk_low(SSIClk low time) | Device operating as MASTER | 0.5 | tclk_per |
Figure 5-1 SSI Timing for TI Frame Format (FRF = 01), Single Transfer Timing Measurement
Figure 5-2 SSI Timing for MICROWIRE Frame Format (FRF = 10), Single Transfer
Figure 5-3 SSI Timing for SPI Frame Format (FRF = 00), With SPH = 1
5.23 DC Characteristics
| PARAMETER | TEST CONDITIONS | MIN | TYP | MAX | UNIT |
|---|---|---|---|---|---|
| TA = 25°C, VDDS = 1.8 V | |||||
| GPIO VOH at 8-mA load | IOCURR = 2, high-drive GPIOs only | 1.32 | 1.54 | V | |
| GPIO VOL at 8-mA load | IOCURR = 2, high-drive GPIOs only | 0.26 | 0.32 | V | |
| GPIO VOH at 4-mA load | IOCURR = 1 | 1.32 | 1.58 | V | |
| GPIO VOL at 4-mA load | IOCURR = 1 | 0.21 | 0.32 | V | |
| GPIO pullup current | Input mode, pullup enabled, Vpad = 0 V | 71.7 | µA | ||
| GPIO pulldown current | Input mode, pulldown enabled, Vpad = VDDS | 21.1 | µA | ||
| GPIO high/low input transition, no hysteresis |
IH = 0, transition between reading 0 and reading 1 | 0.88 | V | ||
| GPIO low-to-high input transition, with hysteresis |
IH = 1, transition voltage for input read as 0 → 1 | 1.07 | V | ||
| GPIO high-to-low input transition, with hysteresis |
IH = 1, transition voltage for input read as 1 → 0 | 0.74 | V | ||
| GPIO input hysteresis | IH = 1, difference between 0 → 1 and 1 → 0 points | 0.33 | V | ||
| TA = 25°C, VDDS = 3.0 V | |||||
| GPIO VOH at 8-mA load | IOCURR = 2, high-drive GPIOs only | 2.68 | V | ||
| GPIO VOL at 8-mA load | IOCURR = 2, high-drive GPIOs only | 0.33 | V | ||
| GPIO VOH at 4-mA load | IOCURR = 1 | 2.72 | V | ||
| GPIO VOL at 4-mA load | IOCURR = 1 | 0.28 | V | ||
| TA = 25°C, VDDS = 3.8 V | |||||
| GPIO pullup current | Input mode, pullup enabled, Vpad = 0 V | 277 | µA | ||
| GPIO pulldown current | Input mode, pulldown enabled, Vpad = VDDS | 113 | µA | ||
| GPIO high/low input transition, no hysteresis |
IH = 0, transition between reading 0 and reading 1 | 1.67 | V | ||
| GPIO low-to-high input transition, with hysteresis |
IH = 1, transition voltage for input read as 0 → 1 | 1.94 | V | ||
| GPIO high-to-low input transition, with hysteresis |
IH = 1, transition voltage for input read as 1 → 0 | 1.54 | V | ||
| GPIO input hysteresis | IH = 1, difference between 0 → 1 and 1 → 0 points | 0.4 | V | ||
| TA = 25°C | |||||
| VIH | Lowest GPIO input voltage reliably interpreted as a «High» | 0.8 | VDDS(1) | ||
| VIL | Highest GPIO input voltage reliably interpreted as a «Low» | 0.2 | VDDS(1) | ||
(1) Each GPIO is referenced to a specific VDDS pin. See the technical reference manual listed in Section 8.3 for more details.
5.24 Thermal Resistance Characteristics
| NAME | DESCRIPTION | RSM (°C/W)(1)(2) | RHB (°C/W)(1)(2) | RGZ (°C/W)(1)(2) |
|---|---|---|---|---|
| RθJA | Junction-to-ambient thermal resistance | 36.9 | 32.8 | 29.6 |
| RθJC(top) | Junction-to-case (top) thermal resistance | 30.3 | 24.0 | 15.7 |
| RθJB | Junction-to-board thermal resistance | 7.6 | 6.8 | 6.2 |
| PsiJT | Junction-to-top characterization parameter | 0.4 | 0.3 | 0.3 |
| PsiJB | Junction-to-board characterization parameter | 7.4 | 6.8 | 6.2 |
| RθJC(bot) | Junction-to-case (bottom) thermal resistance | 2.1 | 1.9 | 1.9 |
(1) °C/W = degrees Celsius per watt.
(2) These values are based on a JEDEC-defined 2S2P system (with the exception of the Theta JC [RθJC] value, which is based on a JEDEC-defined 1S0P system) and will change based on environment as well as application. For more information, see these EIA/JEDEC standards:
- JESD51-2, Integrated Circuits Thermal Test Method Environmental Conditions - Natural Convection (Still Air).
- JESD51-3, Low Effective Thermal Conductivity Test Board for Leaded Surface Mount Packages.
- JESD51-7, High Effective Thermal Conductivity Test Board for Leaded Surface Mount Packages.
- JESD51-9, Test Boards for Area Array Surface Mount Package Thermal Measurements.
5.25 Timing Requirements
| MIN | NOM | MAX | UNIT | |||
|---|---|---|---|---|---|---|
| Rising supply-voltage slew rate | 0 | 100 | mV/µs | |||
| Falling supply-voltage slew rate | 0 | 20 | mV/µs | |||
| Falling supply-voltage slew rate, with low-power flash settings(1) | 3 | mV/µs | ||||
| Positive temperature gradient in standby(3) | No limitation for negative temperature gradient, or outside standby mode | 5 | °C/s | |||
| CONTROL INPUT AC CHARACTERISTICS(2) | ||||||
| RESET_N low duration | 1 | µs | ||||
(1) For smaller coin cell batteries, with high worst-case end-of-life equivalent source resistance, a 22-µF VDDS input capacitor (see Figure 7-1) must be used to ensure compliance with this slew rate.
(2) TA = –40°C to 85°C, VDDS = 1.7 V to 3.8 V, unless otherwise noted.
(3) Applications using RCOSC_LF as sleep timer must also consider the drift in frequency caused by a change in temperature (see Section 5.15).
5.26 Switching Characteristics
Measured on the TI CC2650EM-5XD reference design with Tc = 25°C, VDDS = 3.0 V, unless otherwise noted.| PARAMETER | TEST CONDITIONS | MIN | TYP | MAX | UNIT | |
|---|---|---|---|---|---|---|
| WAKEUP AND TIMING | ||||||
| Idle → Active | 14 | µs | ||||
| Standby → Active | 151 | µs | ||||
| Shutdown → Active | 1015 | µs | ||||
5.27 Typical Characteristics
Current Consumption vs Temperature
