Product details

Technology family ACT Number of channels 1 Operating temperature range (°C) -55 to 125 Rating Catalog Supply current (max) (µA) 160
Technology family ACT Number of channels 1 Operating temperature range (°C) -55 to 125 Rating Catalog Supply current (max) (µA) 160
PDIP (N) 16 181.42 mm² 19.3 x 9.4 SOIC (D) 16 59.4 mm² 9.9 x 6 TSSOP (PW) 16 32 mm² 5 x 6.4 WQFN (BQB) 16 8.75 mm² 3.5 x 2.5
  • Inputs are TTL-voltage compatible
  • Speed of bipolar F, AS, and S, with significantly reduced power consumption
  • Designed specifically for high-speed memory decoders and data-transmission systems
  • Incorporate three enable inputs to simplify cascading and/or data reception
  • Balanced propagation delays
  • ±24mA output drive current
    • Fanout to 15 F devices
  • SCR-latchup-resistant CMOS process and circuit design
  • Exceeds 2kV ESD protection per MIL-STD-883, method 3015
  • Inputs are TTL-voltage compatible
  • Speed of bipolar F, AS, and S, with significantly reduced power consumption
  • Designed specifically for high-speed memory decoders and data-transmission systems
  • Incorporate three enable inputs to simplify cascading and/or data reception
  • Balanced propagation delays
  • ±24mA output drive current
    • Fanout to 15 F devices
  • SCR-latchup-resistant CMOS process and circuit design
  • Exceeds 2kV ESD protection per MIL-STD-883, method 3015

The ’ACT138 decoders/demultiplexers are designed for high-performance memory-decoding and data-routing applications that require very short propagation-delay times. In high-performance memory systems, these decoders can be used to minimize the effects of system decoding.

The ’ACT138 decoders/demultiplexers are designed for high-performance memory-decoding and data-routing applications that require very short propagation-delay times. In high-performance memory systems, these decoders can be used to minimize the effects of system decoding.

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Technical documentation

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Type Title Date
* Data sheet CDx4ACT138 3-Line to 8-Line Decoders/Demultiplexers datasheet (Rev. C) PDF | HTML 02 Jul 2024
Application note Implications of Slow or Floating CMOS Inputs (Rev. E) 26 Jul 2021
Selection guide Logic Guide (Rev. AB) 12 Jun 2017
Application note Understanding and Interpreting Standard-Logic Data Sheets (Rev. C) 02 Dec 2015
User guide LOGIC Pocket Data Book (Rev. B) 16 Jan 2007
Application note Semiconductor Packing Material Electrostatic Discharge (ESD) Protection 08 Jul 2004
Application note Selecting the Right Level Translation Solution (Rev. A) 22 Jun 2004
Application note TI IBIS File Creation, Validation, and Distribution Processes 29 Aug 2002
Application note CMOS Power Consumption and CPD Calculation (Rev. B) 01 Jun 1997
Application note Designing With Logic (Rev. C) 01 Jun 1997
Application note Using High Speed CMOS and Advanced CMOS in Systems With Multiple Vcc 01 Apr 1996

Design & development

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Evaluation board

14-24-LOGIC-EVM — Logic product generic evaluation module for 14-pin to 24-pin D, DB, DGV, DW, DYY, NS and PW packages

The 14-24-LOGIC-EVM evaluation module (EVM) is designed to support any logic device that is in a 14-pin to 24-pin D, DW, DB, NS, PW, DYY or DGV package,

User guide: PDF | HTML
Not available on TI.com
Evaluation board

14-24-NL-LOGIC-EVM — Logic product generic evaluation module for 14-pin to 24-pin non-leaded packages

14-24-NL-LOGIC-EVM is a flexible evaluation module (EVM) designed to support any logic or translation device that has a 14-pin to 24-pin BQA, BQB, RGY, RSV, RJW or RHL package.

User guide: PDF | HTML
Not available on TI.com
Package Pins CAD symbols, footprints & 3D models
PDIP (N) 16 Ultra Librarian
SOIC (D) 16 Ultra Librarian
TSSOP (PW) 16 Ultra Librarian
WQFN (BQB) 16 Ultra Librarian

Ordering & quality

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