LMK61A2-100M

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Product details

Output frequency (MHz) 100 Output type LVDS Stability (ppm) 50 Supply voltage (V) 3.3 Jitter (ps) 0.1 Operating temperature range (°C) -40 to 85
Output frequency (MHz) 100 Output type LVDS Stability (ppm) 50 Supply voltage (V) 3.3 Jitter (ps) 0.1 Operating temperature range (°C) -40 to 85
QFM (SIA) 6 35 mm² 7 x 5
  • Ultra-low Noise, High Performance
    • Jitter: 90 fs RMS Typical Fout > 100 MHz
    • PSRR: –70 dBc, Robust Supply Noise Immunity
  • Supported Output Format
    • LVPECL up to 1 GHz
    • LVDS up to 900 MHz
    • HCSL up to 400 MHz
  • Total Frequency Tolerance of ± 50 ppm (LMK61X2) and ± 25 ppm (LMK61X0)
  • 3.3-V Operating Voltage
  • Industrial Temperature Range (–40ºC to +85ºC)
  • 7 mm × 5 mm 6-Pin Package, Pin-Compatible With Industry Standard 7050 XO Package
  • Ultra-low Noise, High Performance
    • Jitter: 90 fs RMS Typical Fout > 100 MHz
    • PSRR: –70 dBc, Robust Supply Noise Immunity
  • Supported Output Format
    • LVPECL up to 1 GHz
    • LVDS up to 900 MHz
    • HCSL up to 400 MHz
  • Total Frequency Tolerance of ± 50 ppm (LMK61X2) and ± 25 ppm (LMK61X0)
  • 3.3-V Operating Voltage
  • Industrial Temperature Range (–40ºC to +85ºC)
  • 7 mm × 5 mm 6-Pin Package, Pin-Compatible With Industry Standard 7050 XO Package

The LMK61XX is an ultra-low jitter oscillator that generates a commonly used reference clock. The device is pre-programmed in factory to support any reference clock frequency; supported output formats are LVPECL up to 1 GHz, LVDS up to 900 MHz, and HCSL up to 400 MHz. Internal power conditioning provide excellent power supply ripple rejection (PSRR), reducing the cost and complexity of the power delivery network. The device operates from a single 3.3 V ± 5% supply.

The LMK61XX is an ultra-low jitter oscillator that generates a commonly used reference clock. The device is pre-programmed in factory to support any reference clock frequency; supported output formats are LVPECL up to 1 GHz, LVDS up to 900 MHz, and HCSL up to 400 MHz. Internal power conditioning provide excellent power supply ripple rejection (PSRR), reducing the cost and complexity of the power delivery network. The device operates from a single 3.3 V ± 5% supply.

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Technical documentation

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* Data sheet LMK61XX High-Performance Ultra-Low Jitter Oscillator datasheet (Rev. D) PDF | HTML 19 Oct 2017
EVM User's guide LMK61FFEVM User's Guide (Rev. A) 20 Nov 2015

Design & development

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Evaluation board

LMK61A2-100M00EVM — LMK61A2-100M00 Ultra-Low-Jitter Fixed Frequency Oscillator EVM

The LMK61A2-100M00EVM evaluation module provides a complete platform to evaluate the 90-fs RMS jitter performance of Texas Instruments LMK61A2-100M00 Ultra-Low Jitter Fixed Frequency Oscillator.

The onboard power supply options allow for ease of use as well as configuration flexibility required in (...)

User guide: PDF
Not available on TI.com
Simulation model

IBIS Model for LMK61XX family

SNAM240.ZIP (449 KB) - IBIS Model
Design tool

CLOCK-TREE-ARCHITECT — Clock tree architect programming software

Clock tree architect is a clock tree synthesis tool that streamlines your design process by generating clock tree solutions based on your system requirements. The tool pulls data from an extensive database of clocking products to generate a system-level multi-chip clocking solution.
Simulation tool

PSPICE-FOR-TI — PSpice® for TI design and simulation tool

PSpice® for TI is a design and simulation environment that helps evaluate functionality of analog circuits. This full-featured, design and simulation suite uses an analog analysis engine from Cadence®. Available at no cost, PSpice for TI includes one of the largest model libraries in the (...)
Package Pins CAD symbols, footprints & 3D models
QFM (SIA) 6 Ultra Librarian

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