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Linear & low-dropout (LDO) regulators

LP2992

ACTIVE

250-mA, 16-V, low-dropout voltage regulator with enable

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Data sheet

A newer version of this product is available

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TPS7A25 ACTIVE 300-mA, 18-V, ultra-low-IQ, high-accuracy, adjustable low-dropout voltage regulator with power good This is a 300-mA LDO with power good and lower IQ (2.5 μA)

LP2992

ACTIVE
Data sheet Order now

Product details

Output options Fixed Output Iout (max) (A) 0.25 Vin (max) (V) 16 Vin (min) (V) 2.2 Vout (max) (V) 5 Vout (min) (V) 1.5 Fixed output options (V) 1.5, 1.8, 2.5, 3, 3.3, 5 Rating Catalog Noise (µVrms) 30 PSRR at 100 KHz (dB) 40 Iq (typ) (mA) 0.065 Thermal resistance θJA (°C/W) 72 Load capacitance (min) (µF) 4.7 Regulated outputs (#) 1 Features Enable, Soft start Accuracy (%) 2 Dropout voltage (Vdo) (typ) (mV) 450 Operating temperature range (°C) -40 to 125
Output options Fixed Output Iout (max) (A) 0.25 Vin (max) (V) 16 Vin (min) (V) 2.2 Vout (max) (V) 5 Vout (min) (V) 1.5 Fixed output options (V) 1.5, 1.8, 2.5, 3, 3.3, 5 Rating Catalog Noise (µVrms) 30 PSRR at 100 KHz (dB) 40 Iq (typ) (mA) 0.065 Thermal resistance θJA (°C/W) 72 Load capacitance (min) (µF) 4.7 Regulated outputs (#) 1 Features Enable, Soft start Accuracy (%) 2 Dropout voltage (Vdo) (typ) (mV) 450 Operating temperature range (°C) -40 to 125
SOT-23 (DBV) 5 8.12 mm² 2.9 x 2.8 WSON (NGD) 6 9.6068 mm² 2.92 x 3.29
  • VIN range (new chip): 2.5V to 16V
  • VOUT range (new chip):
    • 1.2V to 5.0V (fixed, 100mV steps)
  • VOUT accuracy:
    • ±1% for A-grade legacy chip
    • ±1.5% for standard-grade legacy chip
    • ±0.5% for new chip
  • ±1% output accuracy over load, and temperature (new chip)
  • Output current: Up to 250mA
  • Low IQ (new chip): 69µA at ILOAD = 0mA
  • Low IQ (new chip): 875µA at ILOAD = 250mA
  • Shutdown current:
    • 0.01µA (typ, legacy chip)
    • 1.12µA (typ, new chip)
  • Low noise: 30µVRMS with 10nF bypass capacitor
  • Output current limiting and thermal protection
  • Stable with 2.2µF ceramic capacitors
  • High PSRR: 70dB at 1kHz, 40dB at 1MHz
  • Operating junction temperature: –40°C to +125°C
  • Package: 5-pin SOT-23 (DBV)
  • VIN range (new chip): 2.5V to 16V
  • VOUT range (new chip):
    • 1.2V to 5.0V (fixed, 100mV steps)
  • VOUT accuracy:
    • ±1% for A-grade legacy chip
    • ±1.5% for standard-grade legacy chip
    • ±0.5% for new chip
  • ±1% output accuracy over load, and temperature (new chip)
  • Output current: Up to 250mA
  • Low IQ (new chip): 69µA at ILOAD = 0mA
  • Low IQ (new chip): 875µA at ILOAD = 250mA
  • Shutdown current:
    • 0.01µA (typ, legacy chip)
    • 1.12µA (typ, new chip)
  • Low noise: 30µVRMS with 10nF bypass capacitor
  • Output current limiting and thermal protection
  • Stable with 2.2µF ceramic capacitors
  • High PSRR: 70dB at 1kHz, 40dB at 1MHz
  • Operating junction temperature: –40°C to +125°C
  • Package: 5-pin SOT-23 (DBV)

The LP2992 is a fixed-output, wide-input, low-noise, low-dropout voltage regulator supporting an input voltage range from 2.5V to 16V and up to 250mA of load current. The LP2992 supports an output range of 1.2V to 5.0V (new chip).

Additionally, the LP2992 (new chip) has a 1% output accuracy across load, and temperature that can meet the needs of low-voltage microcontrollers (MCUs) and processors.

Low output noise of 30µVRMS (with 10nF bypass capacitors) and wide bandwidth PSRR performance of greater than 70dB at 1kHz and 40dB at 1MHz help attenuate the switching frequency of an upstream DC/DC converter and minimize post regulator filtering.

The internal soft-start time and current limit protection reduce inrush current during start up, thus minimizing input capacitance. Standard protection features, such as overcurrent and overtemperature protection, are included.

The LP2992 is available in a 5-pin 2.9mm × 2.8mm SOT-23 (DBV) package.

The LP2992 is a fixed-output, wide-input, low-noise, low-dropout voltage regulator supporting an input voltage range from 2.5V to 16V and up to 250mA of load current. The LP2992 supports an output range of 1.2V to 5.0V (new chip).

Additionally, the LP2992 (new chip) has a 1% output accuracy across load, and temperature that can meet the needs of low-voltage microcontrollers (MCUs) and processors.

Low output noise of 30µVRMS (with 10nF bypass capacitors) and wide bandwidth PSRR performance of greater than 70dB at 1kHz and 40dB at 1MHz help attenuate the switching frequency of an upstream DC/DC converter and minimize post regulator filtering.

The internal soft-start time and current limit protection reduce inrush current during start up, thus minimizing input capacitance. Standard protection features, such as overcurrent and overtemperature protection, are included.

The LP2992 is available in a 5-pin 2.9mm × 2.8mm SOT-23 (DBV) package.
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Technical documentation

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Type Title Date
* Data sheet LP2992 Micropower, 250mA, Low-Noise, Ultra-Low-Dropout Regulator in SOT-23 and WSON Packages Designed for Use With Very Low-ESR Output Capacitors datasheet (Rev. L) PDF | HTML 26 Feb 2025
White paper Parallel LDO Architecture Design Using Ballast Resistors PDF | HTML 14 Dec 2022
White paper Comprehensive Analysis and Universal Equations for Parallel LDO's Using Ballast PDF | HTML 13 Dec 2022
Selection guide Low Dropout Regulators Quick Reference Guide (Rev. P) 21 Mar 2018
Application note AN-1028 Maximum Power Enhancement Techniques for Power Packages (Rev. B) 06 May 2013

Design & development

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Simulation model

LP2992_1P5 PSpice Transient Model

SNVM642.ZIP (42 KB) - PSpice Model
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Simulation model

LP2992_1P5 Unencrypted PSpice Transient Model

SNVMA91.ZIP (1 KB) - PSpice Model
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LP2992_1P8 PSpice Transient Model

SNVM639.ZIP (39 KB) - PSpice Model
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LP2992_1P8 TINA-TI Reference Design

SNVMA20.TSC (143 KB) - TINA-TI Reference Design
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LP2992_1P8 TINA-TI Transient Spice Model

SNVMA19.ZIP (8 KB) - TINA-TI Spice Model
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LP2992_1P8 Unencrypted PSpice Transient Model

SNVMA94.ZIP (1 KB) - PSpice Model
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Simulation model

LP2992_2P5 PSpice Transient Model

SNVM641.ZIP (40 KB) - PSpice Model
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LP2992_2P5 TINA-TI Reference Design

SNVMA21.TSC (168 KB) - TINA-TI Reference Design
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Simulation model

LP2992_2P5 TINA-TI Transient Spice Model

SNVMA22.ZIP (8 KB) - TINA-TI Spice Model
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Simulation model

LP2992_2P5 Unencrypted PSpice Transient Model

SNVMA92.ZIP (1 KB) - PSpice Model
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Simulation model

LP2992_3P3 PSpice Transient Model

SNVM640.ZIP (39 KB) - PSpice Model
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Simulation model

LP2992_3P3 Unencrypted PSpice Transient Model

SNVMA93.ZIP (1 KB) - PSpice Model
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LP2992_5P0 PSpice Transient Model

SNVM643.ZIP (40 KB) - PSpice Model
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LP2992_5P0 Unencrypted PSpice Transient Model

SNVMA90.ZIP (1 KB) - PSpice Model
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Package Pins CAD symbols, footprints & 3D models
SOT-23 (DBV) 5 Ultra Librarian
WSON (NGD) 6 Ultra Librarian
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