The PLL1705 and PLL1706 use the same die and they are electrically identical except for mode control.
The PLL1705 are low cost, phase-locked loop (PLL) multiclock generators. The PLL1705 and PLL1706 can generate four system clocks from a 27-MHz reference input frequency. The clock outputs of the PLL1705 can be controlled by sampling frequency-control pins and those of the PLL1706 can be controlled through serial-mode control pins. The device gives customers both cost and space savings by eliminating external components and enables customers to achieve the very low-jitter performance needed for high performance audio DACs and/or ADCs. The PLL1705 and PLL1706 are ideal for MPEG-2 applications which use a 27-MHz master clock such as DVD players, DVD add-on cards for multimedia PCs, digital HDTV systems, and set-top boxes.
| Type | Title | Date | ||
|---|---|---|---|---|
| * | Data sheet | 3.3-V Dual PLL MultiClock Generator datasheet (Rev. A) | 11 Sep 2002 |
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| Package | Pins | CAD symbols, footprints & 3D models |
|---|---|---|
| SSOP (DBQ) | 20 | Ultra Librarian |
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