SN65LVEL11

ACTIVE

3.3-V PECL 1:2 fanout buffer

Product details

Function Translator Protocols ECL, PECL Number of transmitters 2 Number of receivers 1 Supply voltage (V) 3.3 Signaling rate (Mbps) 4000 Input signal PECL Output signal ECL, PECL Rating Catalog Operating temperature range (°C) -40 to 85
Function Translator Protocols ECL, PECL Number of transmitters 2 Number of receivers 1 Supply voltage (V) 3.3 Signaling rate (Mbps) 4000 Input signal PECL Output signal ECL, PECL Rating Catalog Operating temperature range (°C) -40 to 85
SOIC (D) 8 29.4 mm² 4.9 x 6 VSSOP (DGK) 8 14.7 mm² 3 x 4.9
  • 1:2 ECL Fanout Buffer
  • Operating Range
    • PECL VCC = 3.0 V to 3.8 V With
      VEE = 0 V
    • NECL: VCC = 0 V with VEE = -3.0
      to -3.8V
  • 5 ps Skew Between Outputs
  • Support for Clock Frequencies > 2.0 GHz
  • 265 ps Typical Propagation Delay
  • Deterministic Output Value for Open Input Conditions or When Inputs = VEE
  • Built-in Temperature Compensation
  • Drop in Compatible to MC10LVEL11, MC100LVEL11
  • Built-In Input Pull Down Resistors
  • APPLICATIONS
    • Data and Clock Transmission Over Backplane
    • Signaling Level Conversion
  • 1:2 ECL Fanout Buffer
  • Operating Range
    • PECL VCC = 3.0 V to 3.8 V With
      VEE = 0 V
    • NECL: VCC = 0 V with VEE = -3.0
      to -3.8V
  • 5 ps Skew Between Outputs
  • Support for Clock Frequencies > 2.0 GHz
  • 265 ps Typical Propagation Delay
  • Deterministic Output Value for Open Input Conditions or When Inputs = VEE
  • Built-in Temperature Compensation
  • Drop in Compatible to MC10LVEL11, MC100LVEL11
  • Built-In Input Pull Down Resistors
  • APPLICATIONS
    • Data and Clock Transmission Over Backplane
    • Signaling Level Conversion

The SN65LVEL11 is a fully differential 1:2 ECL fanout buffer. The device includes circuitry to maintain a known logic level when inputs are in open condition. The SN65LVEL11 is functionally equivalent to SN65EL11 with improved performance. The SN65LVEL11 is housed in an industry standard SOIC-8 package and is also available in the TSSOP-8 package option.

The SN65LVEL11 is a fully differential 1:2 ECL fanout buffer. The device includes circuitry to maintain a known logic level when inputs are in open condition. The SN65LVEL11 is functionally equivalent to SN65EL11 with improved performance. The SN65LVEL11 is housed in an industry standard SOIC-8 package and is also available in the TSSOP-8 package option.

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* Data sheet SN65LVEL11 datasheet 08 Dec 2008

Design & development

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Simulation model

SN65LVEL11 IBIS Model Version 1.1

SLLM049.ZIP (15 KB) - IBIS Model
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PSpice® for TI is a design and simulation environment that helps evaluate functionality of analog circuits. This full-featured, design and simulation suite uses an analog analysis engine from Cadence®. Available at no cost, PSpice for TI includes one of the largest model libraries in the (...)
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SOIC (D) 8 Ultra Librarian
VSSOP (DGK) 8 Ultra Librarian

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