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SN74AHCT240-Q1

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Automotive 8-ch, 4.5-V to 5.5-V inverters with TTL-compatible CMOS inputs

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Data sheet

SN74AHCT240-Q1

ACTIVE
Data sheet Order now

Product details

Technology family AHCT Supply voltage (min) (V) 4.5 Supply voltage (max) (V) 5.5 Number of channels 8 IOL (max) (mA) 8 IOH (max) (mA) -8 Supply current (max) (µA) 40 Input type TTL-Compatible CMOS Output type Push-Pull Features Balanced outputs, Over-voltage tolerant inputs, Very high speed (tpd 5-10ns) Rating Automotive Operating temperature range (°C) -40 to 85
Technology family AHCT Supply voltage (min) (V) 4.5 Supply voltage (max) (V) 5.5 Number of channels 8 IOL (max) (mA) 8 IOH (max) (mA) -8 Supply current (max) (µA) 40 Input type TTL-Compatible CMOS Output type Push-Pull Features Balanced outputs, Over-voltage tolerant inputs, Very high speed (tpd 5-10ns) Rating Automotive Operating temperature range (°C) -40 to 85
TSSOP (PW) 20 41.6 mm² 6.5 x 6.4
  • Qualified for Automotive Applications
  • Inputs Are TTL-Voltage Compatible
  • Latch-Up Performance Exceeds 250 mA Per JESD 17
  • Qualified for Automotive Applications
  • Inputs Are TTL-Voltage Compatible
  • Latch-Up Performance Exceeds 250 mA Per JESD 17

This octal buffer/driver is designed specifically to improve the performance and density of 3-state memory-address drivers, clock drivers, and bus-oriented receivers and transmitters.

The SN74AHCT240 device is organized as two 4-bit buffers/line drivers with separate output-enable (OE) inputs. When OE is low, the device passes data from the A inputs to the Y outputs. When OE is high, the outputs are in the high-impedance state.

To ensure the high-impedance state during power up or power down, OE shall be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.

This octal buffer/driver is designed specifically to improve the performance and density of 3-state memory-address drivers, clock drivers, and bus-oriented receivers and transmitters.

The SN74AHCT240 device is organized as two 4-bit buffers/line drivers with separate output-enable (OE) inputs. When OE is low, the device passes data from the A inputs to the Y outputs. When OE is high, the outputs are in the high-impedance state.

To ensure the high-impedance state during power up or power down, OE shall be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.
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* Data sheet Octal Buffer/Driver With 3-State Outputs datasheet (Rev. B) 24 Apr 2008

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