TPS74201

ACTIVE

1.5-A, low-VIN (0.8-V), low-noise, high-PSRR, adjustable ultra-low-dropout voltage regulator

Product details

Output options Adjustable Output Iout (max) (A) 1.5 Vin (max) (V) 5.5 Vin (min) (V) 0.8 Vout (max) (V) 3.5 Vout (min) (V) 0.8 Rating Catalog Noise (µVrms) 13 PSRR at 100 KHz (dB) 52 Iq (typ) (mA) 3 Thermal resistance θJA (°C/W) 27 Load capacitance (min) (µF) 0 Regulated outputs (#) 1 Features Enable, Power good, Soft start Accuracy (%) 1 Dropout voltage (Vdo) (typ) (mV) 55 Operating temperature range (°C) -40 to 125
Output options Adjustable Output Iout (max) (A) 1.5 Vin (max) (V) 5.5 Vin (min) (V) 0.8 Vout (max) (V) 3.5 Vout (min) (V) 0.8 Rating Catalog Noise (µVrms) 13 PSRR at 100 KHz (dB) 52 Iq (typ) (mA) 3 Thermal resistance θJA (°C/W) 27 Load capacitance (min) (µF) 0 Regulated outputs (#) 1 Features Enable, Power good, Soft start Accuracy (%) 1 Dropout voltage (Vdo) (typ) (mV) 55 Operating temperature range (°C) -40 to 125
TO-263 (KTW) 7 153.924 mm² 10.1 x 15.24 VQFN (RGR) 20 12.25 mm² 3.5 x 3.5 VQFN (RGW) 20 25 mm² 5 x 5
  • Input voltage range: 0.8V to 5.5V
  • Soft-Start (SS) pin provides a linear start-up with ramp time set by external capacitor
  • 1% accuracy over line, load, and temperature
  • Supports input voltages as low as 0.8V with external bias supply
  • Adjustable output (0.8V to 3.6V)
  • Ultra-Low Dropout:
    • 60mV (legacy chip) at 1.5A (typical)
    • 55mV (new chip) at 1.5A (typical)
  • Stable with any output capacitor ≥ 2.2µF (new chip)
  • Stable with any or no output capacitor (legacy chip)
  • Excellent transient response
  • Open-Drain Power-Good
  • Active high enable
  • Input voltage range: 0.8V to 5.5V
  • Soft-Start (SS) pin provides a linear start-up with ramp time set by external capacitor
  • 1% accuracy over line, load, and temperature
  • Supports input voltages as low as 0.8V with external bias supply
  • Adjustable output (0.8V to 3.6V)
  • Ultra-Low Dropout:
    • 60mV (legacy chip) at 1.5A (typical)
    • 55mV (new chip) at 1.5A (typical)
  • Stable with any output capacitor ≥ 2.2µF (new chip)
  • Stable with any or no output capacitor (legacy chip)
  • Excellent transient response
  • Open-Drain Power-Good
  • Active high enable

The TPS742 series of low-dropout (LDO) linear regulators provide an easy-to-use, robust power-management solution for a wide variety of applications. User-programmable soft-start minimizes stress on the input power source by reducing capacitive inrush current on start-up. The soft-start is monotonic and well suited for powering many different types of processors and ASICs. The enable input and power-good output allow easy sequencing with external regulators. This complete flexibility permits the user to configure a solution that meets the sequencing requirements of FPGAs, DSPs, and other applications with special start-up requirements.

A precision reference and error amplifier deliver 1% accuracy over load, line, temperature, and process. The device is is stable with any type of capacitor greater than or equal to 2.2µF (new chip only), and is fully specified from –40°C to 125°C.

The TPS742 series of low-dropout (LDO) linear regulators provide an easy-to-use, robust power-management solution for a wide variety of applications. User-programmable soft-start minimizes stress on the input power source by reducing capacitive inrush current on start-up. The soft-start is monotonic and well suited for powering many different types of processors and ASICs. The enable input and power-good output allow easy sequencing with external regulators. This complete flexibility permits the user to configure a solution that meets the sequencing requirements of FPGAs, DSPs, and other applications with special start-up requirements.

A precision reference and error amplifier deliver 1% accuracy over load, line, temperature, and process. The device is is stable with any type of capacitor greater than or equal to 2.2µF (new chip only), and is fully specified from –40°C to 125°C.

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Technical documentation

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Type Title Date
* Data sheet TPS742 1.5A Ultra-LDO With Programmable Soft-Start datasheet (Rev. O) PDF | HTML 18 Oct 2024
Application note LDO Noise Demystified (Rev. B) PDF | HTML 18 Aug 2020
Application note Using Thermal Calculation Tools for Analog Components (Rev. A) 30 Aug 2019
Application note A Topical Index of TI LDO Application Notes (Rev. F) 27 Jun 2019
Application note LDO PSRR Measurement Simplified (Rev. A) PDF | HTML 09 Aug 2017
Application note LDO Performance Near Dropout 08 Oct 2010
Application note Using New Thermal Metrics 15 Dec 2009
Analog Design Journal Q3 2007 Issue Analog Applications Journal 10 Aug 2007
Analog Design Journal Simultaneous power-down sequencing with the TPS74x01 family of linear regulators 10 Aug 2007
Analog Design Journal A 3-A, 1.2-Vout linear regulator with 80% efficiency and Plost < 1W 10 Oct 2006
EVM User's guide TPS74x01EVM-118 User's Guide 20 Jun 2006

Design & development

For additional terms or required resources, click any title below to view the detail page where available.

Evaluation board

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User guide: PDF
Not available on TI.com
Evaluation board

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User guide: PDF
Not available on TI.com
Evaluation board

DP159RGZEVM — DP159RGZEVM Evaluation Module

The DP159RSBEVM is a PCB created to help customers evaluate the DP159 device for video applications.  The EVM has a DP connection for the source and a HDMI connection for the sink.  J2 is a standard DP connector (Molex 47272-0001).  P2 is a standard HDMI connector (Molex (...)

User guide: PDF
Not available on TI.com
Evaluation board

DP159RSBEVM — DP159RSBEVM Evaluation Module

The DP159RSBEVM is a PCB created to help customers evaluate the DP159 device for video applications.  The EVM has a DP connection for the source and a HDMI connection for the sink.  J2 is a standard DP connector (Molex 47272-0001).  P2 is a standard HDMI connector (Molex (...)

User guide: PDF
Not available on TI.com
Evaluation board

SN65DSI83Q1-EVM — MIPI® DSI to LVDS bridge & FlatLink™ integrated circuit evaluation module

The SN65DSI83Q1-EVM evaluation module (EVM) is a printed circuit board (PCB) that helps customers implement the SN65DSI83-Q1 device in system hardware.  This EVM includes on-board connectors for DSI input and LVDS output signals.  These connectors are for connecting (...)
User guide: PDF
Not available on TI.com
Evaluation board

SN65DSI85EVM — SN65DSI85 dual-channel MIPI® DSI to dual-link FlatLink™ LVDS bridge evaluation module

The SN65DSI85EVM evaluation module (EVM) is a printed circuit board (PCB) that helps customers implementthe SN65DSI85 device in system hardware. This EVM can be used as a hardware reference design for any implementation using the SN65DSI85 device. The SN65DSI85EVM includes (...)
User guide: PDF
Not available on TI.com
Evaluation board

SN65DSI85Q1-EVM — Dual-Channel MIPI® DSI to Dual-Link FlatLink™ LVDS Bridge Evaluation Module

The SN65DSI85Q1EVM is a PCB created to help customers implementing SN65DSI85Q1 in system hardware.  This EVM includes on-board connectors for DSI input and LVDS output signals.  These connectors are for connecting MIPI DPHY compliant DSI source and LVDS panels to the EVM.
User guide: PDF
Not available on TI.com
Evaluation board

TDP158RSBEVM — 6-Gbps AC-coupled to TMDS & HDMI™ redriver evaluation module

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User guide: PDF
Not available on TI.com
Evaluation board

TMDS171RGZEVM — TMDS171 3.4-Gbps TMDS retimer in the RGZ package evaluation module

The TMDS171 EVM is a PCB created to help customers evaluate the TMDS171 device for video applications with HDMI interfaces.  This EVM can also be used as a hardware reference design for implementation of the TMDS171 in the RGZ package.  PCB design/layout files can be provided upon request (...)

User guide: PDF
Not available on TI.com
Evaluation board

TMDS181RGZEVM — TMDS181 6-Gbps TMDS retimer in the RGZ package evaluation module

The TMDS181RGZEVM is a PCB created to help customers evaluate the TMDS181 device for video applications with HDMI interfaces.
User guide: PDF
Not available on TI.com
Simulation model

TPS74201 PSpice Transient Model (Rev. B)

SLIM016B.ZIP (61 KB) - PSpice Model
Simulation model

TPS74201 TINA-TI Transient Reference Design

SLIM289.TSC (106 KB) - TINA-TI Reference Design
Simulation model

TPS74201 TINA-TI Transient Spice Model

SLIM288.ZIP (36 KB) - TINA-TI Spice Model
Simulation model

TPS74201 Unencrypted PSpice Transient Model

SBVM620.ZIP (3 KB) - PSpice Model
Reference designs

TIDA-01161 — 1-GHz Signal Bandwidth RF Sampling Receiver Reference Design

The RF sampling architecture offers an alternative to the traditional super-heterodyne architecture. An RF sampling analog-to-digital converter (ADC) operates at a high sampling rate and converts signals directly from radio frequencies (RF) to digital. Because of the high sampling rate, the RF (...)
Design guide: PDF
Schematic: PDF
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Reference designs

TIDA-050001 — HDMI 2.0 ESD Protection Reference Design

This reference design is to show two distinct ways to protect the TMDS lines of a HDMI 2.0 drivers and retimers from electrostatic discharge (ESD). The HDMI standard is used in many applications from set-topboxes to notebooks to TV's. Since these ports are almost always external they are (...)
Design guide: PDF
Schematic: PDF
Reference designs

TIDA-01163 — Multi-band RF Sampling Receiver Reference Design

The RF sampling receiver captures signals directly in the radio frequency (RF) band. In a multi-band application the desired signals are not very wide band but they are spaced far apart within the spectrum. The reference design captures signals in different RF bands and digitally down-converts them (...)
Design guide: PDF
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Reference designs

TIDA-00684 — High-Bandwidth Arbitrary Waveform Generator Reference Design: DC or AC coupled, High-Voltage output

In TIDA-00684 reference design a quad-channel TSW3080 evaluation module (EVM) is developed to shows how to use an active amplifier interface with the DAC38J84 to demonstrate an arbitrary-waveform-generator frontend. The DAC38J84 provides four DAC channels with 16 bits of resolution with a maximum (...)
Design guide: PDF
Schematic: PDF
Reference designs

TIDA-01016 — Clocking Reference Design for RF Sampling ADCs in Signal Analyzers and Wireless Testers

TIDA-01016 is a clocking solution for high dynamic range high speed ADC. RF input signals are directly captured using the RF sampling approach by high speed ADC. The ADC32RF45 is a dual- channel, 14-bit, 3-GSPS RF sampling ADC. The 3-dB input bandwidth is 3.2 GHz, and it captures signals up to 4 (...)
Design guide: PDF
Schematic: PDF
Reference designs

TIDA-00814 — RF-Sampling S-Band Radar Receiver Reference Design

A direct RF sampling receiver approach to a radar system operating in S-band is demonstrated using the ADC32RF45, 3-Gsps, 14-bit analog to digital converter (ADC). RF sampling reduces the complexity of a system by removing down conversion and using a high sampling rate enables wider signal (...)
Design guide: PDF
Schematic: PDF
Reference designs

TIDA-00069 — FPGA Firmware Example of How To Interface Altera FPGAs to High-Speed LVDS-Interface Data Converters

This reference design and the associated example Verilog code can be used as a starting point for interfacing Altera FPGAs to Texas Instruments' high-speed LVDS-interface analog-to-digital converters (ADC) and digital-to-analog converters (DAC). The firmware implementation is explained and the (...)
User guide: PDF
Schematic: PDF
Package Pins CAD symbols, footprints & 3D models
TO-263 (KTW) 7 Ultra Librarian
VQFN (RGR) 20 Ultra Librarian
VQFN (RGW) 20 Ultra Librarian

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