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UCC21225A

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2.5kVrms, 4A/6A dual-channel isolated gate driver with dual input, 5V UVLO & LGA package

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Data sheet

UCC21225A

ACTIVE
Data sheet Order now

Product details

Number of channels 2 Isolation rating Functional Withstand isolation voltage (VISO) (Vrms) 2500 Working isolation voltage (VIOWM) (Vrms) 792 Transient isolation voltage (VIOTM) (VPK) 3535 Power switch GaNFET, IGBT, MOSFET, SiCFET Peak output current (A) 6 Features Disable, Programmable dead time Output VCC/VDD (max) (V) 25 Output VCC/VDD (min) (V) 6.5 Input supply voltage (min) (V) 3 Input supply voltage (max) (V) 18 Propagation delay time (µs) 0.019 Input threshold CMOS, TTL Operating temperature range (°C) -40 to 125 Rating Catalog Bootstrap supply voltage (max) (V) 792 Rise time (ns) 6 Fall time (ns) 7 Undervoltage lockout (typ) (V) 5
Number of channels 2 Isolation rating Functional Withstand isolation voltage (VISO) (Vrms) 2500 Working isolation voltage (VIOWM) (Vrms) 792 Transient isolation voltage (VIOTM) (VPK) 3535 Power switch GaNFET, IGBT, MOSFET, SiCFET Peak output current (A) 6 Features Disable, Programmable dead time Output VCC/VDD (max) (V) 25 Output VCC/VDD (min) (V) 6.5 Input supply voltage (min) (V) 3 Input supply voltage (max) (V) 18 Propagation delay time (µs) 0.019 Input threshold CMOS, TTL Operating temperature range (°C) -40 to 125 Rating Catalog Bootstrap supply voltage (max) (V) 792 Rise time (ns) 6 Fall time (ns) 7 Undervoltage lockout (typ) (V) 5
VLGA (NPL) 13 25 mm² 5 x 5
  • Universal: Dual Low-Side, Dual High-Side or Half-Bridge Driver
  • 5 x 5 mm, Space-Saving LGA-13 Package
  • Switching Parameters:
    • 19-ns Typical Propagation Delay
    • 5-ns Maximum Delay Matching
    • 6-ns Maximum Pulse-Width Distortion
  • CMTI Greater than 100-V/ns
  • 4-A Peak Source, 6-A Peak Sink Output
  • TTL and CMOS Compatible Inputs
  • 3-V to 18-V Input VCCI Range
  • Up to 25-V VDD with 5-V UVLO
  • Programmable Overlap and Dead Time
  • Rejects Input Transients Shorter than 5-ns
  • Fast Disable for Power Sequencing
  • Safety-Related Certifications:
    • 3535-VPK Isolation per DIN V VDE V 0884-11:2017-01
    • 2500-VRMS Isolation for 1 Minute per UL 1577
    • CQC per GB4943.1-2011 (Planned)
  • Universal: Dual Low-Side, Dual High-Side or Half-Bridge Driver
  • 5 x 5 mm, Space-Saving LGA-13 Package
  • Switching Parameters:
    • 19-ns Typical Propagation Delay
    • 5-ns Maximum Delay Matching
    • 6-ns Maximum Pulse-Width Distortion
  • CMTI Greater than 100-V/ns
  • 4-A Peak Source, 6-A Peak Sink Output
  • TTL and CMOS Compatible Inputs
  • 3-V to 18-V Input VCCI Range
  • Up to 25-V VDD with 5-V UVLO
  • Programmable Overlap and Dead Time
  • Rejects Input Transients Shorter than 5-ns
  • Fast Disable for Power Sequencing
  • Safety-Related Certifications:
    • 3535-VPK Isolation per DIN V VDE V 0884-11:2017-01
    • 2500-VRMS Isolation for 1 Minute per UL 1577
    • CQC per GB4943.1-2011 (Planned)

The UCC21225A is an isolated dual-channel gate driver with 4-A source and 6-A sink peak current in a 5-mm x 5-mm LGA-13 package. It is designed to drive power transistors up to 5-MHz with best-in-class propagation delay and pulse-width distortion.

The input side is isolated from the two output drivers by a 2.5-kVRMS isolation barrier, with 100-V/ns minimum common-mode transient immunity (CMTI). Internal functional isolation between the two secondary side drivers allows working voltage up to 700-VDC.

This driver can be configured as two low-side, two high-side, or a half-bridge driver with programmable dead time (DT). A disable pin shuts down both outputs simultaneously when it is set high, and allows normal operation when left open or grounded.

The device accepts VDD supply voltages up to 25-V. A wide input VCCI range from 3-V to 18-V makes the driver suitable for interfacing with both analog and digital controllers. All the supply voltage pins have under voltage lock-out (UVLO) protection.

With all these advanced features, the UCC21225A enables high power density, high efficiency, and robustness in a wide variety of power applications.

The UCC21225A is an isolated dual-channel gate driver with 4-A source and 6-A sink peak current in a 5-mm x 5-mm LGA-13 package. It is designed to drive power transistors up to 5-MHz with best-in-class propagation delay and pulse-width distortion.

The input side is isolated from the two output drivers by a 2.5-kVRMS isolation barrier, with 100-V/ns minimum common-mode transient immunity (CMTI). Internal functional isolation between the two secondary side drivers allows working voltage up to 700-VDC.

This driver can be configured as two low-side, two high-side, or a half-bridge driver with programmable dead time (DT). A disable pin shuts down both outputs simultaneously when it is set high, and allows normal operation when left open or grounded.

The device accepts VDD supply voltages up to 25-V. A wide input VCCI range from 3-V to 18-V makes the driver suitable for interfacing with both analog and digital controllers. All the supply voltage pins have under voltage lock-out (UVLO) protection.

With all these advanced features, the UCC21225A enables high power density, high efficiency, and robustness in a wide variety of power applications.

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Technical documentation

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Type Title Date
* Data sheet UCC21225A 4-A, 6-A, 2.5-kVRMS Isolated Dual-Channel Gate Driver in LGA datasheet (Rev. A) PDF | HTML 07 Feb 2018
Certificate VDE Certificate for Basic Isolation for DIN EN IEC 60747-17 (Rev. W) 31 Jan 2024
Application brief External Gate Resistor Selection Guide (Rev. A) 28 Feb 2020
Application brief Understanding Peak IOH and IOL Currents (Rev. A) 28 Feb 2020
Application brief How to Drive High Voltage GaN FETs with UCC21220A 06 Mar 2019
Certificate UL Certification E181974 Vol 4. Sec 8 (Rev. A) 23 Jul 2018
Certificate CQC Product Certificate 2 07 Feb 2018
EVM User's guide Using the UCC21225AEVM-365 14 Mar 2017

Design & development

For additional terms or required resources, click any title below to view the detail page where available.

Evaluation board

UCC21225AEVM-365 — UCC21225A 4-A, 6-A, 5.7-kVRMS Isolated Dual-Channel Gate Driver Evaluation Module

UCC21225AEVM-365 is designed for evaluating UCC21225ANPL, which is an isolated dual-channel gate driver with 4-A source and 6-A sink peak current capability in a 5x5 LGA package. This EVM can be used as a reference design for driving power MOSFETs, IGBTs, and SiC MOSFETs with UCC21225A pin (...)
User guide: PDF
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Simulation model

UCC21225A PSpice Transient Model

SLUM574.ZIP (55 KB) - PSpice Model
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Simulation model

UCC21225A Unencrypted PSpice Transient Model

SLUM575.ZIP (4 KB) - PSpice Model
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Simulation tool

PSPICE-FOR-TI — PSpice® for TI design and simulation tool

PSpice® for TI is a design and simulation environment that helps evaluate functionality of analog circuits. This full-featured, design and simulation suite uses an analog analysis engine from Cadence®. Available at no cost, PSpice for TI includes one of the largest model libraries in the (...)
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Reference designs

PMP40988 — Variable-frequency, ZVS, 5-kW, GaN-based, two-phase totem-pole PFC reference design

This reference design is a high-density and high-efficiency 5-kW totem-pole power factor correction (PFC) design. The design uses a two-phase totem-pole PFC operating with variable frequency and zero voltage switching (ZVS). The control uses a new topology and improved triangular current mode (...)
Test report: PDF
Reference designs

PMP23332 — Interleaved and multiphase inverting buck-boost converter reference design

This reference design uses the UCD3138064A as a digital controller to control inverting buck-boost with the capability of supporting two-phase peak current mode control. The soft-switching technology is used in this design to improve the power efficiency. The input voltage range is -62 V to -36 V. (...)
Test report: PDF
Reference designs

PMP20587 — Inverting buck-boost reference design

This reference design uses UCD3138064A as a digital controller to control two-phase two-rail inverting buck-boost. This non-isolated converter is used for wireless radio power. The input voltage is from -35 V to -60 V. There are two outputs. The default output voltage of rail 1 is 32 V and max (...)
Test report: PDF
Schematic: PDF
Reference designs

PMP21943 — 48-V / 25-A negative-to-positive synchronous buck-boost reference design for power amplifiers

This reference design is a negative-to-positive synchronous buck-boost converter for power amplifier applications. The circuit is powered from the nominal -48-V system source to provide an output voltage of +48 V at 25 A. The design uses two dual synchronous boost controllers for 4-phase operation (...)
Test report: PDF
Schematic: PDF
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