TMS570LC4357-EP

現行

強化型產品、16/32 位元 RISC 快閃記憶體 MCU、Arm Cortex-R5F、EMAC、FlexRay

產品詳細資料

Frequency (MHz) 300 Flash memory (kByte) 4096 RAM (kByte) 512 ADC type 2 x 12-bit (41ch) Number of GPIOs 168 UART 4 Features Hercules high-performance microcontroller TI functional safety category Functional Safety-Compliant Operating temperature range (°C) -55 to 125 Ethernet Yes PWM (Ch) 78 CAN (#) 4 Power supply solution TPS65381A-Q1 Communication interface CAN, Ethernet, FlexRay, SPI, UART Rating HiRel Enhanced Product
Frequency (MHz) 300 Flash memory (kByte) 4096 RAM (kByte) 512 ADC type 2 x 12-bit (41ch) Number of GPIOs 168 UART 4 Features Hercules high-performance microcontroller TI functional safety category Functional Safety-Compliant Operating temperature range (°C) -55 to 125 Ethernet Yes PWM (Ch) 78 CAN (#) 4 Power supply solution TPS65381A-Q1 Communication interface CAN, Ethernet, FlexRay, SPI, UART Rating HiRel Enhanced Product
NFBGA (GWT) 337 256 mm² 16 x 16
  • High-Performance Automotive-Grade Microcontroller for Safety-Critical Applications
    • Dual-Core Lockstep CPUs With ECC-Protected Caches
    • ECC on Flash and RAM Interfaces
    • Built-In Self-Test (BIST) for CPU, High-End Timers, and On-Chip RAMs
    • Error Signaling Module (ESM) With Error Pin
    • Voltage and Clock Monitoring
  • ARM® Cortex® - R5F 32-Bit RISC CPU
    • 1.66 DMIPS/MHz With 8-Stage Pipeline
    • FPU With Single- and Double-Precision
    • 16-Region Memory Protection Unit (MPU)
    • 32KB of Instruction and 32KB of Data Caches With ECC
    • Open Architecture With Third-Party Support
  • Operating Conditions
    • Up to 300-MHz CPU Clock
    • Core Supply Voltage (VCC): 1.14 to 1.32 V
    • I/O Supply Voltage (VCCIO): 3.0 to 3.6 V
  • Integrated Memory
    • 4MB of Program Flash With ECC
    • 512KB of RAM With ECC
    • 128KB of Data Flash for Emulated EEPROM With ECC
  • 16-Bit External Memory Interface (EMIF)
  • Hercules™ Common Platform Architecture
    • Consistent Memory Map Across Family
    • Real-Time Interrupt (RTI) Timer (OS Timer)
    • Two 128-Channel Vectored Interrupt Modules (VIMs) With ECC Protection on Vector Table
      • VIM1 and VIM2 in Safety Lockstep Mode
    • Two 2-Channel Cyclic Redundancy Checker (CRC) Modules
  • Direct Memory Access (DMA) Controller
    • 32 Channels and 48 Peripheral Requests
    • ECC Protection for Control Packet RAM
    • DMA Accesses Protected by Dedicated MPU
  • Frequency-Modulated Phase-Locked Loop (FMPLL) With Built-In Slip Detector
  • Separate Nonmodulating PLL
  • IEEE 1149.1 JTAG, Boundary Scan, and ARM CoreSight™ Components
  • Advanced JTAG Security Module (AJSM) 
  • Trace and Calibration Capabilities
    • ETM™, RTP, DMM, POM
  • Multiple Communication Interfaces
    • 10/100 Mbps Ethernet MAC (EMAC)
      • IEEE 802.3 Compliant (3.3-V I/O Only)
      • Supports MII, RMII, and MDIO
    • FlexRay Controller With 2 Channels
      • 8KB of Message RAM With ECC Protection
      • Dedicated FlexRay Transfer Unit (FTU)
    • Four CAN Controller (DCAN) Modules
      • 64 Mailboxes, Each With ECC Protection
      • Compliant to CAN Protocol Version 2.0B
    • Two Inter-Integrated Circuit (I2C) Modules
    • Five Multibuffered Serial Peripheral Interface (MibSPI) Modules
      • MibSPI1: 256 Words With ECC Protection
      • Other MibSPIs: 128 Words With ECC Protection
    • Four UART (SCI) Interfaces, Two With Local Interconnect Network (LIN 2.1) Interface Support
  • Two Next Generation High-End Timer (N2HET) Modules
    • 32 Programmable Channels Each
    • 256-Word Instruction RAM With Parity
    • Hardware Angle Generator for Each N2HET
    • Dedicated High-End Timer Transfer Unit (HTU) for Each N2HET
  • Two 12-Bit Multibuffered Analog-to-Digital Converter (MibADC) Modules
    • MibADC1: 32 Channels Plus Control for up to 1024 Off-Chip Channels
    • MibADC2: 25 Channels
    • 16 Shared Channels
    • 64 Result Buffers Each With Parity Protection
  • Enhanced Timing Peripherals
    • 7 Enhanced Pulse Width Modulator (ePWM) Modules
    • 6 Enhanced Capture (eCAP) Modules
    • 2 Enhanced Quadrature Encoder Pulse (eQEP) Modules
  • Three On-Die Temperature Sensors
  • Up to 145 Pins Available for General-Purpose I/O (GPIO)
  • 16 Dedicated GPIO Pins With External Interrupt Capability
  • Packages
    • 337-Ball Grid Array (GWT) [Green]
  • Supports Defense, Aerospace, and Medical Applications:
    • Controlled Baseline
    • One Assembly/Test Site
    • One Fabrication Site
    • Available in Extended (–55°C to 125°C) Temperature Range
    • Extended Product Life Cycle
    • Extended Product-Change Notification
    • Product Traceability
  • High-Performance Automotive-Grade Microcontroller for Safety-Critical Applications
    • Dual-Core Lockstep CPUs With ECC-Protected Caches
    • ECC on Flash and RAM Interfaces
    • Built-In Self-Test (BIST) for CPU, High-End Timers, and On-Chip RAMs
    • Error Signaling Module (ESM) With Error Pin
    • Voltage and Clock Monitoring
  • ARM® Cortex® - R5F 32-Bit RISC CPU
    • 1.66 DMIPS/MHz With 8-Stage Pipeline
    • FPU With Single- and Double-Precision
    • 16-Region Memory Protection Unit (MPU)
    • 32KB of Instruction and 32KB of Data Caches With ECC
    • Open Architecture With Third-Party Support
  • Operating Conditions
    • Up to 300-MHz CPU Clock
    • Core Supply Voltage (VCC): 1.14 to 1.32 V
    • I/O Supply Voltage (VCCIO): 3.0 to 3.6 V
  • Integrated Memory
    • 4MB of Program Flash With ECC
    • 512KB of RAM With ECC
    • 128KB of Data Flash for Emulated EEPROM With ECC
  • 16-Bit External Memory Interface (EMIF)
  • Hercules™ Common Platform Architecture
    • Consistent Memory Map Across Family
    • Real-Time Interrupt (RTI) Timer (OS Timer)
    • Two 128-Channel Vectored Interrupt Modules (VIMs) With ECC Protection on Vector Table
      • VIM1 and VIM2 in Safety Lockstep Mode
    • Two 2-Channel Cyclic Redundancy Checker (CRC) Modules
  • Direct Memory Access (DMA) Controller
    • 32 Channels and 48 Peripheral Requests
    • ECC Protection for Control Packet RAM
    • DMA Accesses Protected by Dedicated MPU
  • Frequency-Modulated Phase-Locked Loop (FMPLL) With Built-In Slip Detector
  • Separate Nonmodulating PLL
  • IEEE 1149.1 JTAG, Boundary Scan, and ARM CoreSight™ Components
  • Advanced JTAG Security Module (AJSM) 
  • Trace and Calibration Capabilities
    • ETM™, RTP, DMM, POM
  • Multiple Communication Interfaces
    • 10/100 Mbps Ethernet MAC (EMAC)
      • IEEE 802.3 Compliant (3.3-V I/O Only)
      • Supports MII, RMII, and MDIO
    • FlexRay Controller With 2 Channels
      • 8KB of Message RAM With ECC Protection
      • Dedicated FlexRay Transfer Unit (FTU)
    • Four CAN Controller (DCAN) Modules
      • 64 Mailboxes, Each With ECC Protection
      • Compliant to CAN Protocol Version 2.0B
    • Two Inter-Integrated Circuit (I2C) Modules
    • Five Multibuffered Serial Peripheral Interface (MibSPI) Modules
      • MibSPI1: 256 Words With ECC Protection
      • Other MibSPIs: 128 Words With ECC Protection
    • Four UART (SCI) Interfaces, Two With Local Interconnect Network (LIN 2.1) Interface Support
  • Two Next Generation High-End Timer (N2HET) Modules
    • 32 Programmable Channels Each
    • 256-Word Instruction RAM With Parity
    • Hardware Angle Generator for Each N2HET
    • Dedicated High-End Timer Transfer Unit (HTU) for Each N2HET
  • Two 12-Bit Multibuffered Analog-to-Digital Converter (MibADC) Modules
    • MibADC1: 32 Channels Plus Control for up to 1024 Off-Chip Channels
    • MibADC2: 25 Channels
    • 16 Shared Channels
    • 64 Result Buffers Each With Parity Protection
  • Enhanced Timing Peripherals
    • 7 Enhanced Pulse Width Modulator (ePWM) Modules
    • 6 Enhanced Capture (eCAP) Modules
    • 2 Enhanced Quadrature Encoder Pulse (eQEP) Modules
  • Three On-Die Temperature Sensors
  • Up to 145 Pins Available for General-Purpose I/O (GPIO)
  • 16 Dedicated GPIO Pins With External Interrupt Capability
  • Packages
    • 337-Ball Grid Array (GWT) [Green]
  • Supports Defense, Aerospace, and Medical Applications:
    • Controlled Baseline
    • One Assembly/Test Site
    • One Fabrication Site
    • Available in Extended (–55°C to 125°C) Temperature Range
    • Extended Product Life Cycle
    • Extended Product-Change Notification
    • Product Traceability

The TMS570LC4357-EP device is part of the Hercules TMS570 series of high-performance automotive-grade ARM® Cortex®-R-based MCUs. Comprehensive documentation, tools, and software are available to assist in the development of ISO 26262 and IEC 61508 functional safety applications. Start evaluating today with the Hercules TMS570LC43x LaunchPad Development Kit. The TMS570LC4357-EP device has on-chip diagnostic features including: dual CPUs in lockstep, Built-In Self-Test (BIST) logic for CPU, the N2HET coprocessors, and for on-chip SRAMs; ECC protection on the L1 caches, L2 flash, and SRAM memories. The device also supports ECC or parity protection on peripheral memories and loopback capability on peripheral I/Os.

The TMS570LC4357-EP device integrates two ARM Cortex-R5F floating-point CPUs, operating in lockstep, which offer an efficient 1.66 DMIPS/MHz, and can run up to 300 MHz providing up to 498 DMIPS. The device supports the big-endian [BE32] format.

The TMS570LC4357-EP device has 4MB of integrated flash and 512KB of data RAM with single-bit error correction and double-bit error detection. The flash memory on this device is a nonvolatile, electrically erasable and programmable memory, implemented with a 64-bit-wide data bus interface. The flash operates on a 3.3-V supply input (the same level as the I/O supply) for all read, program, and erase operations. The SRAM supports read and write accesses in byte, halfword, and word modes.

The TMS570LC4357-EP device features peripherals for real-time control-based applications, including two Next Generation High-End Timer (N2HET) timing coprocessors with up to 64 total I/O terminals.

The N2HET is an advanced intelligent timer that provides sophisticated timing functions for real-time applications. The timer is software-controlled, with a specialized timer micromachine and an attached I/O port. The N2HET can be used for pulse-width-modulated outputs, capture or compare inputs, or GPIO. The N2HET is especially well suited for applications requiring multiple sensor information or drive actuators with complex and accurate time pulses. The High-End Timer Transfer Unit (HTU) can perform DMA-type transactions to transfer N2HET data to or from main memory. A Memory Protection Unit (MPU) is built into the HTU.

The Enhanced Pulse Width Modulator (ePWM) module can generate complex pulse width waveforms with minimal CPU overhead or intervention. The ePWM is easy to use and supports both high-side and low-side PWM and deadband generation. With integrated trip zone protection and synchronization with the on-chip MibADC, the ePWM is ideal for digital motor control applications.

The Enhanced Capture (eCAP) module is essential in systems where the accurately timed capture of external events is important. The eCAP can also be used to monitor the ePWM outputs or for simple PWM generation when not needed for capture applications.

The Enhanced Quadrature Encoder Pulse (eQEP) module directly interfaces with a linear or rotary incremental encoder to get position, direction, and speed information from a rotating machine as used in high-performance motion and position-control systems.

The device has two 12-bit-resolution MibADCs with 41 total channels and 64 words of parity-protected buffer RAM. The MibADC channels can be converted individually or by group for special conversion sequences. Sixteen channels are shared between the two MibADCs. Each MibADC supports three separate groupings. Each sequence can be converted once when triggered or configured for continuous conversion mode. The MibADC has a 10-bit mode for use when compatibility with older devices or faster conversion time is desired. One of the channels in MibADC1 and two of the channels in MibADC2 can be used to convert temperature measurements from the three on-chip temperature sensors.

The device has multiple communication interfaces: Five MibSPIs; four UART (SCI) interfaces, two with LIN support; four CANs; two I2C modules; one Ethernet Controller; and one FlexRay controller. The SPI provides a convenient method of serial interaction for high-speed communications between similar shift-register type devices. The LIN supports the Local Interconnect standard (LIN 2.1) and can be used as a UART in full-duplex mode using the standard Non-Return-to-Zero (NRZ) format. The DCAN supports the CAN 2.0B protocol standard and uses a serial, multimaster communication protocol that efficiently supports distributed real-time control with robust communication rates of up to 1 Mbps. The DCAN is ideal for applications operating in noisy and harsh environments (for example, automotive and industrial fields) that require reliable serial communication or multiplexed wiring. The FlexRay controller uses a dual-channel serial, fixed time base multimaster communication protocol with communication rates of 10 Mbps per channel. A FlexRay Transfer Unit (FTU) enables autonomous transfers of FlexRay data to and from main CPU memory. HTU transfers are protected by a dedicated, built-in MPU. The Ethernet module supports MII, RMII, and Management Data I/O (MDIO) interfaces. The I2C module is a multimaster communication module providing an interface between the microcontroller and an I2C-compatible device through the I2C serial bus. The I2C module supports speeds of 100 and 400 kbps.

The Frequency-Modulated Phase-Locked Loop (FMPLL) clock module multiplies the external frequency reference to a higher frequency for internal use. The Global Clock Module (GCM) manages the mapping between the available clock sources and the internal device clock domains.

The device also has two External Clock Prescaler (ECP) modules. When enabled, the ECPs output a continuous external clock on the ECLK1 and ECLK2 balls. The ECLK frequency is a user-programmable ratio of the peripheral interface clock (VCLK) frequency. This low-frequency output can be monitored externally as an indicator of the device operating frequency.

The Direct Memory Access (DMA) controller has 32 channels, 48 peripheral requests, and ECC protection on its memory. An MPU is built into the DMA to protect memory against erroneous transfers.

The Error Signaling Module (ESM) monitors on-chip device errors and determines whether an interrupt or external Error pin/ball (nERROR) is triggered when a fault is detected. The nERROR signal can be monitored externally as an indicator of a fault condition in the microcontroller.

The External Memory Interface (EMIF) provides a memory extension to asynchronous and synchronous memories or other slave devices.

A Parameter Overlay Module (POM) is included to enhance the debugging capabilities of application code. The POM can reroute flash accesses to internal RAM or to the EMIF, thus avoiding the reprogramming steps necessary for parameter updates in flash. This capability is particularly helpful during real-time system calibration cycles.

Several interfaces are implemented to enhance the debugging capabilities of application code. In addition to the built-in ARM Cortex-R5F CoreSight debug features, the Embedded Cross Trigger (ECT) supports the interaction and synchronization of multiple triggering events within the SoC. An External Trace Macrocell (ETM) provides instruction and data trace of program execution. For instrumentation purposes, a RAM Trace Port (RTP) module is implemented to support high-speed tracing of RAM and peripheral accesses by the CPU or any other master. A Data Modification Module (DMM) gives the ability to write external data into the device memory. Both the RTP and DMM have no or minimal impact on the program execution time of the application code.

With integrated safety features and a wide choice of communication and control peripherals, the TMS570LC4357-EP device is an ideal solution for high-performance real-time control applications with safety-critical requirements.

The TMS570LC4357-EP device is part of the Hercules TMS570 series of high-performance automotive-grade ARM® Cortex®-R-based MCUs. Comprehensive documentation, tools, and software are available to assist in the development of ISO 26262 and IEC 61508 functional safety applications. Start evaluating today with the Hercules TMS570LC43x LaunchPad Development Kit. The TMS570LC4357-EP device has on-chip diagnostic features including: dual CPUs in lockstep, Built-In Self-Test (BIST) logic for CPU, the N2HET coprocessors, and for on-chip SRAMs; ECC protection on the L1 caches, L2 flash, and SRAM memories. The device also supports ECC or parity protection on peripheral memories and loopback capability on peripheral I/Os.

The TMS570LC4357-EP device integrates two ARM Cortex-R5F floating-point CPUs, operating in lockstep, which offer an efficient 1.66 DMIPS/MHz, and can run up to 300 MHz providing up to 498 DMIPS. The device supports the big-endian [BE32] format.

The TMS570LC4357-EP device has 4MB of integrated flash and 512KB of data RAM with single-bit error correction and double-bit error detection. The flash memory on this device is a nonvolatile, electrically erasable and programmable memory, implemented with a 64-bit-wide data bus interface. The flash operates on a 3.3-V supply input (the same level as the I/O supply) for all read, program, and erase operations. The SRAM supports read and write accesses in byte, halfword, and word modes.

The TMS570LC4357-EP device features peripherals for real-time control-based applications, including two Next Generation High-End Timer (N2HET) timing coprocessors with up to 64 total I/O terminals.

The N2HET is an advanced intelligent timer that provides sophisticated timing functions for real-time applications. The timer is software-controlled, with a specialized timer micromachine and an attached I/O port. The N2HET can be used for pulse-width-modulated outputs, capture or compare inputs, or GPIO. The N2HET is especially well suited for applications requiring multiple sensor information or drive actuators with complex and accurate time pulses. The High-End Timer Transfer Unit (HTU) can perform DMA-type transactions to transfer N2HET data to or from main memory. A Memory Protection Unit (MPU) is built into the HTU.

The Enhanced Pulse Width Modulator (ePWM) module can generate complex pulse width waveforms with minimal CPU overhead or intervention. The ePWM is easy to use and supports both high-side and low-side PWM and deadband generation. With integrated trip zone protection and synchronization with the on-chip MibADC, the ePWM is ideal for digital motor control applications.

The Enhanced Capture (eCAP) module is essential in systems where the accurately timed capture of external events is important. The eCAP can also be used to monitor the ePWM outputs or for simple PWM generation when not needed for capture applications.

The Enhanced Quadrature Encoder Pulse (eQEP) module directly interfaces with a linear or rotary incremental encoder to get position, direction, and speed information from a rotating machine as used in high-performance motion and position-control systems.

The device has two 12-bit-resolution MibADCs with 41 total channels and 64 words of parity-protected buffer RAM. The MibADC channels can be converted individually or by group for special conversion sequences. Sixteen channels are shared between the two MibADCs. Each MibADC supports three separate groupings. Each sequence can be converted once when triggered or configured for continuous conversion mode. The MibADC has a 10-bit mode for use when compatibility with older devices or faster conversion time is desired. One of the channels in MibADC1 and two of the channels in MibADC2 can be used to convert temperature measurements from the three on-chip temperature sensors.

The device has multiple communication interfaces: Five MibSPIs; four UART (SCI) interfaces, two with LIN support; four CANs; two I2C modules; one Ethernet Controller; and one FlexRay controller. The SPI provides a convenient method of serial interaction for high-speed communications between similar shift-register type devices. The LIN supports the Local Interconnect standard (LIN 2.1) and can be used as a UART in full-duplex mode using the standard Non-Return-to-Zero (NRZ) format. The DCAN supports the CAN 2.0B protocol standard and uses a serial, multimaster communication protocol that efficiently supports distributed real-time control with robust communication rates of up to 1 Mbps. The DCAN is ideal for applications operating in noisy and harsh environments (for example, automotive and industrial fields) that require reliable serial communication or multiplexed wiring. The FlexRay controller uses a dual-channel serial, fixed time base multimaster communication protocol with communication rates of 10 Mbps per channel. A FlexRay Transfer Unit (FTU) enables autonomous transfers of FlexRay data to and from main CPU memory. HTU transfers are protected by a dedicated, built-in MPU. The Ethernet module supports MII, RMII, and Management Data I/O (MDIO) interfaces. The I2C module is a multimaster communication module providing an interface between the microcontroller and an I2C-compatible device through the I2C serial bus. The I2C module supports speeds of 100 and 400 kbps.

The Frequency-Modulated Phase-Locked Loop (FMPLL) clock module multiplies the external frequency reference to a higher frequency for internal use. The Global Clock Module (GCM) manages the mapping between the available clock sources and the internal device clock domains.

The device also has two External Clock Prescaler (ECP) modules. When enabled, the ECPs output a continuous external clock on the ECLK1 and ECLK2 balls. The ECLK frequency is a user-programmable ratio of the peripheral interface clock (VCLK) frequency. This low-frequency output can be monitored externally as an indicator of the device operating frequency.

The Direct Memory Access (DMA) controller has 32 channels, 48 peripheral requests, and ECC protection on its memory. An MPU is built into the DMA to protect memory against erroneous transfers.

The Error Signaling Module (ESM) monitors on-chip device errors and determines whether an interrupt or external Error pin/ball (nERROR) is triggered when a fault is detected. The nERROR signal can be monitored externally as an indicator of a fault condition in the microcontroller.

The External Memory Interface (EMIF) provides a memory extension to asynchronous and synchronous memories or other slave devices.

A Parameter Overlay Module (POM) is included to enhance the debugging capabilities of application code. The POM can reroute flash accesses to internal RAM or to the EMIF, thus avoiding the reprogramming steps necessary for parameter updates in flash. This capability is particularly helpful during real-time system calibration cycles.

Several interfaces are implemented to enhance the debugging capabilities of application code. In addition to the built-in ARM Cortex-R5F CoreSight debug features, the Embedded Cross Trigger (ECT) supports the interaction and synchronization of multiple triggering events within the SoC. An External Trace Macrocell (ETM) provides instruction and data trace of program execution. For instrumentation purposes, a RAM Trace Port (RTP) module is implemented to support high-speed tracing of RAM and peripheral accesses by the CPU or any other master. A Data Modification Module (DMM) gives the ability to write external data into the device memory. Both the RTP and DMM have no or minimal impact on the program execution time of the application code.

With integrated safety features and a wide choice of communication and control peripherals, the TMS570LC4357-EP device is an ideal solution for high-performance real-time control applications with safety-critical requirements.

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類型 標題 日期
* Data sheet TMS570LC4357-EP Hercules™ Microcontroller Based on the ARM® Cortex®-R Core datasheet (Rev. A) PDF | HTML 2019年 9月 18日
* Errata TMS570LC4357 Microcontroller Silicon Errata (Silicon Revision A) (Rev. D) 2016年 5月 31日
* VID TMS570LC4357-EP VID V62/186060-01XF 2020年 9月 22日
* User guide TMS570LC43x 16/32 RISC Flash Microcontroller Technical Reference Manual (Rev. A) 2018年 3月 1日
Certificate TUEV SUED Certification for TMS570LC43x (Rev. A) 2024年 6月 21日
Functional safety information Certification for Functional Safety Hardware Process (Rev. B) 2022年 6月 9日
More literature Hercules™ Diagnostic Library Test Automation Unit User Guide (Rev. B) PDF | HTML 2020年 1月 9日
More literature HALCoGen-CSP 04.07.01 (Rev. C) PDF | HTML 2020年 1月 8日
Functional safety information HALCoGen-CSP Installation Guide (Rev. B) PDF | HTML 2020年 1月 8日
Functional safety information HALCoGen-CSP User's Guide (Rev. C) PDF | HTML 2020年 1月 8日
Functional safety information Hercules Diagnostic Library -TAU Installation Guide (Rev. B) PDF | HTML 2020年 1月 8日
User guide Hercules Diagnostic Library CSP Without LDRA 2019年 10月 29日
More literature Diagnostic Library CSP Release Notes 2019年 10月 17日
Application note HALCoGen Ethernet Driver With lwIP Integration Demo and Active Webserver Demo PDF | HTML 2019年 9月 13日
Application note Hercules PLL Advisory SSWF021#45 Workaround (Rev. B) PDF | HTML 2019年 9月 9日
Application note CAN Bus Bootloader for Hercules Microcontrollers PDF | HTML 2019年 8月 21日
Application note HALCoGen CSP Without LDRA Release_Notes 2019年 8月 19日
User guide HALCoGen-CSP Without LDRA Installation Guide PDF | HTML 2019年 8月 19日
User guide HALCoGen-CSP Without LDRA User's Guide PDF | HTML 2019年 8月 19日
User guide Hercules Diagnostic Library - Without LDRA Installation Guide PDF | HTML 2019年 8月 19日
User guide Hercules™ Diag Lib Test Automation Unit Without LDRA User's Guide PDF | HTML 2019年 8月 19日
Functional safety information Certification for SafeTI Functional Safety Hardware Process (Rev. A) 2019年 6月 7日
Application note Interfacing the Embedded 12-Bit ADC in a TMS570LS31x/21x and RM4x Series MCUs (Rev. A) 2018年 4月 20日
Application note FreeRTOS on Hercules Devices_new 2018年 4月 19日
Application note MPU and Cache Settings in TMS570LC43x/RM57x Devices 2018年 4月 19日
Application note Sharing FEE Blocks Between the Bootloader and the Application 2017年 11月 7日
Application note Sharing Exception Vectors on Hercules™ Based Microcontrollers 2017年 3月 27日
Application note Hercules AJSM Unlock (Rev. A) PDF | HTML 2016年 10月 19日
Functional safety information Safety Manual for TMS570LC4x Hercules ARM Safety Critical Microcontrollers (Rev. A) 2016年 10月 19日
Application note How to Create a HALCoGen Based Project For CCS (Rev. B) 2016年 8月 9日
Application note Using the CRC Module on Hercules™-Based Microcontrollers 2016年 8月 4日
Application note Using the SPI as an Extra UART Transmitter 2016年 7月 26日
White paper Hercules MCUs for Use in Electrical Vehicle Battery Management system 2016年 5月 12日
Functional safety information Functional Safety Audit: SafeTI Functional Safety Hardware Development (Rev. A) 2016年 4月 25日
Application note High Speed Serial Bus Using the MibSPIP Module on Hercules-Based MCUs 2016年 4月 22日
Application note TMS570LC4357 and RM57L843 On-Chip Temperature Sensor Measurements 2016年 1月 18日
Functional safety information Enabling Functional Safety Using SafeTI Diagnostic Library 2015年 12月 18日
Application note Triggering ADC Using Internal Timer Events on Hercules MCUs 2015年 10月 19日
White paper Extending TI’s Hercules MCUs with the integrated flexible HET 2015年 9月 29日
Application note PWM Generation and Input Capture Using HALCoGen N2HET Module 2015年 6月 30日
Functional safety information Foundational Software for Functional Safety 2015年 5月 12日
Application note Sine Wave Generation Using PWM With Hercules N2HET and HTU 2015年 5月 12日
Application note Triangle/Trapezoid Wave Generation Using PWM With Hercules N2HET 2015年 5月 1日
Application note Nested Interrupts on Hercules ARM Cortex-R4/5-Based Microncontrollers 2015年 4月 23日
White paper Latch-Up White Paper PDF | HTML 2015年 4月 22日
Application note Interrupt and Exception Handling on Hercules ARM Cortex-R4/5-Based MCUs 2015年 4月 20日
Application note Monitoring PWM Using N2HET 2015年 4月 2日
Application note Hercules SCI With DMA 2015年 3月 22日
Certificate TÜV NORD Certificate for Functional Safety Software Development Process 2015年 2月 3日
Functional safety information Calculating Equivalent Power-on-Hours for Hercules Safety MCUs 2015年 1月 26日
Functional safety information TUV SUD ISO-13849 Safety Architecture Concept Study 2014年 7月 2日
More literature HaLCoGen Release Notes 2014年 6月 25日
Functional safety information Hercules TMS570LC/RM57Lx Safety MCUs Development Insights Using Debug and Trace 2014年 5月 21日
Application note Interfacing TPS65381 With Hercules Microcontrollers (Rev. A) 2014年 2月 14日
User guide Trace Analyzer User's Guide (Rev. B) 2013年 11月 18日
Functional safety information IEC 60730 and UL 1998 Safety Standard Compliance Made Easier with TI Hercules 2013年 10月 3日
White paper Model-Based Tool Qualification of the TI C/C++ ARM® Compiler 2013年 6月 6日
Application note Hercules Family Frequency Slewing to Reduce Voltage and Current Transients 2012年 7月 5日
Application note Basic PBIST Configuration and Influence on Current Consumption (Rev. C) 2012年 4月 12日
Application note Verification of Data Integrity Using CRC 2012年 2月 17日
Application note FlexRay Transfer Unit (FTU) Setup 2012年 1月 26日
User guide HET Integrated Development Environment User's Guide (Rev. A) 2011年 11月 17日
Functional safety information Important ARM Ltd Application Notes for TI Hercules ARM Safety MCUs 2011年 11月 17日
Functional safety information Execution Time Measurement for Hercules ARM Safety MCUs (Rev. A) 2011年 11月 4日
Application note Use of All 1'’s and All 0's Valid in Flash EEPROM Emulation 2011年 9月 27日
Application note 3.3 V I/O Considerations for Hercules Safety MCUs (Rev. A) 2011年 9月 6日
Functional safety information ADC Source Impedance for Hercules ARM Safety MCUs (Rev. B) 2011年 9月 6日
Functional safety information Configuring a CAN Node on Hercules ARM Safety MCUs 2011年 9月 6日
Functional safety information Configuring the Hercules ARM Safety MCU SCI/LIN Module for UART Communication (Rev. A) 2011年 9月 6日
Functional safety information Leveraging the High-End Timer Transfer Unit on Hercules ARM Safety MCUs (Rev. A) 2011年 9月 6日
Functional safety information Hercules™ Microcontrollers: Real-time MCUs for safety-critical products 2011年 9月 2日
Application note ECC Handling in TMSx70-Based Microcontrollers 2011年 2月 23日
User guide TI ICEPick Module Type C Reference Guide Public Version 2011年 2月 17日
Application note NHET Getting Started (Rev. B) 2010年 8月 30日
Functional safety information Generating Operating System Tick Using RTI on a Hercules ARM Safety MCU 2010年 7月 13日
Functional safety information Usage of MPU Subregions on TI Hercules ARM Safety MCUs 2010年 3月 10日
User guide TI Assembly Language Tools Enhanced High-End Timer (NHET) Assembler User's Guide 2010年 3月 4日
White paper Discriminating between Soft Errors and Hard Errors in RAM White Paper 2008年 6月 4日

設計與開發

如需其他條款或必要資源,請按一下下方的任何標題以檢視詳細頁面 (如有)。

偵錯探測器

TMDSEMU200-U — XDS200 USB 偵錯探測器

XDS200 是為 TI 嵌入式裝置偵錯的偵錯探測器 (模擬器)。與低成本 XDS110 和高效能 XDS560v2 相比,XDS200 是兼具低成本與優異效能的完美平衡,可在單一 pod 中支援各種標準 (IEEE1149.1、IEEE1149.7、SWD)。所有 XDS 偵錯探測器均支援具嵌入式追踪緩衝區 (ETB) 的 Arm® 與 DSP 處理器中的核心和系統追蹤功能。透過針腳進行核心追蹤則需要 XDS560v2 PRO TRACE

XDS200 透過 TI 20 針腳連接器 (配備適用 TI 14 針腳、Arm Cortex® 10 針腳和 Arm 20 針腳的多重轉接器) (...)

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偵錯探測器

TMDSEMU560V2STM-U — XDS560v2 System Trace USB 偵錯探測器

XDS560v2 是 XDS560™ 偵錯探測器系列的最高性能表現,支援傳統 JTAG 標準 (IEEE1149.1) 和 cJTAG (IEEE1149.7)。請注意,序列線偵錯 (SWD) 不受支援。

所有 XDS 偵錯探測器均支援所有具有嵌入式追踪緩衝區 (ETB) 的 ARM 和 DSP 處理器中的核心和系統追蹤功能。對於針腳追蹤則需要 XDS560v2 PRO TRACE

XDS560v2 透過 MIPI HSPT 60 針腳接頭 (具有用於 TI 14 針腳、TI 20 針腳和 ARM 20 針腳的多轉接器) 連接到目標電路板,並透過 USB2.0 高速 (480Mbps) (...)

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偵錯探測器

TMDSEMU560V2STM-UE — XDS560v2 System Trace USB 與乙太網路偵錯探測器

The XDS560v2 is the highest performance of the XDS560™ family of debug probes and supports both the traditional JTAG standard (IEEE1149.1) and cJTAG (IEEE1149.7). Note that it does not support serial wire debug (SWD).

All XDS debug probes support Core and System Trace in all ARM and DSP processors (...)

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開發套件

LAUNCHXL2-570LC43 — Hercules TMS570LC43x LaunchPad 開發套件

Hercules™ TMS570LC43x LaunchPad™ 開發套件是以最高性能 Hercules MCU TMS570LC4357 – Lockstep 快取 300MHz ARM® Cortex®-R5F 架構的 TMS570 系列汽車級 MCU 為基礎的低成本評估平台,專為協助開發 ISO 26262IEC 61508 功能安全應用而設計。

此 LaunchPad 具有像 IEEE 1588 精密時間乙太網路 PHY DP83630 之類的連線選項,並擁有除標準 BoosterPack 接頭之外的功能,可進一步擴充至 FPGA 或使用高密度接頭進行 MCU 平行介面的外部 (...)

使用指南: PDF
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開發套件

TMDX570LC43HDK — Hercules TMS570LC43x 開發套件

The TMS570LC43x Hercules Development Kit is ideal for getting started on development with the Hercules TMS570LC4357 high-performance safety microcontrollers. The kit is comprised of a development board, a mini-B USB cable, and an Ethernet cable.

Hercules Safety MCU Demos, HALCoGen, the diagnostics (...)

使用指南: PDF
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IDE、配置、編譯器或偵錯程式

CCSTUDIO Code Composer Studio™ integrated development environment (IDE)

Code Composer Studio is an integrated development environment (IDE) for TI's microcontrollers and processors. It is comprised of a rich suite of tools used to build, debug, analyze and optimize embedded applications. Code Composer Studio is available across Windows®, Linux® and macOS® platforms.

(...)

支援產品和硬體

支援產品和硬體

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檢查產品詳細資料頁面以確認支援。

啟動 下載選項
支援軟體

VCTR-3P-MICROSAR — 適用於微控制器和高性能電腦 (HPC) 的 Vector MICROSAR AUTOSAR 軟體

MICROSAR 與 DaVinci 產品系列透過適用於微控制器與 HPC 的精密嵌入式軟體和強大開發工具,簡化 ECU 開發。有了先進的基礎架構軟體,您即可為 ECU 建立最佳基礎,並利用相關工具簡化所有相關開發作業。MICROSAR 嵌入式軟體是根據 AUTOSAR 經典和適應性等相關標準所開發。軟體也適合符合最高 ASIL D 之 ISO 26262 標準的安全相關應用。此外,智慧網路安全功能可保護控制單元免受未經授權的存取和竄改。Vector 涵蓋所有汽車與其他工業應用的使用案例。對於配備高性能電腦的軟體定義車輛 (SDV),其可提供現代車輛作業系統,以做為開放式模組化軟體生態系統。
模擬型號

TMS570LC4357 ZWT Ibis Model

SPNM063.ZIP (617 KB) - IBIS Model
模擬型號

TMS570LC43xx ZWT BSDL Model

SPNM050.ZIP (9 KB) - BSDL Model
封裝 針腳 CAD 符號、佔位空間與 3D 模型
NFBGA (GWT) 337 Ultra Librarian

訂購與品質

內含資訊:
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  • REACH
  • 產品標記
  • 鉛塗層/球物料
  • MSL 等級/回焊峰值
  • MTBF/FIT 估算值
  • 材料內容
  • 認證摘要
  • 進行中持續性的可靠性監測
內含資訊:
  • 晶圓廠位置
  • 組裝地點

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