Product details

Resolution (bps) 10 Sample rate (max) (ksps) 38 Number of input channels 11 Interface type SPI Architecture SAR Input type Single-ended Multichannel configuration Multiplexed Rating Catalog Reference mode External Input voltage range (max) (V) 5.5 Input voltage range (min) (V) 0 Operating temperature range (°C) 0 to 70 Power consumption (typ) (mW) 4 Analog supply (min) (V) 4.5 Analog supply voltage (max) (V) 5.5 Digital supply (min) (V) 4.5 Digital supply (max) (V) 5.5
Resolution (bps) 10 Sample rate (max) (ksps) 38 Number of input channels 11 Interface type SPI Architecture SAR Input type Single-ended Multichannel configuration Multiplexed Rating Catalog Reference mode External Input voltage range (max) (V) 5.5 Input voltage range (min) (V) 0 Operating temperature range (°C) 0 to 70 Power consumption (typ) (mW) 4 Analog supply (min) (V) 4.5 Analog supply voltage (max) (V) 5.5 Digital supply (min) (V) 4.5 Digital supply (max) (V) 5.5
PDIP (N) 20 228.702 mm² 24.33 x 9.4 PLCC (FN) 20 98.01 mm² 9.9 x 9.9 SOIC (DW) 20 131.84 mm² 12.8 x 10.3
  • 10-Bit Resolution A/D Converter
  • 11 Analog Input Channels
  • Three Built-In Self-Test Modes
  • Inherent Sample-and-Hold Function
  • Total Unadjusted Error. . .±1 LSB Max
  • On-Chip System Clock
  • End-of-Conversion (EOC) Output
  • Terminal Compatible With TLC542
  • CMOS Technology

  • 10-Bit Resolution A/D Converter
  • 11 Analog Input Channels
  • Three Built-In Self-Test Modes
  • Inherent Sample-and-Hold Function
  • Total Unadjusted Error. . .±1 LSB Max
  • On-Chip System Clock
  • End-of-Conversion (EOC) Output
  • Terminal Compatible With TLC542
  • CMOS Technology

The TLC1542C, TLC1542I, TLC1542M, TLC1542Q, TLC1543C, TLC1543I, and TLC1543Q are CMOS 10-bit switched-capacitor successive-approximation analog-to-digital converters. These devices have three inputs and a 3-state output [chip select (CS), input-output clock (I/O CLOCK), address input (ADDRESS), and data output (DATA OUT)] that provide a direct 4-wire interface to the serial port of a host processor. These devices allow high-speed data transfers from the host.

In addition to a high-speed A/D converter and versatile control capability, these devices have an on-chip 14-channel multiplexer that can select any one of 11 analog inputs or any one of three internal self-test voltages. The sample-and-hold function is automatic. At the end of A/D conversion, the end-of-conversion (EOC) output goes high to indicate that conversion is complete. The converter incorporated in the devices features differential high-impedance reference inputs that facilitate ratiometric conversion, scaling, and isolation of analog circuitry from logic and supply noise. A switched-capacitor design allows low-error conversion over the full operating free-air temperature range.

The TLC1542C, TLC1542I, TLC1542M, TLC1542Q, TLC1543C, TLC1543I, and TLC1543Q are CMOS 10-bit switched-capacitor successive-approximation analog-to-digital converters. These devices have three inputs and a 3-state output [chip select (CS), input-output clock (I/O CLOCK), address input (ADDRESS), and data output (DATA OUT)] that provide a direct 4-wire interface to the serial port of a host processor. These devices allow high-speed data transfers from the host.

In addition to a high-speed A/D converter and versatile control capability, these devices have an on-chip 14-channel multiplexer that can select any one of 11 analog inputs or any one of three internal self-test voltages. The sample-and-hold function is automatic. At the end of A/D conversion, the end-of-conversion (EOC) output goes high to indicate that conversion is complete. The converter incorporated in the devices features differential high-impedance reference inputs that facilitate ratiometric conversion, scaling, and isolation of analog circuitry from logic and supply noise. A switched-capacitor design allows low-error conversion over the full operating free-air temperature range.

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* Data sheet 10-Bit Analog-to-Digital Converters With Serial Control And 11 Analog Inputs datasheet (Rev. G) 15 Jan 2006

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