The TLC2551, TLC2552, and TLC2555 are a family of high performance, 12-bit, low-power, miniature, CMOS analog-to-digital converters (ADC). The TLC255x family uses a 5-V supply. Devices are available with single, dual, or single pseudo-differential inputs. Each device has a chip select (CS)\, serial clock (SCLK), and serial data output (SDO) that provides a direct 3-wire interface to the serial port of most popular host microprocessors (SPI interface). When interfaced with a TMS320 DSP, a frame sync signal (FS) can be used to indicate the start of a serial data frame on CS\ for all devices or on FS for the TLC2551.
The TLC2551, TLC2552, and TLC2555 are designed to operate with very low power consumption. The power saving feature is further enhanced with an autopower down mode. This product family features a high-speed serial link to modern host processors with SCLK up to 20 MHz. The maximum SCLK frequency is dependent upon the mode of operation (see Table 1). The TLC255x family uses the SCLK as the conversion clock, which provides synchronous operation and a minimum conversion time of 1.5 µs using a 20 MHz SCLK.
The TLC2551, TLC2552, and TLC2555 are a family of high performance, 12-bit, low-power, miniature, CMOS analog-to-digital converters (ADC). The TLC255x family uses a 5-V supply. Devices are available with single, dual, or single pseudo-differential inputs. Each device has a chip select (CS)\, serial clock (SCLK), and serial data output (SDO) that provides a direct 3-wire interface to the serial port of most popular host microprocessors (SPI interface). When interfaced with a TMS320 DSP, a frame sync signal (FS) can be used to indicate the start of a serial data frame on CS\ for all devices or on FS for the TLC2551.
The TLC2551, TLC2552, and TLC2555 are designed to operate with very low power consumption. The power saving feature is further enhanced with an autopower down mode. This product family features a high-speed serial link to modern host processors with SCLK up to 20 MHz. The maximum SCLK frequency is dependent upon the mode of operation (see Table 1). The TLC255x family uses the SCLK as the conversion clock, which provides synchronous operation and a minimum conversion time of 1.5 µs using a 20 MHz SCLK.