CDC-CDCM7005-CALC

CDC7005 and CDCM7005 PLL Loop Bandwidth Calculator

CDC-CDCM7005-CALC

Overview

This tool helps to determine the right divider values (M, N & P) and to choose the filter type and components. This calculator will help to find out the appropriate loop bandwidth, phase margin, jitter peaking, etc. just varying the loop parameters like PFD frequency, filter components, Charge pump current, and VCO gain (Hz/V). This is a software package that lets the Engineers enter a piecewise-linear noise model for the VCO (VCXO) and the reference clock source to predict the PLL output phase noise and hence calculate the phase jitter.

Features

The lab view based tool can:

  • Determine the PFD frequency automatically
  • Calculate loop bandwidth, Phase margin and Jitter peaking
  • Predict the PLL output Phase noise
  • Calculate Phase Jitter (rms)
Clock jitter cleaners
CDCM7005 High performance, low phase noise, low skew clock synchronizer that synchronizes ref clock to VCXO
Clock generators
CDC7005 High performance, low phase noise, low skew clock synchronizer that synchronizes ref clock to VCXO
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