The Artix 7 power management reference design board uses power modules, linear regulators, and a PMBus compliant system controller to supply all required core and auxiliary voltages needed by the FPGA, including DDR memory termination. A Digital Power graphical user interface is used to monitor the voltage and current levels of the board’s power rails.
| Output voltage options | PMP7977.1 |
|---|---|
| Vin (Min) (V) | 4.5 |
| Vin (Max) (V) | 14 |
| Vout (Nom) (V) | 1 |
| Iout (Max) (A) | 10 |
| Output Power (W) | 10 |
| Isolated/Non-Isolated | Non-Isolated |
| Input Type | DC |
| Topology | Buck- Synchronous |
A fully assembled board has been developed for testing and performance validation only, and is not available for sale.
Download ready-to-use system files to speed your design process.
Test results for the reference design, including efficiency graphs, test prerequisites and more
Test results for the reference design, including efficiency graphs, test prerequisites and more
Detailed schematic diagram for design layout and components
Complete listing of design components, reference designators, and manufacturers/part numbers
PCB layer plot file used for generating PCB design layout
Includes TI products in the design and potential alternatives.
| Type | Title | Date | ||
|---|---|---|---|---|
| Test report | PMP7977 Test Results (Rev. A) | Jun. 11, 2014 | ||
| Test report | TI Power Reference Design for Xilinx® Artix®-7 (AC701) | May 12, 2014 | ||
| User guide | PMP7977 User's Guide | Sep. 11, 2013 |
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