Human machine interface (HMI)

HMI systems are evolving from simple panels to intelligent systems, using edge processing for advanced functions. The challenges include balancing power with performance, creating efficient designs with ultra-low-power modes, and including smart connectivity and versatile display support.

Our scalable AM6x processors support these challenges, offering efficient edge processing and reducing power consumption to support battery- and power-efficient applications. The AM6x family paves the way for revolutions in HMI products such as voice-activated monitors and gesture-controlled panels.

Next-generation HMI systems require advanced security features such as secure boot and software updates, network and external memory protection, debugging security, and device ID and key handling.

Our microprocessors integrate a rich set of hardware security features for advanced speeds and higher security levels compared to software with cryptographic acceleration, trusted execution environments or on-the-fly encryption.

Real-time communication interfaces such as Profinet and EtherCAT enable precise, time-sensitive communication between programmable logic controllers and input/output modules. By combining real-time Arm® cores and programmable real-time logic into one package, our multicore processors offer the right combination of high performance and general-purpose processing. The programmable real-time unit industrial communication subsystem (PRU-ICSS) supports most industrial communication protocols as well as Time-Sensitive Network (TSN), along with the ability to handle gigabit speeds.

Augmented reality demands for real-time processing of one or more incoming camera streams include pre-processing and analysis; graphic overlay; post-processing; and the output to one or more high-resolution displays, with the option to encode and send the video output stream to a remote location.

Our microprocessors offer graphic, vision pre-processing, depth/motion perception, H.264/H.265 video codec and custom accelerators to offload the Arm cores and keep power requirements at a minimum.