Stromversorgung für FPGA, ASIC und DDR Rails

Hello to everyone from around the world, and welcome to today's webinar, "Overcome the Challenges of Powering FPGA," brought to you by Texas Instruments, Mouser, and broadcast by UBM. I'm Tom Neff, and I'll be your moderator today. We have just a few announcements before we begin.

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If you're experiencing any technical problems, please visit our webinar help guide by clicking on the Help link below the presentation window. In addition, you can contact our technical support helpline, which is also located in the webinar help guide. And now, on to the presentation. It's my pleasure to introduce to you our presenter, Jason Arrigo, an applications engineer for Texas Instruments Simple Switcher product line.

Welcome Jason. And without further ado, I'll now hand it over to you to begin your presentation.

OK, thanks. So as Todd mentioned, I'll be presenting today "FPGA Power Made Simple," covering FPGA power requirements, and also ways to power FPGA using Simple Switcher power modules from Texas Instruments. So I'm going to start out here with a typical block diagram for FPGA. When it comes to powering FPGAs, I get a lot of requirements of many different rails, different current levels.

There are so many different rails in an FPGA. Sometimes it requires multiple power supplies. You use sometimes the same voltages, sometimes different voltages. Sometimes really high current, some have tolerances we were trying to meet for transient response. So originally, or at first, when you start with an FPGA, just understanding what are the power requirements that I'm going to need.

And for this block diagram here, I show eight supplies. And right now they're not filled in. They're leading to different rails of the FPGA. But throughout the presentation I will explain the requirements of each rail, how you can kind of group some of them together, and then give you solutions using our power modules that are designed to meet all these rails. So will see this again at the very end, and we'll have it filled in and show how we got to the power solution.

Like I said I [INAUDIBLE] applications for the module group. So I know modules, and I talk to modules and the benefits of the modules, versus a discrete solution. So a lot of customers who have tight board space requirements, power density, aren't power experts. There's advantages and disadvantages to how we do the power. But by using a module solution, there's a lot of things already done for you.

You're not having to compensate. Just several things characterized. Devices are characterized and guaranteed. You have a data-sheet. You know how the part's going to work. So these are the benefits, and with that you increase your productivity by focusing on your design versus your power. So just to get that out of the way.

So this is what we're going to cover today. The power design considerations for an FPGA, things like system architecture, current requirements. How do we know how much current we're going to need? And what the rails require, and what their tolerances are. Sequencing, FPGAs need sequencing. When the voltages turn on, in what order. And then, also some board design, how that's going to affect your design-- and then, also I'll end with an example that goes through design tools and shows you how to come up with a solution.

So I'll start with system architecture. And when I say system architecture, this is kind of always interesting to me, is that no application, or every application is going to have a different way that they're going to come up with their power that's going to power the voltages that are feeding the FPGA. Some of them do come of 48 volts down to a 12-volt rail. Or do you have a 5 volt rail, or a 3.3? And that's going to determine several things.

But it's going to determine-- some devices are optimized for 3.3 and 5-volt rail. Other ones are optimized for a 12-volt input. And why are you choosing 3 or 5, I mean 12 volts down, or 5 volts? You're going to have different things to balance depending on your architecture. But here it shows advantages and disadvantages of both.

The lower voltage feeding your point of load that's powering your FPGA, that power supply is going to have higher efficiency. But it's also going to have higher current draw or input current to it. So you're going to have to balance that. So defining your system architectures up front of what voltages you're going to use is going to then determine what devices you use, and how much power you're going to need to have feeding your design. That's all I'll talk with for system architecture.

So next, I always ask this question when I'm working with someone, is well, how much current do you need? And how did you come up with it? Sometimes it's not always, until it goes through design, to know exactly what the current requirements are. But there are tools out there that give a good estimate. So I'm talking out the FPGA vendor, their power estimator tools. There are tools out there that you're able to go in there and change the configuration for the exact FPGA that's being used.

And you come out with the voltage rails. So this shows the voltage rails and currents for those rails. As you go in there and you know how this FPGA is going to be used, what clock frequencies, what processing demand it's going to have is going to determine what type of rails that you're going to-- what you're going to need. So by going here, getting the power estimator tool, you're then able to say OK, I have a good idea of how much current I'm going to need, which voltage rails.

And so, the best place to start to know how to do your power design. So with that, so Texas Instruments has a tool called WEBENCH. And inside of WEBENCH is a FPGA Power Architect. And what this has is it's loaded with different FPGAs. I'm sure it's being added to all the time with pre-loaded voltage rails and current rails, which are typical values. So as you go in there and you say hey, this is what I'm using, this is the FPGA I'm using, you select it, you have a good starting point.

You say OK, this is it. It populated rails and currents, and you can go from there and continue on using the tool and come up with a power solution. But I would recommend you get in there, you use that tool. Then go back to the FPGA vendors estimator tool, and just make fine adjustments here. Because not knowing how you're using the application or using the FPGA, we can't know for sure what current levels you're going to be using.

So it's a way to go in and get started. And then you just want to fine tune it here. And then, you can come up with a power solution. So we'll go through an example of this coming up. We're talking about the different block diagrams showing all these different rails. Well, what are the requirements for each rail? So not all of them are the same. Knowing what the requirements are is going to help decide, OK, I need to get a power supply that has low noise, or I need to have something that meets a really tight tolerance, or whatever the requirement is.

So this is what we'll cover here. And so, I've broken down, all FPGA rails to four main rails. Now, you may have one or two that don't fall inside of here, or kind of could go into one or the other. But for the way we'll present it today, FPGA will broken down into four main rails-- core rail, I/O rail, auxiliary rails, and a transceiver rail. And so, this table here is showing the main things that we're kind of designing for.

Accuracy, meaning how tight of a tolerance do we need to meet for this rail? So if it's a 1-volt rail, and it's a core rail, we have to be within 3%. And the auxiliary and I/O are not as tight typically. And again, this is typical. There's going to be cases where this isn't correct, but it's just good to get an idea of a typical solution. You notice that low ripple effect for a transceiver. Transceivers have to be low noise, so they are going to have a much tighter noise spec.

And so, for a rail you may need to use a dedicated rail for a transceiver rail. Even though you have another voltage, the same voltage rail, you may need to take this one and give it its own rail because it has to be quieter. Transient requirements. When I'm dealing with customers and we're talking about transit requirements, it's very typical to have a 50% load step at less than or I'd say typically 1 amp per microsecond. If you can meet that and keep your accuracy, that's what normally you design for.

And then also, there's sequencing order. This is just every FPGA has to turn on a certain way and shutdown a certain way in order to make sure everything's satisfied. So there are sequencing orders to different rails where the core is typically first. And then, the other rails in different orders. So anyway I'll cover that a little bit coming up.

I talked about our power modules. Here is a slide showing power modules, the Simple Switcher power modules that are designed and meet the requirements of FPGA power. Starting from the left to the right, the current is about half an amp device all the way out to a 30 amp device. Some of these devices can be paralleled for even higher current, but typically, anything that you need from half amp-- and some of the rails don't need more than half an amp.

And then, some of the core rails may need up to 20 or 30 amps. So these are all designed to meet FPGA power with good transient response. And then, also there's other features here listed-- Remote Sense, Synchronization, Power Good Pin-- a lot of features that a lot of customers are always needing. Not only power, but also all the other features that go along with the power.

I'll start out with the core power. Core power is typically your highest current rail. These are the ones where it's going to be a low input voltage, or I'm sorry, the rail requires a low voltage high current. So you have DSP blocks in there, Block RAM, logic blocks. So a lot of these rails are always going to be the ones with a tight tolerance. So you see 3% tolerance, sometimes tighter. I've seen before where you have to keep that voltage very tight for the operation of this rails.

They also, like I said, sequencing-- first up, last rail down, designing for 50% load step, and then also ramp timing. So meaning that all the rails must get within 95%, or within 40 to 50 milliseconds they must be up. So this is a typical. Maybe it'll change for some of these, but typically, all the rails need to be reached within 40 to 50 milliseconds. So sometimes using your soft start software you can change your timing. And you just have to make sure that all the voltages meet the FPGA timing requirements.

All right, so I talked about 3%, I talked about 5%. These are the tolerances. And what do the tolerances really mean? When we say I need to be at a 3% tolerance device, what is it made up of? And so, here it's made up of two operating conditions. Those two operating conditions, the first we call the static. So these are output voltage ripple and power supply regulation.

So when a device is designed, what type of regulation do we expect? So you look in the data-sheet. You'll have 1% or 1 1/2%. Depending on what device and what spec you're looking at, there will be some defined amount of you can expect this much of tolerance change in your output. So that's the static condition, and then there's also the dynamic condition.

And so, and this is any DC losses, or any transient group when current is changing state. It's how much does it change when current changes? So I'll cover these a little bit more next slide. So static improvement, so I kind explained what that was. But things like line regulation, load regulation, temperature, operating temperature, how much does the voltage plan to change based on those changing conditions, or the operating conditions that you're operating under.

So this really says improving power supply regulation. And what I like to explain when I'm talking with somebody, is if there's a spec in a data-sheet for line regulation, and that's how much does the output voltage change as the input voltage changes from minimum input voltage to maximum input voltage of the device. That may not be a care about for your application because you have a very tight input tolerance. So you can throw out that spec, or at least use it only in a small portion.

And you're not taking all the conditions and saying, OK, worst case, it's going to be in this range. But you're operating in a very tight temperature range, or a very tight input voltage range. So my suggestion is just know what your application is, and design for that, and it will keep that number you're designing for a smaller amount of tolerance, versus worst case. So when you set the output voltage, using a tight tolerance resistor helps.

And then another part of static is output voltage ripple. So there's ways to reduce output voltage ripple, using ceramic output capacitors, increasing switching frequency. Little things like that helps your tolerance. So these are ways to improve the static portion of your output voltage tolerance. And so, this is kind of a, I don't know, I see this a lot. This is I get feedback, oh my output ripple is bad, is real high.

And so, the first thing is, well, how are we measuring it? If we measure the output voltage ripple correctly, we're going to know what we're dealing with. Because just this alone, I can't tell you how many times I've seen this where just fixing how closely coupled your ground is to your scope probe, customer says, oh I have 50 millivolts of ripple. And I say, how are you measuring it? I show them the way to measure it.

Now, they say, oh OK, I'm 1/10 then. I only see 5 millivolts. So it's a huge difference when you're talking about a tolerance. So measuring the output ripple the correct way is a good way to see how much am I actually getting of output voltage ripple. And so, this just shows the difference. So it shows the same drawing on the bottom and a couple pictures on the top that show, as I measure it with a closely coupled ground, versus a loose hanging ground, the noise just on the waveform is much better.

All right, so because of the static and the ripple, now the dynamic, the transient deviation or transient droop [INAUDIBLE]. So when we talk about transience, and I'm trying to meet transience, my first question is what is your load step size, how fast is that current stepping-- the load step speed, and how much output capacity. All those things are going to affect how big of a deviation or a transient droop you'll see as the current changes.

If the load step is very small, you're not going to see much. If it's very slow, if it needs a lot of current but it's so slow that the power supply can just handle any change, then you won't even see a change in your output voltage. And then, having additional absolute capacitance or certain high quality output capacitance are going to help this as well. So here we're showing a capacitor model to show that, during a change in current step, how that's going to affect your transience.

So the top plot here shows your load current. This is how much current is being required from the load. And your see it in the blue line. It goes up pretty quick. And then it stabilizes and it's flat. And then the green waveform shows how much current your converter, how much your power supply can deliver. And you see they don't match, so we have to make up the other current somewhere.

And that comes from your output cap. So as you see, this is your voltage deviation on your output. You're going to get a-- the lower plot here shows voltage. And that's what you're going to see. It's going to be flat, and then as the current is required, you immediately need to supply that current. And so you're going to see a deviation due to that.

So what portion of that is affected by the inductance of the capacitor, the ESR of the capacitor, and then also the capacitance. So combination of capacitance and the converter is going to make up that current for you. So the way to improve your transient response and to reduce your voltage droop during a transient is output capacitors. So these bypass capacitors, an FPGA vendor will normally tell you these are the amount of capacitance I need at the output pins of my device.

So they'll be talking about some small value ceramic cap placed directly at the FPGA, the FPGA pins. Then also, on the board at the output of your power supply before these bypass caps, you'll need some the bulk caps, or the tantalum type or larger rail use ceramics are going to supply that current during that transient demand. So high quality capacitors, lower ESR capacitors are going to be the best for keeping that transience low as well.

So this is just a schematic showing the different types of capacitors and their effectiveness. And so, it's putting a good amount, not a good amount, but different types of capacitors make up a complete network of filtering for your output voltage. Because different types of capacitors are effective at different frequencies. So as you put bulk capacitors, they're better at lower frequencies.

But as you add ceramic capacitors, they are more effective at higher frequencies. So always a good capacitor network on your output is going to help with your transient response. So also, minimizing DC loss. What is a thing we can do? DC loss is any kind of drop you have based on resistance, or board traces, or any drop in connector. Anything you're going to have just like current flowing through a resistance, and it's going to drop the voltage.

So how can we help with that or fix that? Well, using Remote Sense. So Remote Sense will regulate the voltage at the load. So by placing a remote sense right by the FPGA pins, that's the point that we're going to make sure that, if it was set for 1.0 volts, that's what we're going to regulate to. Instead of regulating to the output of our power module, we're regulating to the FPGA point. And all of our products have Remote Sense.

And also, just during layout by putting wide thick copper traces for you power traces is going to reduce the resistance. And then, also when possible placing the power supply near the FPGA, or whatever load. Placing the power supply there is going to keep that point regulated tighter and minimize DC loss.

Here's an example using one of our 20 amp modules, our LMZ31520, to power of core rail. This is the rail we talked about with the high current, typically low voltages. And so, here's a typical schematic showing output current of 18 amps and a load step of 9 amps at 1 amp per microsecond. That's what we're going to try to meet. So here's schematic with some input caps, output caps, and a resistor. And first thing we'll look at is the output voltage ripple.

So for this core rail, I have on the plot, I show plus or minus 3% to show this is how much we're trying to stay within. And as you can see, 10 millivolts per second, we're in the 5 to 7 millivolt range with our ripple. So we're nowhere near the tolerance of the device, of the FPGA rail that we're trying to meet. But then we also have to makes sure we can meet the dynamic portion as well.

So with the output capacitors that were on there, we did a 9 amp load step for 1 1/2 per microsecond. And you can see we easily meet a 3%, more like 2%, 20 millivolts plus or minus. The LMZ31520 is a very good device for transient response. So you can see you can easily meet these requirements. And this would be I have no issues with this FPGA rail getting out of tolerance. So we're able to meet the static and the dynamic portion with this device.

So thought we talked about the core rail. Now, the I/O rail power requirement. So the I/O rails, current is going to be sometimes higher, sometimes lower but depend on how much of the I/O banks are being used. These are typically lower accuracy. So 5%, so you have a lot more room for transient response. You don't have to concentrate too much on getting tight.

The current demands aren't going to be as great either. So these are typically smaller supplies. It's going to have sequencing requirements. We still shoot for the same 50% load step, 1 amp per microsecond-- also, timing requirements as well. And also, the auxiliary rail. So I'm talking about these together because the same type of power supplies or power designs are used for either auxiliary or I/O.

They have, typically, the same tolerance accuracy of 5%. Typically, lower current requirement, and so typically, we'll see the type of rails and use the same devices to power these. And sequencing transients, and ramping time same as other rails. So here we show some devices that are typically used, some of our modules that are used for these I/O or auxiliary rails

They're small solution size and lower current. They could be higher currents, and so, in here we show a current range 1 amp to 2 amp. We're showing a solution size of 30 to 35 millimeters squared, not much required capacitance to meet the 5% tolerance. Small solution size, and the same thing anywhere-- if even more current is needed, up to 10 amps, even at 10 amps it's less than 195 millimeters squared, the solution size, including input and output capacitors.

And in this waveform, or in this slide, it shows thermal performance. Even at higher currents, these are designed for thermal performance as well. So you can get full current out and still not have to de-rate the current of the device.

This, real quick, is one of the devices that we show. This is a 650 milliamp to 1 amp nano module. So it's one of our newer modules that are very small size, 3 1/2 millimeter, by 3 1/2 millimeter. What's nice is that this device can handle a 12-volt input rail and can meet those requirements for 300, 400, 500 milliamp rails with higher efficiency. Typically, there's been rails that are 12 volts in.

And we have an LBO. We're trying to use an LBO to regulate because the current is not that high. But now you can have small size in the hundreds of milliamps up to an amp and get very good efficiency out of a switch or in a small size. So a very popular device in a very small package.

So then next we'll talk about the transceiver power rail. This one here typically requires the highest accuracy. So in this case, we show some example, dedicated transceiver rails where less than 3% accuracy down to even 2 1/2% accuracy. So very tight tolerance is needed. They may need their own dedicated rail because of this. From a low noise factor, you need to meet 10 millivolts peak-to-peak noise over a wider frequency range.

So these are all things that we have to consider when we're designing for a transceiver rail. And so, along with the power supply, the device itself, the layout of the device is going to either hurt you or aid you when it comes to keeping low noise and dealing with the noise of the device. So which, as a module, is designed to be a nice tight layout. This is going to benefit you as well with noise and EMI because the layout does matter when it comes to noise that's being radiated from the device.

So here we show a good layout where the input cap is right next to the input pins, nice closely connected, bypassing those pins, versus you're still on the same plane, but now you have this big area which could be an antenna and radiate noise for you. And so, here we show a LMZ20502, which is another nano module, one of the 3 1/2 millimeter by 3 1/2 millimeter devices. This is good for up to 2 amps, and this schematic here shows that we're able to meet low noise. We're able to meet the transit requirement and the noise requirement for the transceiver rail with a minimum solution size here. And again, this is one page of the LMZ20501, which is a 1 amp and then a 2 amp and nano devices.

Again, 3 1/2 millimeter by 3 1/2 millimeter. Very small device in a very small package for those rails that are powered from 3 1/2, or 3.3, or 5 volts input and need up to 2 amps of output current. And then, this is just showing the board placement for minimum size. So a one size solution, 42 millimeters squared. But if you're placing top and bottom components, you can use the bottom side of the board. Very small solutions size, less then 30 millimeters squared.

So we talked about the rails and some devices for powering those rails, and requirements for the rails. But also, one of the requirements for the FPGA is sequencing as well. And I'm going to talk about some ways to do the sequencing. So sequencing requirements, they need to come up monotonically, so not starting stopping. I needs to be a continual rise in the output voltage. There is some ramp up time. There's always some sequencing requirement.

Sometimes it's power up, and power down as well. It seems like more and more I don't hear of any applications that don't need both. So there are several ways to do it, to do sequencing. And I'm going to walk through some of them real quick here. So there's several ways. I look at this and majority of ways that we'll see to do it. So you can use RC for sequencing, which is just you're timing the turn on, and an RC time constant is going to drive when the part turns on.

I don't see that very much. Very unreliable. But I have heard of, oh let's just slow it down using soft start. And that's what we'll use as our timing. More effective would be to take the Power Good pin of one device and feed it into the enabled pin of another device so. The Power Good signal is a signal that says my output voltage is within regulation, or almost within regulation. And it says, OK, I'm good to go.

So when that signal goes high, that drives the next one. You just daisy chain and say, OK, the power supply before me is good to go. OK, now I could start to ramp up. So I see that quite a bit. But I also, more than anything, it's a dedicated sequence, or some type of controller that has the brains that says, OK, you're on next. You're up first, you next, you next. And it's able to sense the output voltages and know who's up and who's down, who's not up yet, and sequence them in the correct order.

So this is showing driving the power grid of one into the inhibit pin of the other. And it's showing that the red waveform comes up, and you know there's a green one. But also, there's a really simple device out there. We have an LM3880. So LM3380, and what has is three lines for driving the turn or turn off of the devices. And so it's a really simple way to control the sequencing. And if you have more than three rails, you can daisy chain it for more rails. So pretty simple device, able to meet your sequencing requirements for FPGA.

So some general layout guidelines. I'll go through this. A lot of this is in the data sheet or users' guide. But pretty basic things. Placing caps close to the output. Kind of what we talked about already. Placing extra caps near load for transient response. Making your copper traces as wide as possible. Placement of your feedback of your resistors near the feedback pin to reduce noise. And then, also in the data-sheet, requirements for vias and how many vias to place, or where to place them.

So basic layout guidelines for power. And so, now as we do our layout, the copper that you do lay out is going to be the heat sink, is going to take your power, and you're just paying for your power module or power supply. And the board is going to be the main way to get current out, to get heat out. So this here is just a simple test that we did. It says, If I have this size of a board, a 2 inch by 2 inch board, or if I have a 3 inch by 3 inch board, or a 4 inch by 4 inch board-- how does that affect my thermal de-rating of the device, or to get the heat out of the device?

So here we show a typical 35 millimeter by 75 millimeter board. And we see, hey, with all this copper we're able to operate at 85 degrees C full load. We don't have to de-rate the part. But as the copper area gets reduced, and now we're down to the 50 millimeter by 50 millimeter board, you see now in natural convection we can't operate in all these conditions. And then, same thing as we make and even smaller board, 25 millimeter by 25 millimeter.

So the amount of copper is going to affect the layout or the amount of current you can get out of the device. So layout is important for these devices.

So I walked through some of the set up of learning the FPGA rails. And now I'm going to go through some design tools and resources, and walk through a design as I do it. Here's a recommended design setup. We kind of talked through this. Go to the FPGA vendor and use their tools and kind of say, how much current do I need? Then you could check TI reference designs. We have many designs already done for certain FPGAs.

So there might be something on there already that you could start with and use. And then use the WEBENCH FPGA Power Architect to go through and get a design. And so, as I go through this design here, I'm going to start with a Altera Stratix V. Go to their site and say, hey, this is how [INAUDIBLE] configure it how I think I'm going to run my design, and get the voltages and currents that they recommend.

Then I will check to see, OK, is there something done already for this? If there's already a design done, maybe I could just start with that and start with their design files. I don't have to start this thing brand new. So again, here's an example of a reference design. And as you can see, it's not very large, but you can see all the different rails that are being set into here. So there's already some out there where you will get design files.

You don't have to start from scratch. And even, in some cases, like in this, you have a board that you can test with power on there already. And so, we're not going to use a reference design. We're going to go through the WEBENCH Power Architect. So you go to the WEBENCH designer, which is at the FPGA Power Architect, go to WEBENCH designer, selects the FPGA family you want, and then click the FPGA Architect to start the design.

And so, when you get in there, you'll be able to scroll through, fine the family, the part that you're using, and say, that is what I'm using. And then, you'll be able to go in there, and as we've talked about before, modify the voltage and current rail to what we had seen from the estimator. And so, we get in there, we adjusting the value, then we're going to click to start the project.

All right, so once we get in there and start the project, we will have to select that we wanted a power module, a [INAUDIBLE] module, or however we're going to do the power design, and then submit your requirements. Now we're saying, OK, this is how we're going to set up. And these are the rails I want to design for, and I'm going to submit these rails. And then next step will be to optimize.

So depending on your care abouts in your design, whether it's efficiency, size, cost. I could give someone a most efficient solution, but they don't care about efficiency. They care about this thing has to be tiny, or it has to be cheap, so I don't really care about efficiency and size. So you're able to go into the designer and decide, tell it I want you to show me the most efficient solution first.

So as you adjust for optimization, then you could then click to view the project details. So as you select the design, you're then able to see some of the rails that were already. So on the left, they do show a block diagram. And then, they're focusing on one of the rails. And then, you're able to make some final adjustments. So if you wanted to select a certain regulator that you're familiar with, or you have some reason for wanting to use one of the devices other than the one on there, you can make your final adjustment.

And then, once you create the project, so now it's going to go through and give you operating condition, all your power rails with a bill of material, with efficiency charts, operating [INAUDIBLE]. There's a lot of tools here. And you could select each rail inside of your design to see this information. So you'd be able to get a [INAUDIBLE] for each with parts that can be ordered. And then also, they have CAD files, which can be exported and used.

So a complete solution can be designed by going through this process. You'll have all the voltage rails, along with the files needed to design the solution as well. So as we went through there, and we got through the tools, and got through our final design, now we're able to come up with a FPGA power design. All of the rails, all eight rails are populated. And we assigned a part number for, and each rail has been defined.

And so, now you see how starting, going from start to finish, were able to finish a power design and have all the power rails for an FPGA. So with that, here are some sites for resources. There's a site just for Simple Switcher power modules, LBOs, Texas Instruments power. But also on here is the Power Architect, the FPGA Power Architect tool. And then, also the reference designs.

So you'll be able to look on there and find reference designs. You'll be able to search through them, see if there's anything on there that can get you started. So a lot of resources for you. And so, with that, that concludes my presentation. And I think we're going to go into questions.

Yes we are. Jason, thanks again. And again, that's Jason Arrigo, applications engineer for Texas Instruments Simple Switcher product line. And before we start Q&A, please note the survey on your screen. If you did not see the survey, please launch it now by clicking on the Survey button on your interface. Thank you in advance for filling it out. Your responses are very important to us, and will provide Texas Instruments, Mouser and UBM with feedback on how to improve future webinars.

Now we'll move into the question and answer section of this presentation. If you have a question for Jason, please submit it now by typing it in the text area on the right hand side of your screen, and click Submit. And with that, let's start the Q&A. Our first question. For the low noise, wide bandwidth solution, how do you avoid putting the switching frequency of the regulator on the noise spectrum?

OK, that's a good question. How do you avoid putting the switching frequency of the regulator on the noise spectrum? So I don't know exactly. If you're going to avoid putting it, I'm not sure if you can. I mean there's always ways to filter down all noise, but I'm not sure how this question is really being asked. But there are features, whether it's synchronizing and to synchronize something to a frequency that your system can deal with, as opposed to just running at a free running frequency.

And we can run it with an external clock, or change the frequency to something that's in the range, or even adding filtering is a way. If there is a very noise sensitive solution, there may be filters or ferrite beads or something like that we have added as well. Depending on transient requirements, putting other filtering in there is going to cause other issues like just more transient noise, or more deviation because now you have introduced inductance into the output.

But I don't know if I answered the question exactly. But by synchronizing to another frequency or a frequency that you can live with, or filtering it is how I would say to avoid that switching frequency.

Sure. Yeah. Thank you. Another question. Can these modules be used in applications that require only ceramic capacitance?

Yes. So these devices are designed for ceramic capacitors. Most of them require a minimum amount of ceramic. And then, after that, other types of capacitors can be used as well. But yes, all ceramic capacitors are able to be used with these devices.

Another question. What are the soldering re-flow requirements for these LMZ3 and new nano modules?

That's a good question because some of things that we come across is because they've already been built, and customers don't think that they can be soldered up to higher re-flow temperatures. And so, the LMZ3 modules and the nano modules can have a re-flow profile that can have a maximum of 260 degrees C. So the high temperature re-flow has been qualified three passes through a 260 degree re-flow, and confirmed to still be no issues. So they are high temperature re-flow devices.

Got it. And one more question here. Do any of your modules produce clock output to synchronize other devices?

Yes, so of one of our family of devices, LMZ31710 family, also the 7 amp and the 4 amp version of that module do have an output clock. So by producing the clock, so if we set one of the devices to a switching frequency, whether just by connecting a resistor to ground and setting it to, say 500 kilohertz, this module produces an output clock at the same frequency, but 180 degrees phase shifted.

So what that means is that you're able to take that clock and feed it into another module, or other modules. And they'll be operating a 180 degrees out of phase, which will help balance your input current loading, and things along that line. But you won't need to bring an external clock if you're going to use this clock from the module. And then this clock could be used to feed other devices on your board so that everything is at same frequency.

And by doing that, you do avoid beat frequencies and other noises. If you're trying to keep a system to a low-noise system, everything at that same synchronized clock, it's going to be easier to filter. You only have to filter one frequency. And you won't have lower frequency beats going up throughout your board as well.

Got it. Jason, thank you for answering those questions. And thanks everybody for asking them. We are about out of time. So I'd like to thank everyone for attending today's webinar, Overcome the Challenges of Powering FPGA, brought to you by Texas Instruments, Mouser, and broadcast by UBM. This presentation will be available shortly in an on-demand format.

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