SNAS747 June 2017 ADC081S101-MIL
PRODUCTION DATA.
PIN | TYPE | DESCRIPTION | |
---|---|---|---|
NO. | NAME | ||
ANALOG I/O | |||
3 | VIN | I | Analog input. This signal can range from 0 V to VA. |
DIGITAL I/O | |||
4 | SCLK | I | Digital clock input. This clock directly controls the conversion and readout processes. |
5 | SDATA | O | Digital data output. The output samples are clocked out of this pin on falling edges of the SCLK pin. |
6 | CS | I | Chip select. On the falling edge of CS, a conversion process begins. |
POWER SUPPLY | |||
1 | VA | P | Positive supply pin. This pin should be connected to a quiet +2.7-V to +5.25-V source and bypassed to GND with a 1-µF capacitor and a 0.1-µF monolithic capacitor located within 1 cm of the power pin. |
2 | GND | G | The ground return for the supply and signals. |
PAD | GND | G | For package suffix CISD(X) only, it is recommended that the center pad should be connected to ground. |