SBASA53A July 2021 – October 2024 ADC09DJ800-Q1 , ADC09QJ800-Q1 , ADC09SJ800-Q1
PRODUCTION DATA
SYSREF is a system timing reference used for JESD204C subclass-1 implementations of deterministic latency. SYSREF is used to achieve deterministic latency and for multi-device synchronization. SYSREF must be captured by the correct device clock edge in order to achieve repeatable latency and synchronization. The device includes a SYSREF Windowing feature to ease the requirements on the external clocking circuits and to simplify the synchronization process. SYSREF Windowing replaces the traditional setup and hold times as these are no longer required when SYSREF Windowing is used. SYSREF can be implemented as a single pulse or as a periodic clock. In periodic implementations, SYSREF must be equal to, or an integer division of, the local multiframe clock frequency in 8B/10B encoding modes or the local extended multiblock clock frequency in 64B/66B encoding modes. Equation 7 is used to calculate valid SYSREF frequencies in 8B/10B encoding modes. In 64B/66B modes, the denominator changes to 66 × 32 × E × n, where E is the number of multiblocks in an extended multiblock.
where