SLVSGH5 Data sheet

SLVSGH5B March 2023 – June 2024 ADC12DJ5200SE

PRODUCTION DATA

Package Options

Mechanical Data (Package|Pins)

AAV|144
- MPBGAM2C

Thermal pad, mechanical data (Package|Pins)

Orderable Information

6.4.4.1 JESD204C Operating Modes Table

Table 6-24 ADC12DJ5200SE Operating Modes

ADC12DJ5200SE OPERATING MODE	USER-SPECIFIED PARAMETER		DERIVED PARAMETERS														INPUT CLOCK RANGE (MHz)
ADC12DJ5200SE OPERATING MODE	JMODE	K [Min:Step:Max]	Encoding	D	DES	LINKS	N	CS	N’	L (Per Link)	M (Per Link)	F	S	HD	E	R (Fbit / Fclk)	INPUT CLOCK RANGE (MHz)
12-bit, single channel, 8 lanes	0	4:2:256	8b/10b	1	1	2	12	0	12	4	4⁽¹⁾	8	5	0	—	4	800-4290
12-bit, single channel, 16 lanes	1	4:2:256	8b/10b	1	1	2	12	0	12	8	8⁽¹⁾	8	5	0	—	2	800-5200
12-bit, dual channel, 8 lanes	2	4:2:256	8b/10b	1	0	2	12	0	12	4	4⁽¹⁾	8	5	0	—	4	800-4290
12-bit, dual channel, 16 lanes	3	4:2:256	8b/10b	1	0	2	12	0	12	8	8⁽¹⁾	8	5	0	—	2	800-5200
RESERVED	4	—	—	—	—	—	—	—	—	—	—	—	—	—	—	—	—
8-bit, single channel, 8 lanes	5	32:16:256	8b/10b	1	1	2	8	0	8	4	1	1	4	0	—	2.5	800-5200
8-bit, single channel, 16 lanes	6	32:16:256	8b/10b	1	1	2	8	0	8	8	1	1	8	0	—	1.25	800-5200
8-bit, dual channel, 8 lanes	7	32:16:256	8b/10b	1	0	2	8	0	8	4	1	1	4	0	—	2.5	800-5200
8-bit, dual channel, 16 lanes	8	32:16:256	8b/10b	1	0	2	8	0	8	8	1	1	8	0	—	1.25	800-5200
RESERVED	9	—	—	—	—	—	—	—	—	—	—	—	—	—	—	—	—
Decimate-by-4, dual channel, 4 lanes	10	16:8:256	8b/10b	4	0	2	15	1	16	2	2	2	1	0	—	5	800-3432
Decimate-by-4, dual channel, 8 lanes	11	16:8:256	8b/10b	4	0	2	15	1	16	4	2	2	2	0	—	2.5	800-5200
Decimate-by-4, dual channel, 16 lanes	12	16:8:256	8b/10b	4	0	2	15	1	16	8	2	2	4	0	—	1.25	800-5200
Decimate-by-8, dual channel, 2 lanes	13	8:4:256	8b/10b	8	0	2	15	1	16	1	2	4	1	0	—	5	800-3432
Decimate-by-8, dual channel, 4 lanes	14	16:8:256	8b/10b	8	0	2	15	1	16	2	2	2	1	0	—	2.5	800-5200
Decimate-by-8, dual channel, 8 lanes	15	16:8:256	8b/10b	8	0	2	15	1	16	4	2	2	2	0	—	1.25	800-5200
Decimate-by-8, dual channel, 16 lanes	16	16:8:256	8b/10b	8	0	2	15	1	16	8	2	2	4	0	—	0.625	800-5200
RESERVED	17-18	—	—	—	—	—	—	—	—	—	—	—	—	—	—	—	—
12-bit, single channel, 12 lanes	19	16:8:256	8b/10b	1	1	2	12	0	12	6	1	2	8	1	—	2.5	800-5200
12-bit, dual channel, 12 lanes	20	16:8:256	8b/10b	1	0	2	12	0	12	6	1	2	8	1	—	2.5	800-5200
Decimate-by-4, single channel, 4 lanes	21	16:8:256	8b/10b	4	1	2	15	1	16	2	1	2	2	0	—	5	800-3432
Decimate-by-4, single channel, 8 lanes	22	16:8:256	8b/10b	4	1	2	15	1	16	4	1	2	4	0	—	2.5	800-5200
Decimate-by-8, single channel, 2 lanes	23	16:8:256	8b/10b	8	1	2	15	1	16	1	1	2	1	0	—	5	800-3432
Decimate-by-8, single channel, 4 lanes	24	16:8:256	8b/10b	8	1	2	15	1	16	2	1	2	2	0	—	2.5	800-5200
Decimate-by-4, single channel, 16 lanes	25	16:8:256	8b/10b	4	1	2	15	1	16	8	1	2	8	0	—	1.25	800-5200
Decimate-by-8, single channel, 8 lanes	26	16:8:256	8b/10b	8	1	2	15	1	16	4	1	2	4	0	—	1.25	800-5200
Decimate-by-8, single channel, 16 lanes	27	16:8:256	8b/10b	8	1	2	15	1	16	8	1	2	8	0	—	0.625	800-5200
RESERVED	28-29	—	—	—	—	—	—	—	—	—	—	—	—	—	—	—	—
12-bit, single channel, 8 lanes	30	32⁽²⁾	64b/66b	1	1	2	12	0	12	4	4⁽¹⁾	8	5	0	1	3.3	800-5200
12-bit, dual channel, 8 lanes	31	32⁽²⁾	64b/66b	1	0	2	12	0	12	4	4⁽¹⁾	8	5	0	1	3.3	800-5200
12-bit, single channel, 6 lanes	32	128⁽²⁾	64b/66b	1	1	2	12	0	12	3	1	2	4	1	1	4.125	800-4160
12-bit, dual channel, 6 lanes	33	128⁽²⁾	64b/66b	1	0	2	12	0	12	3	1	2	4	1	1	4.125	800-4160
8-bit, single channel, 4 lanes	34	256⁽²⁾	64b/66b	1	1	2	8	0	8	2	1	1	2	0	1	4.125	800-4160
8-bit, dual channel, 4 lanes	35	256⁽²⁾	64b/66b	1	0	2	8	0	8	2	1	1	2	0	1	4.125	800-4160
Decimate-by-4, single channel, 4 lanes	36	128⁽²⁾	64b/66b	4	1	2	15	1	16	2	1	2	2	0	1	4.125	800-4160
Decimate-by-4, dual channel, 4 lanes	37	128⁽²⁾	64b/66b	4	0	2	15	1	16	2	2	2	1	0	1	4.125	800-4160
Decimate-by-8, single channel, 2 lanes	38	128⁽²⁾	64b/66b	8	1	2	15	1	16	1	1	2	1	0	1	4.125	800-4160
Decimate-by-8, dual channel, 2 lanes	39	64⁽²⁾	64b/66b	8	0	2	15	1	16	1	2	4	1	0	1	4.125	800-4160
12-bit, single channel, 16 lanes	40	32⁽²⁾	64b/66b	1	1	2	12	0	12	8	8⁽¹⁾	8	5	0	1	1.65	800-5200
12-bit, dual channel, 16 lanes	41	32⁽²⁾	64b/66b	1	0	2	12	0	12	8	8⁽¹⁾	8	5	0	1	1.65	800-5200
12-bit, single channel, 12 lanes	42	128⁽²⁾	64b/66b	1	1	2	12	0	12	6	1	2	8	1	1	2.0625	800-5200
12-bit, dual channel, 12 lanes	43	128⁽²⁾	64b/66b	1	0	2	12	0	12	6	1	2	8	1	1	2.0625	800-5200
8-bit, single channel, 8 lanes	44	256⁽²⁾	64b/66b	1	1	2	8	0	8	4	1	1	4	0	1	2.0625	800-5200
8-bit, dual channel, 8 lanes	45	256⁽²⁾	64b/66b	1	0	2	8	0	8	4	1	1	4	0	1	2.0625	800-5200
Decimate-by-4, single channel, 8 lanes	46	128⁽²⁾	64b/66b	4	1	2	15	1	16	4	1	2	4	0	1	2.0625	800-5200
Decimate-by-4, dual channel, 8 lanes	47	128⁽²⁾	64b/66b	4	0	2	15	1	16	4	2	2	2	0	1	2.0625	800-5200
Decimate-by-8, single channel, 4 lanes	48	128⁽²⁾	64b/66b	8	1	2	15	1	16	2	1	2	2	0	1	2.0625	800-5200
Decimate-by-8, dual channel, 4 lanes	49	128⁽²⁾	64b/66b	8	0	2	15	1	16	2	2	2	1	0	1	2.0625	800-5200
8-bit, single channel, 16 lanes	50	256⁽²⁾	64b/66b	1	1	2	8	0	8	8	1	1	8	0	1	1.03125	800-5200
8-bit, dual channel, 16 lanes	51	256⁽²⁾	64b/66b	1	0	2	8	0	8	8	1	1	8	0	1	1.03125	800-5200
Decimate-by-4, single channel, 16 lanes	52	128⁽²⁾	64b/66b	4	1	2	15	1	16	8	1	2	8	0	1	1.03125	800-5200
Decimate-by-4, dual channel, 16 lanes	53	128⁽²⁾	64b/66b	4	0	2	15	1	16	8	2	2	4	0	1	1.03125	800-5200
Decimate-by-8, single channel, 8 lanes	54	128⁽²⁾	64b/66b	8	1	2	15	1	16	4	1	2	4	0	1	1.03125	800-5200
Decimate-by-8, dual channel, 8 lanes	55	128⁽²⁾	64b/66b	8	0	2	15	1	16	4	2	2	2	0	1	1.03125	800-5200
Decimate-by-16, dual channel, 2 lanes	56	8:4:256	8b/10b	16	0	2	15	1	16	1	2	4	1	0	—	2.5	800-5200
Decimate-by-16, dual channel, 4 lanes	57	16:8:256	8b/10b	16	0	2	15	1	16	2	2	2	1	0	—	1.25	800-5200
Decimate-by-16, dual channel, 8 lanes	58	16:8:256	8b/10b	16	0	2	15	1	16	4	2	2	2	0	—	0.625	800-5200
Decimate-by-16, dual channel, 2 lanes	59	64⁽²⁾	64b/66b	16	0	2	15	1	16	1	2	4	1	0	1	2.0625	800-5200
Decimate-by-16, dual channel, 4 lanes	60	128⁽²⁾	64b/66b	16	0	2	15	1	16	2	2	2	1	0	1	1.03125	800-5200
Decimate-by-16, single channel, 2 lanes	61	16:8:256	8b/10b	16	1	2	15	1	16	1	1	2	1	0	—	2.5	800-5200
Decimate-by-16, single channel, 4 lanes	62	16:8:256	8b/10b	16	1	2	15	1	16	2	1	2	2	0	—	1.25	800-5200
Decimate-by-16, single channel, 8 lanes	63	16:8:256	8b/10b	16	1	2	15	1	16	4	1	2	4	0	—	0.625	800-5200
Decimate-by-16, single channel, 2 lanes	64	128⁽²⁾	64b/66b	16	1	2	15	1	16	1	1	2	1	0	1	2.0625	800-5200
Decimate-by-16, single channel, 4 lanes	65	128⁽²⁾	64b/66b	16	1	2	15	1	16	2	1	2	2	0	1	1.03125	800-5200
Decimate-by-32, dual channel, 2 lanes	66	8:4:256	8b/10b	32	0	2	15	1	16	1	2	4	1	0	—	1.25	800-5200
Decimate-by-32, dual channel, 4 lanes	67	16:8:256	8b/10b	32	0	2	15	1	16	2	2	2	1	0	—	0.625	800-5200
Decimate-by-32, dual channel, 2 lanes	68	64⁽²⁾	64b/66b	32	0	2	15	1	16	1	2	4	1	0	1	1.03125	800-5200
Decimate-by-32, single channel, 2 lanes	69	16:8:256	8b/10b	32	1	2	15	1	16	1	1	2	1	0	—	1.25	800-5200
Decimate-by-32, single channel, 4 lanes	70	16:8:256	8b/10b	32	1	2	15	1	16	2	1	2	2	0	—	0.625	800-5200
Decimate-by-32, single channel, 2 lanes	71	128⁽²⁾	64b/66b	32	1	2	15	1	16	1	1	2	1	0	1	1.03125	800-5200

(1) M equals L in these modes to allow the samples to be sent in time-order over L lanes without unnecessary buffering. The M parameter does not represent the actual number of converters. Interleave the M sample streams from each link in the receiver to produce the correct sample data; see mode diagrams for more details.

(2) In the 64B/66B modes, the K parameter is not directly programmable. K is related to E and F according to the equation K=8*32*E/F. K is not an actual parameter of the 64B/66B link layer.