SBASAT9 February 2024 ADC12DL1500 , ADC12DL2500 , ADC12DL500
PRODUCTION DATA
One data clock is provided for each LVDS bus; however, the number of data clocks used in the system can be reduced. The number of data clocks can be reduced if a data clock is shared among multiple buses, which can be applicable at lower data rates. DCLKx_EN in the LCS_EN register can be used to disable any unused data clock outputs.