SBAS774B May 2016 – December 2021 ADC32RF80 , ADC32RF83
PRODUCTION DATA
7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
0 | 0 | 0 | 0 | 0 | 0 | TEST PAT RES | TP RES EN |
W-0h | W-0h | W-0h | W-0h | W-0h | W-0h | R/W-0h | R/W-0h |
Bit | Field | Type | Reset | Description |
---|---|---|---|---|
7-2 | 0 | W | 0h | Must write 0 |
1 | TEST PAT RES | R/W | 0h | Pulsing this bit resets the test pattern. The test pattern reset must be enabled first (bit D0). 0 = Normal operation 1 = Reset the test pattern |
0 | TP RES EN | R/W | 0h | This bit enables the test pattern reset. 0 = Reset disabled 1 = Reset enabled |