SBAS958A December 2019 – June 2020 ADC3421-Q1
PRODUCTION DATA.
7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
0 | 0 | 0 | 0 | 0 | 0 | 0 | PDN SYSREF |
W-0h | W-0h | W-0h | W-0h | W-0h | W-0h | W-0h | R/W-0h |
LEGEND: R/W = Read/Write; W = Write only; -n = value after reset |
Bit | Field | Type | Reset | Description |
---|---|---|---|---|
7-1 | 0 | W | 0h | Must write 0. |
0 | PDN SYSREF | R/W | 0h | If the SYSREF pins are not used in the system, the SYSREF buffer must be powered down by setting this bit.
0 = Normal operation 1 = Powers down the SYSREF buffer |