SBASAP7 December   2024 ADC3664-SP

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Electrical Characteristics - Power Consumption
    6. 5.6 Electrical Characteristics - DC Specifications
    7. 5.7 Electrical Characteristics - AC Specifications
    8. 5.8 Timing Requirements
    9. 5.9 Typical Characteristics
  7. 6 Parameter Measurement Information
  8. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Analog Input
        1. 7.3.1.1 Analog Input Bandwidth
        2. 7.3.1.2 Analog Front End Design
          1. 7.3.1.2.1 Sampling Glitch Filter
          2. 7.3.1.2.2 AC Coupling
          3. 7.3.1.2.3 DC Coupling
      2. 7.3.2 Clock Input
        1. 7.3.2.1 Differential Vs Single-ended Clock Input
        2. 7.3.2.2 Signal Acquisition Time Adjust
      3. 7.3.3 Voltage Reference
        1. 7.3.3.1 Internal Voltage Reference
        2. 7.3.3.2 External Voltage Reference
      4. 7.3.4 Digital Data Path & Interface
        1. 7.3.4.1 Data Path Overview
        2. 7.3.4.2 Digital Interface
        3. 7.3.4.3 DCLKIN
        4. 7.3.4.4 Output Scrambler
        5. 7.3.4.5 Output Bit Mapper
          1. 7.3.4.5.1 2-Wire Mode
          2. 7.3.4.5.2 1-Wire Mode
          3. 7.3.4.5.3 1/2-Wire Mode
        6. 7.3.4.6 Output Data Format
        7. 7.3.4.7 Test Pattern
      5. 7.3.5 Digital Down Converter
        1. 7.3.5.1 Decimation Operation
        2. 7.3.5.2 Numerically Controlled Oscillator (NCO)
        3. 7.3.5.3 Decimation Filters
        4. 7.3.5.4 SYNC
        5. 7.3.5.5 Output Data Format with Decimation
    4. 7.4 Device Functional Modes
      1. 7.4.1 Low Latency Mode
      2. 7.4.2 Averaging Mode
    5. 7.5 Programming
      1. 7.5.1 Pin Control
      2. 7.5.2 Serial Peripheral Interface (SPI)
        1. 7.5.2.1 Register Write
        2. 7.5.2.2 Register Read
      3. 7.5.3 Device Configuration Steps
      4. 7.5.4 Register Map
        1. 7.5.4.1 Detailed Register Description
  9. 8 Application Information Disclaimer
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
    3. 8.3 Initialization Set Up
    4. 8.4 Power Supply Recommendations
    5. 8.5 Layout
      1. 8.5.1 Layout Guidelines
      2. 8.5.2 Layout Example
  10. 9 Device and Documentation Support
    1. 9.1 Receiving Notification of Documentation Updates
    2. 9.2 Support Resources
    3. 9.3 Trademarks
    4. 9.4 Electrostatic Discharge Caution
    5. 9.5 Glossary
  11. 10Revision History
  12. 11Mechanical, Packaging, and Orderable Information
    1. 11.1 Mechanical Data

Package Options

Refer to the PDF data sheet for device specific package drawings

Mechanical Data (Package|Pins)
  • HBP|64
Thermal pad, mechanical data (Package|Pins)
Orderable Information

5.7 Electrical Characteristics - AC Specifications

Typical values are at TA = 25°C, full temperature range is TMIN = –55°C to TMAX = 105°C, ADC sampling rate = 125MSPS, 50% clock duty cycle, AVDD = IOVDD = 1.8V, 1.6V external reference, and –1dBFS differential input, unless otherwise noted.
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
NSD Noise spectral density FIN = 5MHz, AIN = -20dBFS -156.9 dBFS/Hz
SNR Signal to noise ratio FIN = 5MHz 70 77.5 dBFS
FIN = 5MHz, AIN = -20dBFS 78.9 dBFS
FIN = 10MHz 77.6
FIN = 40MHz 76.9
FIN = 70MHz 75.5
FIN = 100MHz 74.1
SINAD Signal to noise and distortion ratio FIN = 5 MHz 75.7 dBFS
FIN = 10MHz 74.2
FIN = 40MHz 72.6
FIN = 70MHz 71.3
FIN = 100MHz 72.4
ENOB Effective number of bits FIN = 5MHz 12.6 bit
FIN = 10MHz 12.6
FIN = 40MHz 12.5
FIN = 70MHz 12.3
FIN = 100MHz 12.0
THD Total harmonic distortion (first five harmonics) FIN = 5MHz 68 80 dBc
FIN = 10MHz 76
FIN = 40 =MHz 74
FIN = 70MHz 72
FIN = 100MHz 76
HD2 Second harmonic distortion FIN = 5MHz 72.5 84 dBc
FIN = 10MHz 78
FIN = 40MHz 75
FIN = 70MHz 77
FIN = 100MHz 79
HD3 Third harmonic distortion FIN = 5MHz 69.5 84 dBc
FIN = 10MHz 81
FIN = 40MHz 88
FIN = 70MHz 76
FIN = 100MHz 81
Non HD2,3 Spurious free dynamic range (excluding HD2 and HD3) FIN = 5MHz 77 92 dBFS
FIN = 10MHz 93
FIN = 40MHz 89
FIN = 70MHz 84
FIN = 100MHz 86
IMD3 Two tone inter-modulation distortion F1 = 10MHz, F2 = 12MHz, AIN = -7dBFS/tone 88 dBc