SBASAU9 October   2024 ADC3908D025 , ADC3908D065 , ADC3908S025 , ADC3908S065 , ADC3908S125

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Device Comparison
  6. 5 Pin Configuration and Functions
  7. 6 Specifications
    1. 6.1  Absolute Maximum Ratings
    2. 6.2  ESD Ratings
    3. 6.3  Recommended Operating Conditions
    4. 6.4  Thermal Information
    5. 6.5  Electrical Characteristics - Power Consumption
    6. 6.6  Electrical Characteristics - DC Specifications
    7. 6.7  Electrical Characteristics - AC Specifications (25 MSPS)
    8. 6.8  Electrical Characteristics - AC Specifications (65 MSPS)
    9. 6.9  Electrical Characteristics - AC Specifications (125 MSPS)
    10. 6.10 Timing Requirements
    11. 6.11 Output Interface Timing Diagram
    12. 6.12 Typical Characteristics: 25MSPS
    13. 6.13 Typical Characteristics - 65MSPS
    14. 6.14 Typical Characteristics - 125MSPS
  8. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Analog Input
        1. 7.3.1.1 Single Ended Input
        2. 7.3.1.2 Differential Input
        3. 7.3.1.3 Analog Input Bandwidth
      2. 7.3.2 Sampling Clock Input
      3. 7.3.3 Digital Interface
        1. 7.3.3.1 Test Pattern
        2. 7.3.3.2 Interface Configuration using Pin Control
    4. 7.4 Device Functional Modes
      1. 7.4.1 Normal Operation
      2. 7.4.2 Power Down
  9. 8 Application Information Disclaimer
    1. 8.1 Typical Application
      1. 8.1.1 Design Requirements
      2. 8.1.2 Detailed Design Procedure
        1. 8.1.2.1 Input Signal Path
        2. 8.1.2.2 Sampling Clock
      3. 8.1.3 Application Curves
    2. 8.2 Initialization Set Up
    3. 8.3 Power Supply Recommendations
    4. 8.4 Layout
      1. 8.4.1 Layout Guidelines
      2. 8.4.2 Layout Example
  10. 9 Device and Documentation Support
    1. 9.1 Receiving Notification of Documentation Updates
    2. 9.2 Support Resources
    3. 9.3 Trademarks
    4. 9.4 Electrostatic Discharge Caution
    5. 9.5 Glossary
  11. 10Revision History
  12. 11Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

7.3.3.1 Test Pattern

The ADC3908Dx and ADC3908Sx has a static test pattern that can be enabled via pin control (see Interface Configuration Table). The test pattern splits each channel data into two groups, upper (D7:D4) and lower (D3:D0) bits. Each group has a value of all zeros or a value of all 1s. Figure 7-7 shows how test pattern is implemented for dual channel. Figure 7-8 shows how test pattern is implemented for single channel.

ADC3908D025 ADC3908D065 ADC3908D125 ADC3908S025 ADC3908S065 ADC3908S125 Dual Channel, Test PatternFigure 7-7 Dual Channel, Test Pattern
ADC3908D025 ADC3908D065 ADC3908D125 ADC3908S025 ADC3908S065 ADC3908S125 Single Channel, Test PatternFigure 7-8 Single Channel, Test Pattern