SBASAU9 October 2024 ADC3908D025 , ADC3908D065 , ADC3908D125 , ADC3908S025 , ADC3908S065 , ADC3908S125
PRODUCTION DATA
Time domain applications cover a wide range of frequencies from low input frequencies at or near DC in the 1st Nyquist zone. If a low input frequency is supported, then the input has to be DC coupled and the ADC driven by a fully differential amplifier (FDA).
The ADC performance is highly dependent on the quality of the external clock source. A higher ADC sampling rate is desirable to relax the external anti-aliasing filter. For optimum performance, the analog inputs must be driven differentially.
FEATURE | DESCRIPTION |
---|---|
Signal Bandwidth | DC to 30MHz |
Input Driver | Single ended to differential signal conversion and DC coupling |
Clock Source | External clock with low jitter |
When designing the amplifier/filter driving circuit, the ADC input full-scale voltage needs to be taken into consideration. For example, the ADC3908D125 input full-scale is 1.9 VPP. When factoring in approximately 1dB for insertion loss of the filter, then the amplifier needs to deliver close to 2.1 VPP. The amplifier distortion performance degrades with a larger output swing and considering the ADC common mode input voltage the amplifier may not be able to deliver the full swing. The deviceADC3908D125 provides an output common mode voltage of 1.25V and the THS4541 for example can only swing within 250mV of its negative supply. A unipolar 3.3V amplifier power supply limits the maximum voltage swing to approximately 2.8VPP. Hence, if a larger output swing is required (factoring in filter insertion loss) then a negative supply for the amplifier is needed to eliminate that limitation. Additionally, input voltage protection diodes may be needed to protect the ADC from over-voltage events.
DEVICE | MIN OUTPUT VOLTAGE | MAX SWING WITH 3.3V/ 0V SUPPLY |
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THS4541 | VS- + 250mV | 2.8VPP |