SBAS473E
May 2009 – January 2018
ADS1013
,
ADS1014
,
ADS1015
PRODUCTION DATA.
1
Features
2
Applications
3
Description
Device Images
Simplified Block Diagrams
4
Revision History
5
Device Comparison Table
6
Pin Configuration and Functions
Pin Functions
7
Specifications
7.1
Absolute Maximum Ratings
7.2
ESD Ratings
7.3
Recommended Operating Conditions
7.4
Thermal Information
7.5
Electrical Characteristics
7.6
Timing Requirements: I2C
7.7
Typical Characteristics
8
Detailed Description
8.1
Overview
8.2
Functional Block Diagrams
8.3
Feature Description
8.3.1
Multiplexer
8.3.2
Analog Inputs
8.3.3
Full-Scale Range (FSR) and LSB Size
8.3.4
Voltage Reference
8.3.5
Oscillator
8.3.6
Output Data Rate and Conversion Time
8.3.7
Digital Comparator (ADS1014 and ADS1015 Only)
8.3.8
Conversion Ready Pin (ADS1014 and ADS1015 Only)
8.3.9
SMbus Alert Response
8.4
Device Functional Modes
8.4.1
Reset and Power-Up
8.4.2
Operating Modes
8.4.2.1
Single-Shot Mode
8.4.2.2
Continuous-Conversion Mode
8.4.3
Duty Cycling For Low Power
8.5
Programming
8.5.1
I2C Interface
8.5.1.1
I2C Address Selection
8.5.1.2
I2C General Call
8.5.1.3
I2C Speed Modes
8.5.2
Slave Mode Operations
8.5.2.1
Receive Mode
8.5.2.2
Transmit Mode
8.5.3
Writing To and Reading From the Registers
8.5.4
Data Format
8.6
Register Map
8.6.1
Address Pointer Register (address = N/A) [reset = N/A]
Table 4.
Address Pointer Register Field Descriptions
8.6.2
Conversion Register (P[1:0] = 0h) [reset = 0000h]
Table 5.
Conversion Register Field Descriptions
8.6.3
Config Register (P[1:0] = 1h) [reset = 8583h]
Table 6.
Config Register Field Descriptions
8.6.4
Lo_thresh (P[1:0] = 2h) [reset = 8000h] and Hi_thresh (P[1:0] = 3h) [reset = 7FFFh] Registers
Table 7.
Lo_thresh and Hi_thresh Register Field Descriptions
9
Application and Implementation
9.1
Application Information
9.1.1
Basic Connections
9.1.2
Single-Ended Inputs
9.1.3
Input Protection
9.1.4
Unused Inputs and Outputs
9.1.5
Analog Input Filtering
9.1.6
Connecting Multiple Devices
9.1.7
Quickstart Guide
9.2
Typical Application
9.2.1
Design Requirements
9.2.2
Detailed Design Procedure
9.2.2.1
Shunt Resistor Considerations
9.2.2.2
Operational Amplifier Considerations
9.2.2.3
ADC Input Common-Mode Considerations
9.2.2.4
Resistor (R1, R2, R3, R4) Considerations
9.2.2.5
Noise and Input Impedance Considerations
9.2.2.6
First-order RC Filter Considerations
9.2.2.7
Circuit Implementation
9.2.2.8
Results Summary
9.2.3
Application Curves
10
Power Supply Recommendations
10.1
Power-Supply Sequencing
10.2
Power-Supply Decoupling
11
Layout
11.1
Layout Guidelines
11.2
Layout Example
12
Device and Documentation Support
12.1
Documentation Support
12.1.1
Related Documentation
12.2
Related Links
12.3
Receiving Notification of Documentation Updates
12.4
Community Resources
12.5
Trademarks
12.6
Electrostatic Discharge Caution
12.7
Glossary
13
Mechanical, Packaging, and Orderable Information
Package Options
Mechanical Data (Package|Pins)
DGS|10
MPDS035C
RUG|10
MPQF216A
Thermal pad, mechanical data (Package|Pins)
Orderable Information
sbas473e_oa
sbas473e_pm
7.7
Typical Characteristics
at T
A
= 25°C, VDD = 3.3 V, FSR = ±2.048 V, DR = 128 SPS (unless otherwise noted)
Figure 2.
Operating Current vs Temperature
Figure 4.
Single-Ended Offset Error vs Temperature
Figure 6.
Gain Error vs Temperature
Figure 3.
Power-Down Current vs Temperature
Figure 5.
Differential Offset vs Temperature