ADS114x 16-Bit, 2-kSPS, Analog-to-Digital Converters With Programmable Gain Amplifier (PGA) for Sensor Measurement
1 Features
- Programmable Data Rates Up to 2 kSPS
- Single-Cycle Settling for All Data Rates
- Simultaneous 50-Hz and 60-Hz Rejection at
20 SPS -
Analog Multiplexer With 8 (ADS1148) and
4 (ADS1147) Independently Selectable Inputs - Programmable Gain: 1 V/V to 128 V/V
- Dual-Matched Programmable Excitation Current Sources
- Low-Drift Internal 2.048-V Reference
- Sensor Burnout Detection
- 4 or 8 General-Purpose I/Os (ADS1147 and ADS1148)
- Internal Temperature Sensor
- Power Supply and VREF Monitoring (ADS1147 and ADS1148)
- Self and System Calibration
- SPI™-Compatible Serial Interface
- Analog Supply: Unipolar (2.7 V to 5.25 V) or Bipolar (±2.5 V)
- Digital Supply: 2.7 V to 5.25 V
2 Applications
- Temperature Measurement
- RTDs, Thermocouples, and Thermistors
- Pressure Measurement
- Flow Meters
- Factory Automation and Process Control
3 Description
The ADS1146, ADS1147, and ADS1148 devices are precision, 16-bit analog-to-digital converters (ADCs) that include many integrated features to reduce system cost and component count for sensor measurement applications. The devices feature a low-noise, programmable gain amplifier (PGA), a precision delta-sigma (ΔΣ) ADC with a single-cycle settling digital filter, and an internal oscillator. The ADS1147 and ADS1148 devices also provide a built-in, low-drift voltage reference, and two matched programmable excitation current sources (IDACs).
An input multiplexer supports four differential inputs for the ADS1148, two for the ADS1147, and one for the ADS1146. In addition, the multiplexer integrates sensor burn-out detection, voltage bias for thermocouples, system monitoring, and general purpose digital I/Os (ADS1147 and ADS1148). The PGA provides selectable gains up to 128 V/V. These features provide a complete front-end solution for temperature sensor measurement applications including thermocouples, thermistors, and resistance temperature detectors (RTDs) and other small signal measurements including resistive bridge sensors. The digital filter settles in a single cycle to support fast channel cycling when using the input multiplexer and provides data rates up to 2 kSPS. For data rates of 20 SPS or less, both 50-Hz and 60-Hz interference are rejected by the filter.
Device Information(1)
| PART NUMBER | PACKAGE | BODY SIZE (NOM) |
|---|---|---|
| ADS1146 | TSSOP (16) | 5.00 mm × 4.40 mm |
| ADS1147 | TSSOP (20) | 6.50 mm × 4.40 mm |
| ADS1148 | TSSOP (28) | 9.70 mm × 4.40 mm |
| VQFN (32) | 5.00 mm × 5.00 mm |
- For all available packages, see the orderable addendum at the end of the datasheet.
Functional Block Diagrams
4 Revision History
Changes from F Revision (April 2012) to G Revision
- Added ESD Ratings table and Feature Description, Device Functional Modes, Application and Implementation, Power Supply Recommendations, Layout, Device and Documentation Support, and Mechanical, Packaging, and Orderable Information sectionsGo
- Updated Features and Description sections to include use in applications other than temperature measurementGo
- Merged all Pin Functions into one tableGo
- Changed values in the Thermal Information table to align with JEDEC standardsGo
- Added Absolute input current specification to Electrical CharacteristicsGo
- Changed compliance voltage for excitation current sources in Electrical Characteristics, now refers to Figure 9 and Figure 10; changed initial error and initial mismatch to absolute error and absolute mismatchGo
- Changed IDAC mismatch specification in Electrical Characteristics table to reflect proper distributionGo
- Re-ordered elements in Timing Requirements tables, changed timing references to tCLKGo
- Changed Low-Noise PGA sectionGo
- Modified Figure 20 to show variable resistor position Go
- Added fCLK/fMOD column to Table 5Go
- Changed Chip Select (CS) sectionGo
- Changed Data Output and Data Ready (DOUT/DRDY) sectionGo
- Changed Figure 42, 43, and 44Go
- Added more infomation to Data Format section; added Figure 45Go
- Modified Figure 46 to include CS status through SLEEP and WAKEUP commandGo
- Updated Figure 47 and Figure 48 to show start of command executionGo
- Removed figure for SDATAC (0001 011x) (Stop Read Data Continuous) commandGo
- Updated Figure 53 to show MUX1 as the start of the data byte for the given command and register locationGo
- Updated Figure 54 to show start of calibration timingGo
- Updated Figure 79 and Figure 80 to better show timing informationGo
Changes from E Revision (April 2012) to F Revision
- Added ADS1148, QFN-32 row to Package/Ordering Information tableGo
Changes from D Revision (October 2011) to E Revision
- Added RHB pin configurationGo
Changes from C Revision (April 2010) to D Revision
- Added footnote to Analog Inputs, Full-scale input voltage parameter typical specification in Electrical Characteristics tableGo
- Deleted Analog Inputs, Mux leakage current parameter from Electrical Characteristics tableGo
- Added tCSPW to minimum specification in Timing Characteristics for Figure 1Go
- Changed tDTS minimum specification in Timing RequirementsGo
- Updated Figure 1 to show tCSPW timingGo
- Added Figure 6, Figure 5, Figure 9, and Figure 10Go
- Added Figure 15, Figure 16, Figure 11, and Figure 12Go
- Corrected Figure 19 to remove constant shortGo
- Added Table 4 to Analog Input Impedance sectionGo
- Corrected Figure 29 and Figure 30Go
- Added details to Bias Voltage Generation sectionGo
- Added Channel Cycling and Overload Recovery sectionGo
- Corrected Table 10Go
- Added Equation 18 to Calibration sectionGo
- Added details to Calibration Commands sectionGo
- Added details to Digital Interface sectionGo
- Added Restricted command to Table 15Go
