The ADS1146, ADS1147, and ADS1148 devices are precision, 16-bit analog-to-digital converters (ADCs) that include many integrated features to reduce system cost and component count for sensor measurement applications. The devices feature a low-noise, programmable gain amplifier (PGA), a precision delta-sigma (ΔΣ) ADC with a single-cycle settling digital filter, and an internal oscillator. The ADS1147 and ADS1148 devices also provide a built-in, low-drift voltage reference, and two matched programmable excitation current sources (IDACs).
An input multiplexer supports four differential inputs for the ADS1148, two for the ADS1147, and one for the ADS1146. In addition, the multiplexer integrates sensor burn-out detection, voltage bias for thermocouples, system monitoring, and general purpose digital I/Os (ADS1147 and ADS1148). The PGA provides selectable gains up to 128 V/V. These features provide a complete front-end solution for temperature sensor measurement applications including thermocouples, thermistors, and resistance temperature detectors (RTDs) and other small signal measurements including resistive bridge sensors. The digital filter settles in a single cycle to support fast channel cycling when using the input multiplexer and provides data rates up to 2 kSPS. For data rates of 20 SPS or less, both 50-Hz and 60-Hz interference are rejected by the filter.
PART NUMBER | PACKAGE | BODY SIZE (NOM) |
---|---|---|
ADS1146 | TSSOP (16) | 5.00 mm × 4.40 mm |
ADS1147 | TSSOP (20) | 6.50 mm × 4.40 mm |
ADS1148 | TSSOP (28) | 9.70 mm × 4.40 mm |
VQFN (32) | 5.00 mm × 5.00 mm |
Changes from F Revision (April 2012) to G Revision
Changes from E Revision (April 2012) to F Revision
Changes from D Revision (October 2011) to E Revision
Changes from C Revision (April 2010) to D Revision
PIN | TYPE(1) | DESCRIPTION(2) | ||||
---|---|---|---|---|---|---|
NAME | ADS1146 | ADS1147 | ADS1148 | |||
TSSOP (16) | TSSOP (20) | TSSOP (28) | VQFN (32) | |||
AIN0/IEXC | — | 9 | 11 | 17 | I | Analog input 0, optional excitation current output |
AIN1/IEXC | — | 10 | 12 | 18 | I | Analog input 1, optional excitation current output |
AIN2/IEXC/GPIO2 | — | 11 | 17 | 23 | I/O | Analog input 2, optional excitation current output, or general-purpose digital input/output pin 2 |
AIN3/IEXC/GPIO3 | — | 12 | 18 | 24 | I/O | Analog input 3, optional excitation current output, or general-purpose digital input/output pin 3 |
AIN4/IEXC/GPIO4 | — | — | 13 | 19 | I/O | Analog input 4, optional excitation current output, or general-purpose digital input/output pin 4 |
AIN5/IEXC/GPIO5 | — | — | 14 | 20 | I/O | Analog input 5, optional excitation current output, or general-purpose digital input/output pin 5 |
AIN6/IEXC/GPIO6 | — | — | 15 | 21 | I/O | Analog input 6, optional excitation current output, or general-purpose digital input/output pin 6 |
AIN7/IEXC/GPIO7 | — | — | 16 | 22 | I/O | Analog input 7, optional excitation current output, or general-purpose digital input/output pin 7 |
AINN | 8 | — | — | — | I | Negative analog input |
AINP | 7 | — | — | — | I | Positive analog input |
AVDD | 10 | 14 | 22 | 28 | P | Positive analog power supply, connect a 0.1-µF capacitor to AVSS |
AVSS | 9 | 13 | 21 | 27 | P | Negative analog power supply |
CLK | 3 | 3 | 3 | 9 | I | External clock input, tie to DGND to activate the internal oscillator. |
CS | 12 | 16 | 24 | 30 | I | Chip select (active low) |
DGND | 2 | 2 | 2 | 8 | G | Digital ground |
DIN | 15 | 19 | 27 | 1 | I | Serial data input |
DOUT/DRDY | 14 | 18 | 26 | 32 | O | Serial data output, or data out combined with data ready |
DRDY | 13 | 17 | 25 | 31 | O | Data ready (active low) |
DVDD | 1 | 1 | 1 | 7 | P | Digital power supply, connect a 0.1-µF capacitor to DGND |
IEXC1 | — | — | 20 | 26 | O | Excitation current output 1 |
IEXC2 | — | — | 19 | 25 | O | Excitation current output 2 |
NC | — | — | — | 3, 4, 5, 6 | — | Connect pin to AVSS or leave floating |
REFN | 6 | — | — | — | I | Negative external reference input |
REFN0/GPIO1 | — | 6 | 6 | 12 | I/O | Negative external reference input 0, or general-purpose digital input/output pin 1 |
REFN1 | — | — | 8 | 14 | I | Negative external reference input 1 |
REFP | 5 | — | — | — | I | Positive external reference input |
REFP0/GPIO0 | — | 5 | 5 | 11 | I/O | Positive external reference input 0, or general-purpose digital input/output pin 1 |
REFP1 | — | — | 7 | 13 | I | Positive external reference input 1 |
RESET | 4 | 4 | 4 | 10 | I | Reset (active low) |
SCLK | 16 | 20 | 28 | 2 | I | Serial clock input |
START | 11 | 15 | 23 | 29 | I | Conversion start |
Thermal Pad | — | — | — | 33 | — | Connect pin to AVSS or leave floating |
VREFCOM | — | 8 | 10 | 16 | O | Negative internal reference voltage output, connect to AVSS when using a unipolar supply or to the mid-voltage ground when using a bipolar supply |
VREFOUT | — | 7 | 9 | 15 | O | Positive internal reference voltage output, connect a capacitor in the range of 1 µF to 47 µF to VREFCOM |