SBAS924A July   2018  – November 2018 ADS1219

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
    1.     Device Images
      1.      Voltage, Current, and Temperature Monitoring Application
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
    1.     Pin Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 I2C Timing Requirements
    7. 6.7 I2C Switching Characteristics
    8. 6.8 Typical Characteristics
  7. 7 Parameter Measurement Information
    1. 7.1 Noise Performance
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Multiplexer
      2. 8.3.2 Rail-to-Rail Input Buffers and Programmable Gain Stage
      3. 8.3.3 Voltage Reference
      4. 8.3.4 Modulator and Internal Oscillator
      5. 8.3.5 Digital Filter
      6. 8.3.6 Conversion Times
      7. 8.3.7 Offset Calibration
    4. 8.4 Device Functional Modes
      1. 8.4.1 Power-Up and Reset
        1. 8.4.1.1 Power-On Reset
        2. 8.4.1.2 RESET Pin
        3. 8.4.1.3 Reset by Command
      2. 8.4.2 Conversion Modes
        1. 8.4.2.1 Single-Shot Conversion Mode
        2. 8.4.2.2 Continuous Conversion Mode
      3. 8.4.3 Power-Down Mode
    5. 8.5 Programming
      1. 8.5.1 I2C Interface
        1. 8.5.1.1 I2C Address
        2. 8.5.1.2 Serial Clock (SCL) and Serial Data (SDA)
        3. 8.5.1.3 Data Ready (DRDY)
        4. 8.5.1.4 Interface Speed
        5. 8.5.1.5 Data Transfer Protocol
        6. 8.5.1.6 I2C General Call (Software Reset)
        7. 8.5.1.7 Timeout
      2. 8.5.2 Data Format
      3. 8.5.3 Commands
        1. 8.5.3.1 Command Latching
        2. 8.5.3.2 RESET (0000 011x)
        3. 8.5.3.3 START/SYNC (0000 100x)
        4. 8.5.3.4 POWERDOWN (0000 001x)
        5. 8.5.3.5 RDATA (0001 xxxx)
        6. 8.5.3.6 RREG (0010 0rxx)
        7. 8.5.3.7 WREG (0100 00xx dddd dddd)
      4. 8.5.4 Reading Data and Monitoring for New Conversion Results
    6. 8.6 Register Map
      1. 8.6.1 Configuration and Status Registers
      2. 8.6.2 Register Descriptions
        1. 8.6.2.1 Configuration Register (address = 0h) [reset = 00h]
          1. Table 10. Configuration Register Field Descriptions
        2. 8.6.2.2 Status Register (address = 1h) [reset = 00h]
          1. Table 11. Status Register Field Descriptions
  9. 9 Application and Implementation
    1. 9.1 Application Information
      1. 9.1.1 Interface Connections
      2. 9.1.2 Connecting Multiple Devices on the Same I2C Bus
      3. 9.1.3 Unused Inputs and Outputs
      4. 9.1.4 Analog Input Filtering
      5. 9.1.5 External Reference and Ratiometric Measurements
      6. 9.1.6 Establishing Proper Limits on the Absolute Input Voltage
      7. 9.1.7 Pseudo Code Example
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
        1. 9.2.2.1 Voltage Monitoring
        2. 9.2.2.2 High-Side Current Measurement
        3. 9.2.2.3 Thermistor Measurement
        4. 9.2.2.4 Register Settings
      3. 9.2.3 Application Curve
  10. 10Power Supply Recommendations
    1. 10.1 Power-Supply Sequencing
    2. 10.2 Power-Supply Decoupling
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12Device and Documentation Support
    1. 12.1 Device Support
      1. 12.1.1 Third-Party Products Disclaimer
    2. 12.2 Documentation Support
      1. 12.2.1 Related Documentation
    3. 12.3 Receiving Notification of Documentation Updates
    4. 12.4 Community Resources
    5. 12.5 Trademarks
    6. 12.6 Electrostatic Discharge Caution
    7. 12.7 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

6.5 Electrical Characteristics

minimum and maximum specifications apply from TA = –40°C to +125°C; typical specifications are at TA = 25°C; all specifications are at AVDD = 2.3 V to 5.5 V, DVDD = 3.3 V, all data rates, all gains, and internal reference enabled (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
ANALOG INPUTS
Absolute input current VIN = 0 V ±5 nA
Absolute input current drift VIN = 0 V 10 pA/°C
Differential input current VCM = AVDD / 2, –VREF / Gain ≤ VIN ≤ VREF / Gain ±5 nA
Differential input current drift VCM = AVDD / 2, –VREF / Gain ≤ VIN ≤ VREF / Gain 10 pA/°C
SYSTEM PERFORMANCE
Resolution (no missing codes) 24 Bits
DR Data rate 20, 90, 330, 1000 SPS
Noise (input-referred)(1) Gain = 1, DR = 20 SPS 5.04 µVRMS
INL Integral nonlinearity AVDD = 3.3 V, VCM = AVDD / 2, best fit –15 4 15 ppmFSR
VIO Input offset voltage Differential inputs ±4 µV
Offset drift vs temperature 0.02 0.1 µV/°C
Gain error(2) ±0.01%
Gain drift vs temperature(2) 0.3 2 ppm/°C
NMRR Normal-mode rejection ratio 50 Hz ±1 Hz, DR = 20 SPS 78 88 dB
60 Hz ±1 Hz, DR = 20 SPS 80 88
CMRR Common-mode rejection ratio At dc, gain = 1, AVDD = 3.3 V 90 105 dB
fCM = 50 Hz or 60 Hz, DR = 20 SPS, AVDD = 3.3 V 105 115
PSRR Power-supply rejection ratio AVDD at dc, VCM = AVDD / 2 85 105 dB
DVDD at dc, VCM = AVDD / 2 95 115
INTERNAL VOLTAGE REFERENCE
VREF Reference voltage 2.048 V
Accuracy TA = 25°C, TSSOP package –0.15% ±0.01% 0.15%
TA = 25°C, WQFN package –0.25% ±0.04% 0.25%
Temperature drift 5 30 ppm/°C
Long-term drift 1000 hours 110 ppm
VOLTAGE REFERENCE INPUTS
Reference input current REFP = VREF, REFN = AGND, AVDD = 3.3 V ±10 nA
INTERNAL OSCILLATOR
fCLK Frequency 1.024 MHz
Accuracy –2% ±1% 2%
DIGITAL INPUTS/OUTPUTS
VIL Logic input level, low DGND 0.3 DVDD V
VIH Logic input level, high 2.3 V ≤ DVDD < 3.0 V,
SCL, SDA, A0, A1, DRDY 		0.7 DVDD DVDD + 0.5 V
3.0 V ≤ DVDD ≤ 5.5 V,
SCL, SDA, A0, A1, DRDY 		0.7 DVDD 5.5
RESET 0.7 DVDD DVDD
Vhys Hysteresis of Schmitt-trigger inputs Fast-mode, fast-mode plus 0.05 DVDD V
VOL Logic output level, low IOL = 3 mA DGND 0.15 0.4 V
IOL Low-level output current VOL = 0.4 V, standard-mode, fast-mode 3 mA
VOL = 0.4 V, fast-mode plus 20
VOL = 0.6 V, fast-mode 6
Ii Input current DGND + 0.1 V < VDigital Input < DVDD – 0.1 V –10 10 µA
Ci Capacitance Each pin 10 pF
ANALOG SUPPLY CURRENT (AVDD = 3.3 V, VIN = 0 V)
IAVDD Analog supply current Power-down mode 0.1 3 µA
Conversion mode, internal reference selected 250
Conversion mode, external reference selected 310
DIGITAL SUPPLY CURRENT (DVDD = 3.3 V, All Data Rates, I2C Not Active)
IDVDD Digital supply current Power-down mode 0.3 5 µA
Conversion mode 65 100
POWER DISSIPATION (AVDD = DVDD = 3.3 V, All Data Rates, VIN = 0 V, I2C Not Active)
PD Power dissipation Conversion mode, internal reference selected 1.04 mW
(1) See the Noise Performance section for more information.
(2) Excluding error of voltage reference.