SBAS937B
September 2018 – December 2018
ADS1278-SP
PRODUCTION DATA.
1
Features
2
Applications
3
Description
Device Images
Simplified Schematic
4
Revision History
5
Description (continued)
6
Pin Configuration and Functions
Pin Functions
7
Specifications
7.1
Absolute Maximum Ratings
7.2
ESD Ratings
7.3
Recommended Operating Conditions
7.4
Thermal Information
7.5
Electrical Characteristics
7.6
Timing Requirements: SPI Format
7.7
Timing Requirements: Frame-Sync Format
7.8
Quality Conformance Inspection
7.9
Typical Characteristics
8
Detailed Description
8.1
Overview
8.2
Functional Block Diagram
8.3
Feature Description
8.3.1
Sampling Aperture Matching
8.3.2
Frequency Response
8.3.2.1
High-Speed, Low-Power, And Low-Speed Modes
8.3.2.2
High-Resolution Mode
8.3.3
Phase Response
8.3.4
Settling Time
8.3.5
Data Format
8.3.6
Analog Inputs (AINP, AINN)
8.3.7
Voltage Reference Inputs (VREFP, VREFN)
8.3.8
Clock Input (CLK)
8.3.9
Mode Selection (MODE)
8.3.10
Synchronization (SYNC)
8.3.11
Power-Down (PWDN)
8.3.12
Format[2:0]
8.3.13
Serial Interface Protocols
8.3.14
SPI Serial Interface
8.3.14.1
SCLK
8.3.14.2
DRDY/FSYNC (SPI Format)
8.3.14.3
DOUT
8.3.14.4
DIN
8.3.15
Frame-Sync Serial Interface
8.3.15.1
SCLK
8.3.15.2
DRDY/FSYNC (Frame-Sync Format)
8.3.15.3
DOUT
8.3.15.4
DIN
8.3.16
DOUT Modes
8.3.16.1
TDM Mode
8.3.16.2
TDM Mode, Fixed-Position Data
8.3.16.3
TDM Mode, Dynamic Position Data
8.3.16.4
Discrete Data Output Mode
8.3.17
Daisy-Chaining
8.3.18
Modulator Output
8.3.19
Pin Test Using Test[1:0] Inputs
8.3.20
VCOM Output
8.4
Device Functional Modes
9
Application and Implementation
9.1
Application Information
9.2
Typical Application
9.2.1
Design Requirements
9.2.2
Detailed Design Procedure
9.2.3
Application Curve
10
Power Supply Recommendations
11
Layout
11.1
Layout Guidelines
11.2
Layout Example
12
Device and Documentation Support
12.1
Receiving Notification of Documentation Updates
12.2
Community Resources
12.3
Trademarks
12.4
Electrostatic Discharge Caution
12.5
Glossary
13
Mechanical, Packaging, and Orderable Information
Package Options
Mechanical Data (Package|Pins)
HFQ|84
MCQF017A
Thermal pad, mechanical data (Package|Pins)
Orderable Information
sbas937b_oa
7.9
Typical Characteristics
At T
A
= 25°C, High-Speed mode, AVDD = 5 V, DVDD = 1.8 V, IOVDD = 3.3 V, f
CLK
= 27 MHz, VREFP = 2.5 V,
and VREFN = 0 V, unless otherwise noted.
Figure 3.
Output Spectrum
Figure 5.
Output Spectrum
Figure 7.
Output Spectrum
Figure 9.
Output Spectrum
Figure 11.
Output Spectrum
Figure 13.
Output Spectrum
Figure 15.
Output Spectrum
Figure 17.
Output Spectrum
Figure 19.
Total Harmonic Distortion vs Frequency
Figure 21.
Total Harmonic Distortion vs Frequency
Figure 23.
Total Harmonic Distortion vs Frequency
Figure 25.
Total Harmonic Distortion vs Frequency
Figure 27.
Offset Drift Histogram
Figure 29.
Offset Warmup Drift Response Band
Figure 31.
Offset Error Histogram
Figure 33.
Channel Gain Match Histogram
Figure 35.
Offset and Gain vs Temperature
Figure 37.
Sampling Match Error Histogram
Figure 39.
Analog Input Differential Impedance vs Temperature
Figure 41.
Integral Nonlinearity vs Temperature
Figure 43.
Linearity and Total Harmonic Distortion vs Reference Voltage
Figure 45.
Noise vs Temperature
Figure 47.
Total Harmonic Distortion and Noise vs CLK
Figure 49.
Power-Supply Rejection vs Power-Supply Frequency
Figure 51.
DVDD Current vs Temperature
Figure 53.
Power Dissipation vs Temperature
Figure 4.
Output Spectrum
Figure 6.
Noise Histogram
Figure 8.
Output Spectrum
Figure 10.
Noise Histogram
Figure 12.
Output Spectrum
Figure 14.
Noise Histogram
Figure 16.
Output Spectrum
Figure 18.
Noise Histogram
Figure 20.
Total Harmonic Distortion vs Input Amplitude
Figure 22.
Total Harmonic Distortion vs Input Amplitude
Figure 24.
Total Harmonic Distortion vs Input Amplitude
Figure 26.
Total Harmonic Distortion vs Input Amplitude
Figure 28.
Gain Drift Histogram
Figure 30.
Gain Warmup Drift Response Band
Figure 32.
Gain Error Histogram
Figure 34.
Channel Offset Match Histogram
Figure 36.
VCOM Voltage Output Histogram
Figure 38.
Reference Input Differential Impedance vs Temperature
Figure 40.
Analog Input Differential Impedance vs Temperature
Figure 42.
Linearity Error vs Input Level
Figure 44.
Noise and Linearity vs Input Common-Mode Voltage
Figure 46.
Noise vs Reference Voltage
Figure 48.
Common-Mode Rejection vs Input Frequency
Figure 50.
AVDD Current vs Temperature
Figure 52.
IOVDD Current vs Temperature