SBASAM0B March 2024 – November 2024 ADS127L18
PRODMIX
The frame-sync CRC is an optional byte appended to the conversion data. The CRC is eight bits and is calculated over the data bytes and, if enabled, including the STATUS_DP byte. The argument for the CRC calculation is 16 bits, 24 bits, or 32 bits. The number of bits to be used for the CRC depend on the mode. For the 16-bit data mode, the CRC covers two bytes. For the 24-bit data mode or the STATUS_DP byte plus 16 bits of data, the CRC covers three bytes. For the STATUS_DP byte plus 24 bits of data, the CRC covers three bytes. The CRC uses the same CRC-8 ATM polynomial as the SPI CRC. The DP_CRC_EN bit of the DP_CFG1 register enables the CRC byte.