SBASAM0B March 2024 – November 2024 ADS127L18
PRODMIX
The ADC provides a clock counter to verify the internal clock frequency. CLK_CNT is an 8-bit register operating in continuous rollover mode at a frequency = fCLK/32. To verify the clock frequency, read the register at known intervals and compare the difference of values to the expected value. The ADC must be in active conversion mode with a minimum SCLK frequency of fCLK/32 to read the counter value.
The counter is enabled by the CLK_CNT_EN bit of the GEN_CFG3 register. When enabled, the counter value initializes to 00h. When disabled, the counter value is 00h.