SBAS565C January 2014 – August 2019 ADS1283
PRODUCTION DATA.
The 24-bit offset calibration word is composed of three 8-bit registers, as shown in Table 19. The offset register is left-justified to align with the 32 bits of conversion data. The offset is in twos complement format with a maximum positive value of 7FFFFFh and a maximum negative value of 800000h. This value is subtracted from the conversion data. A register value of 00000h has no offset correction (default value).
REGISTER | BYTE | BIT ORDER | |||||||
---|---|---|---|---|---|---|---|---|---|
OFC0 | LSB | B7 | B6 | B5 | B4 | B3 | B2 | B1 | B0 (LSB) |
OFC1 | MID | B15 | B14 | B13 | B12 | B11 | B10 | B9 | B8 |
OFC2 | MSB | B23 (MSB) | B22 | B21 | B20 | B19 | B18 | B17 | B16 |
Although the offset calibration register value can correct offsets ranging from –FS to +FS (as shown in Table 20), in order to avoid input overload, do not exceed the maximum input voltage range of 106% FSR (including calibration).
OFC REGISTER | FINAL OUTPUT CODE(1) |
---|---|
7FFFFFh | 80000000h |
000001h | FFFFFF00h |
000000h | 00000000h |
FFFFFFh | 00000100h |
800000h | 7FFFFF00h |