SBAS943A September 2018 – August 2019 ADS1284
PRODUCTION DATA.
The last section of the digital filter is a first-order HPF implemented as an IIR structure. This filter stage blocks dc signals, and rolls-off low frequency components below the cutoff frequency. The transfer function for the filter is shown in Equation 11:
The high-pass corner frequency is programmed by registers HPF[1:0], in hexadecimal. Equation 13 is used to set the high-pass corner frequency. Table 13 lists example values for the high-pass filter.
where
fHP (Hz) | DATA RATE (SPS) | HPF[1:0] |
---|---|---|
0.5 | 250 | 0337h |
1.0 | 500 | 0337h |
1.0 | 1000 | 019Ah |
The HPF causes a small gain error, in which case the magnitude of the error depends on the ratio of fHP / fDATA. For many common values of (fHP / fDATA), the gain error is negligible. Figure 51 shows the gain error of the HPF.
The gain error factor is calculated in Equation 14:
Figure 52 shows the first-order amplitude and phase response of the HPF. In the case of applying step inputs (changing gains or inputs) or synchronizing, make sure to take the settling time of the filter into account.