The ADS1287 device is a low-power, analog-to-digital converter (ADC), with an integrated programmable gain amplifier (PGA) and finite-impulse-response (FIR) digital filter. The ADC is suitable for the demanding needs of seismic equipment requiring precision digitizing with low power consumption.
The ADC features a programmable-gain, high-impedance complementary metal oxide semiconductor (CMOS) amplifier, suitable for direct connection of geophone and hydrophone sensors to the ADC over a wide range of input signals (±2.5 V to ±0.156 V).
The ADC incorporates a fourth-order, inherently stable, delta-sigma (ΔΣ) modulator. The modulator digital output is filtered and decimated by the internal FIR digital filter to yield the ADC conversion result.
The FIR digital filter provides data rates up to 1000 samples per second (SPS). The high-pass filter (HPF) removes DC and low frequency components from the conversion result. On-chip gain and offset scaling registers support system calibration.
Together, the amplifier, modulator, and digital filter dissipate 4.5 mW in high-resolution mode (2.4 mW in low-power mode). The ADC is packaged in a compact 5-mm × 4-mm VQFN package. The ADC is fully specified over the –40°C to +85°C temperature range.
PART NUMBER | PACKAGE | BODY SIZE (NOM) |
---|---|---|
ADS1287 | VQFN (24) | 5.00 mm × 4.00 mm |
SPACE
Changes from A Revision (November 2017) to B Revision
Changes from * Revision (June 2017) to A Revision
PIN | FUNCTION | DESCRIPTION | |
---|---|---|---|
NO. | NAME | ||
1 | DRDY | Digital output | Data ready, active low |
2 | DOUT | Digital output | Serial data output |
3 | DIN | Digital input | Serial data input |
4 | CS | Digital input | Serial interface select, active low |
5 | SYNC | Digital input | Synchronize, active high |
6 | NC | — | No connection |
7 | DGND | Ground | Digital ground |
8 | CAPN | Analog output | PGA negative output; connect a 10-nF C0G capacitor from CAPP to CAPN |
9 | CAPP | Analog output | PGA positive output; connect a 10-nF C0G capacitor from CAPP to CAPN |
10 | NC | — | No connection |
11 | NC | — | No connection |
12 | AINP | Analog input | Positive analog input |
13 | AINN | Analog input | Negative analog input |
14 | AVDD | Analog | Positive analog power supply |
15 | AVSS | Analog | Negative analog power supply |
16 | REFN | Analog input | Negative reference input |
17 | REFP | Analog input | Positive reference input |
18 | PWDN | Digital input | Power-down, active low |
19 | RESET | Digital input | Reset, active low |
20 | DVDD | Digital | Digital power supply |
21 | DGND | Ground | Digital ground (tie to digital ground plane) |
22 | BYPAS | Analog output | Sub-regulator bypass; connect a 1-µF capacitor to DGND |
23 | CLK | Digital input | Master clock input (1.024 MHz) |
24 | SCLK | Digital input | Serial interface clock input |
Thermal pad | — | Electrically float the thermal pad. The thermal pad must be soldered to the PCB for optimum mechanical strength. PCB layout vias are optional. |