SBASA22A september 2022 – july 2023 ADS131B26-Q1
PRODUCTION DATA
Conversion data for the sequence steps of ADC2y are 16 bits and (in contrast to ADC1y and ADC3y conversion data) stored in the user register space (register addresses 10h to 2Fh). Read ADC2y conversion data using the register read command.
Data are provided in binary two's-complement format. Use Equation 13 to calculate the size of one code (LSB).
A positive full-scale input VIN ≥ +FSR – 1 LSB = VREFy / Gain – 1 LSB produces an output code of 7FFFh and a negative full-scale input (VIN ≤ –FSR = –VREFy / Gain) produces an output code of 8000h. The output clips at these codes for signals that exceed full-scale.
Table 8-13 summarizes the ideal output codes for different input signals.
INPUT SIGNAL (VIN = VAINP – VAINN) |
IDEAL OUTPUT CODE |
---|---|
≥ FSR (215 – 1) / 215 | 7FFFh |
FSR / 215 | 0001h |
0 | 0000h |
–FSR / 215 | FFFFh |
≤ –FSR | 8000h |
Figure 8-12 shows the mapping of the analog input signal to the output codes.