SBAS603B April 2013 – November 2020 ADS4449
PRODUCTION DATA
The device has a set of internal registers that can be accessed by the serial interface formed by the SEN (serial interface enable), SCLK (serial interface clock), SDATA (serial interface input data), and SDOUT (serial interface readback data) terminals. Serially shifting bits into the device is enabled when SEN is low. Serial data (SDATA) are latched at every SCLK falling edge when SEN is active (low). Serial data are loaded into the register at every 16th SCLK falling edge when SEN is low. When the word length exceeds a multiple of 16 bits, the excess bits are ignored. Data can be loaded in multiples of 16-bit words within a single active SEN pulse. The first eight bits form the register address and the remaining eight bits are the register data. The interface can function with SCLK frequencies from 20 MHz down to very low speeds (of a few hertz) and also with a non-50% SCLK duty cycle.