SLAS669E
September 2010 – may 2020
ADS5400-SP
PRODUCTION DATA.
1
Features
2
Applications
3
Description
Block Diagram
4
Revision History
5
Pin Configuration and Functions
Pin Functions
6
Specifications
6.1
Absolute Maximum Ratings
6.2
ESD Ratings
6.3
Recommended Operating Conditions
6.4
Thermal Information
6.5
Electrical Characteristics
6.6
Switching Characteristics
6.7
Timing Characteristics
6.8
Interleaving Adjustments
6.9
Typical Characteristics
7
Detailed Description
7.1
Overview
7.2
Functional Block Diagram
7.3
Feature Description
7.3.1
Input Configuration
7.3.2
Voltage Reference
7.3.3
Analog Input Over-Range Recovery Error
7.3.4
Clock Inputs
7.3.5
Over Range
7.3.6
Data Scramble
7.3.7
Test Patterns
7.3.8
Die Identification and Revision
7.3.9
Die Temperature Sensor
7.3.10
Interleaving
7.3.10.1
Gain Adjustment
7.3.10.2
Offset Adjustment
7.3.10.3
Input Clock Coarse Phase Adjustment
7.3.10.4
Input Clock Fine Phase Adjustment
7.4
Device Functional Modes
7.4.1
Output Bus and Clock Options
7.4.2
Reset and Synchronization
7.4.3
LVDS
7.5
Programming
7.5.1
Serial Interface
Table 2.
Instruction Byte of the Serial Interface
7.6
Serial Register Map
7.6.1
Description of Serial Registers
8
Application and Implementation
8.1
Application Information
8.2
Typical Application
8.2.1
Design Requirements
8.2.2
Detailed Design Procedure
8.2.2.1
Clocking Source for ADS5400-SP
8.2.2.2
Amplifier Selection
8.2.3
Application Curve
9
Power Supply Recommendations
10
Layout
10.1
Layout Guidelines
10.2
Layout Example
11
Device and Documentation Support
11.1
Device Support
11.1.1
Device Nomenclature
11.1.1.1
Definition of Specifications
11.2
Documentation Support
11.3
Receiving Notification of Documentation Updates
11.4
Support Resources
11.5
Trademarks
11.6
Electrostatic Discharge Caution
11.7
Glossary
12
Mechanical, Packaging, and Orderable Information
Package Options
Mechanical Data (Package|Pins)
HFS|100
MCQF018C
Thermal pad, mechanical data (Package|Pins)
Orderable Information
slas669e_oa
slas669e_pm
6.9
Typical Characteristics
Typical plots at T
A
= 25°C, sampling rate = 1 GSPS, 50% clock duty cycle, AVDD5 = 5 V, AVDD3 = 3.3 V, DVDD3 = 3.3 V, and 1.5-V
PP
differential clock, (unless otherwise noted)
Figure 6.
Spectral Performance v FFT for 250-MHz Input Signal
Figure 8.
Spectral Performance v FFT for 1.3-GHz Input signal
Figure 10.
Differential Nonlinearity
Figure 12.
AC Performance vs Input Amplitude (801.13-MHz Input signal)
Figure 14.
AC Performance vs Input Amplitude (747.5-MHz and 752.5-MHz Two-tone Input Signal)
Figure 16.
SFDR vs AVDD5 Across Temperature
Figure 18.
SFDR vs AVDD3 Across Temperature
Figure 20.
SFDR vs DVDD3 Across Temperature
Figure 7.
Spectral Performance v FFT for 0.9-GHz Input Signal
Figure 9.
Spectral Performance v FFT for 1.7-GHz Input Signal
Figure 11.
Integral Nonlinearity
Figure 13.
AC Performance vs Input Amplitude (247.5-MHz and 252.5-MHz Two-tone Input Signal)
Figure 15.
AC Performance vs Input Amplitude (1197.5-MHz and 1202.5-MHz Two-tone Input Signal)
Figure 17.
SNR vs AVDD5 Across Temperature
Figure 19.
SNR vs AVDD3 Across Temperature
Figure 21.
SNR vs DVDD3 Across Temperature
Figure 22.
SNR vs Input Frequency and Sampling Frequency
Figure 23.
SFDR vs Input Frequency and Sampling Frequency
Figure 24.
Normalized Gain Response vs Input Frequency