SBAS706D April 2015 – April 2019 ADS54J60
PRODUCTION DATA.
MIN | NOM | MAX | UNIT | |||
---|---|---|---|---|---|---|
Supply voltage range | AVDD3V | 2.85 | 3.0 | 3.6 | V | |
AVDD | 1.8 | 1.9 | 2.0 | |||
DVDD | 1.7 | 1.9 | 2.0 | |||
IOVDD | 1.1 | 1.15 | 1.2 | |||
Analog inputs | Differential input voltage range | 1.9 | VPP | |||
Input common-mode voltage | 2.0 | V | ||||
Maximum analog input frequency for 1.9-VPP input amplitude(4)(5) | 400 | MHz | ||||
Clock inputs | Input clock frequency, device clock frequency | 250(6) | 1000 | MHz | ||
Input clock amplitude differential
(VCLKP – VCLKM) |
Sine wave, ac-coupled | 0.75 | 1.5 | VPP | ||
LVPECL, ac-coupled | 0.8 | 1.6 | ||||
LVDS, ac-coupled | 0.7 | |||||
Input device clock duty cycle | 45% | 50% | 55% | |||
Temperature | Operating free-air, TA | –40 | 85 | ºC | ||
Operating junction, TJ | 105(1) | 125 |