SBAS928C February 2020 – September 2023 ADS7066
PRODUCTION DATA
In the on-the-fly mode of operation, as shown in Figure 7-14, the analog input channel is selected using the first five bits on SDI without waiting for the CS rising edge. Thus, the ADC samples the newly selected channel on the CS rising edge and there is no latency between the channel selection and the ADC output data. Table 7-8 lists the channel selection commands for this mode.
SDI BITS[15:11] | SDI BITS [10:0] | DESCRIPTION |
---|---|---|
1 0000 | Don't care | Select analog input 0 |
1 0001 | Don't care | Select analog input 1 |
1 0010 | Don't care | Select analog input 2 |
1 0011 | Don't care | Select analog input 3 |
1 0100 | Don't care | Select analog input 4 |
1 0101 | Don't care | Select analog input 5 |
1 0110 | Don't care | Select analog input 6 |
1 0111 | Don't care | Select analog input 7 |
1 1000 to 1 1111 | Don't care | Reserved |
The number of clocks required for reading the output data depends on the device output data frame size; see the Output Data FormatOutput Data Format section for more details.