SBAS482C January   2010  – September 2017 ADS7924

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 I2C Timing Requirements
    7. 6.7 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Multiplexer
      2. 7.3.2 ADC Input
      3. 7.3.3 Reference
      4. 7.3.4 Clock
      5. 7.3.5 Data Format
      6. 7.3.6 ADC Conversion Timing
        1. 7.3.6.1 Power-Up Time
        2. 7.3.6.2 Acquisition Time
        3. 7.3.6.3 Conversion Time
        4. 7.3.6.4 Sleep Time
      7. 7.3.7 Interrupt Output (INT)
      8. 7.3.8 PWRCON
      9. 7.3.9 Alarm
    4. 7.4 Device Functional Modes
      1. 7.4.1 ADC Operating Modes
        1. 7.4.1.1 Idle Mode
        2. 7.4.1.2 Awake Mode
        3. 7.4.1.3 Manual-Single Mode
        4. 7.4.1.4 Manual-Scan Mode
        5. 7.4.1.5 Auto-Single Mode
        6. 7.4.1.6 Auto-Scan Mode
        7. 7.4.1.7 Auto-Single With Sleep Mode
        8. 7.4.1.8 Auto-Scan With Sleep Mode
        9. 7.4.1.9 Auto-Burst Scan With Sleep Mode
    5. 7.5 Programming
      1. 7.5.1 I2C Interface
      2. 7.5.2 I2C Address Selection
      3. 7.5.3 I2C Speed Modes
      4. 7.5.4 Slave Mode Operations
        1. 7.5.4.1 Receive Mode
        2. 7.5.4.2 Transmit Mode:
      5. 7.5.5 Writing the Registers
      6. 7.5.6 Reading the Registers
    6. 7.6 Register Map
  8. 8 Application and Implementation
    1. 8.1 Application Information
      1. 8.1.1 Using an Operational Amplifier Between Multiplexer Output and ADC Input
      2. 8.1.2 Using an Operational Amplifier and RC Filter Between Multiplexer Output and ADC Input
      3. 8.1.3 Using an RC Filter Between Multiplexer Output and ADC Input
      4. 8.1.4 Operational Amplifier With Filter and Gain Option Between Multiplexer Output and ADC Input
      5. 8.1.5 Driving an RC Filter With an Operational Amplifier Between Multiplexer Output and ADC Input
      6. 8.1.6 Average Power Consumption
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 Setting the Throughput
        2. 8.2.2.2 Selecting the Operational Amplifier
        3. 8.2.2.3 Selecting the RC Filter
      3. 8.2.3 Application Curves
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11Device and Documentation Support
    1. 11.1 Receiving Notification of Documentation Updates
    2. 11.2 Community Resources
    3. 11.3 Trademarks
    4. 11.4 Electrostatic Discharge Caution
    5. 11.5 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

10 Layout

10.1 Layout Guidelines

Figure 65 provides an example layout for the device. Use a ground plane underneath the device and partition the PCB into analog and digital sections. Avoid crossing digital lines with the analog signal path and keep the analog input signals and the reference input signals away from noise sources. In Figure 65, the analog signals are routed on the rightside of the device and the digital signals are routed on the left side of the device.

The power sources to the device must be clean and well-bypassed. Use 1-μF ceramic bypass capacitors in close proximity to the analog (AVDD) and digital (DVDD) power-supply pins. Avoid placing vias between the AVDD and DVDD pins and the bypass capacitors. Connect all ground pins to the ground plane using short, low-impedance paths. The AVDD supply voltage for the device also functions as a reference for the device. Place the decoupling capacitor for AVDD close to the device AVDD pin and connect this capacitor to the device pins with thick copper tracks.

10.2 Layout Example

ADS7924 layout_bas482.gif Figure 65. Example Layout