SBAS817D November 2017 – June 2024 ADS8166 , ADS8167 , ADS8168
PRODUCTION DATA
This register enables or disables the reference buffer margin configuration in the REF_MRG1 register.
7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
0 | 0 | 0 | 0 | 0 | 0 | 0 | EN_MARG |
R-0b | R-0b | R-0b | R-0b | R-0b | R-0b | R-0b | R/W-0b |
Bit | Field | Type | Reset | Description |
---|---|---|---|---|
7-1 | 0 | R | 000 0000b | Reserved bits. Reads return 000 0000b. |
0 | EN_MARG | R/W | 0b | This bit enables the reference buffer margining feature. 0b = Margining is disabled 1b = Margining is enabled |