SBAS761A February 2020 – February 2020 ADS8355
PRODUCTION DATA.
MIN | NOM | MAX | UNIT | |||
---|---|---|---|---|---|---|
tCYCLE | Cycle time | DVDD ≥ 2.35 V | 1 | µs | ||
1.65 V < DVDD < 2.35 V | 1.5 | |||||
fCLK | Serial clock frequency | DVDD ≥ 2.35 V | 50 | MHz | ||
1.65 V < DVDD < 2.35 V | 24 | |||||
tCLK | Serial clock time period | DVDD ≥ 2.35 V | 20 | ns | ||
1.65 V < DVDD < 2.35 V | 42 | |||||
tPH_CK | Clock high time | 0.45 | 0.55 | tCLK | ||
tPL_CK | Clock low time | 0.45 | 0.55 | tCLK | ||
tACQ | Acquisition time | 350 | ns | |||
tPH_CS | CS high time, NOP | 40 | ns | |||
tSU_CSCK | Setup time: CS falling edge to SCLK falling edge | DVDD ≥ 2.35 V | 12 | ns | ||
1.65 V < DVDD < 2.35 V | 20 | |||||
tD_CKCS | Delay time: Last SCLK falling edge to CS rising edge | 12 | ns | |||
tSU_CKDI | Setup time: DIN data valid to SCLK falling edge | 2 | ns | |||
tHT_CKDI | Hold time: SCLK falling edge to (previous) data valid on DIN | 2 | ns |