SBAS642A
December 2016 – April 2017
ADS8588S
PRODUCTION DATA.
1
Features
2
Applications
3
Description
4
Revision History
5
Device Family Comparison Table
6
Pin Configuration and Functions
7
Specifications
7.1
Absolute Maximum Ratings
7.2
ESD Ratings
7.3
Recommended Operating Conditions
7.4
Thermal Information
7.5
Electrical Characteristics
7.6
Timing Requirements: CONVST Control
7.7
Timing Requirements: Data Read Operation
7.8
Timing Requirements: Parallel Data Read Operation, CS and RD Tied Together
7.9
Timing Requirements: Parallel Data Read Operation, CS and RD Separate
7.10
Timing Requirements: Serial Data Read Operation
7.11
Timing Requirements: Byte Mode Data Read Operation
7.12
Timing Requirements: Oversampling Mode
7.13
Timing Requirements: Exit Standby Mode
7.14
Timing Requirements: Exit Shutdown Mode
7.15
Switching Characteristics: CONVST Control
7.16
Switching Characteristics: Parallel Data Read Operation, CS and RD Tied Together
7.17
Switching Characteristics: Parallel Data Read Operation, CS and RD Separate
7.18
Switching Characteristics: Serial Data Read Operation
7.19
Switching Characteristics: Byte Mode Data Read Operation
7.20
Typical Characteristics
8
Detailed Description
8.1
Overview
8.2
Functional Block Diagram
8.3
Feature Description
8.3.1
Analog Inputs
8.3.2
Analog Input Impedance
8.3.3
Input Clamp Protection Circuit
8.3.4
Programmable Gain Amplifier (PGA)
8.3.5
Third-Order, Low-Pass Filter (LPF)
8.3.6
ADC Driver
8.3.7
Digital Filter and Noise
8.3.8
Reference
8.3.8.1
Internal Reference
8.3.8.2
External Reference
8.3.8.3
Supplying One VREF to Multiple Devices
8.3.9
ADC Transfer Function
8.4
Device Functional Modes
8.4.1
Device Interface: Pin Description
8.4.1.1
REFSEL (Input)
8.4.1.2
RANGE (Input)
8.4.1.3
STBY (Input)
8.4.1.4
PAR/SER/BYTE SEL (Input)
8.4.1.5
CONVSTA, CONVSTB (Input)
8.4.1.6
RESET (Input)
8.4.1.7
RD/SCLK (Input)
8.4.1.8
CS (Input)
8.4.1.9
OS[2:0]
8.4.1.10
BUSY (Output)
8.4.1.11
FRSTDATA (Output)
8.4.1.12
DB15/BYTE SEL
8.4.1.13
DB14/HBEN
8.4.1.14
DB[13:9]
8.4.1.15
DB8/DOUTB
8.4.1.16
DB7/DOUTA
8.4.1.17
DB[6:0]
8.4.2
Device Modes of Operation
8.4.2.1
Power-Down Modes
8.4.2.1.1
Standby Mode
8.4.2.1.2
Shutdown Mode
8.4.2.2
Conversion Control
8.4.2.2.1
Simultaneous Sampling on All Input Channels
8.4.2.2.2
Simultaneous Sampling Two Sets of Input Channels
8.4.2.3
Data Read Operation
8.4.2.3.1
Parallel Data Read
8.4.2.3.2
Parallel Byte Data Read
8.4.2.3.3
Serial Data Read
8.4.2.3.4
Data Read During Conversion
8.4.2.4
Oversampling Mode of Operation
9
Application and Implementation
9.1
Application Information
9.2
Typical Application
9.2.1
8-Channel, Data Acquisition System (DAQ) for Power Automation
9.2.1.1
Design Requirements
9.2.1.2
Detailed Design Procedure
9.2.1.3
Application Curve
10
Power Supply Recommendations
11
Layout
11.1
Layout Guidelines
11.2
Layout Example
12
Device and Documentation Support
12.1
Documentation Support
12.1.1
Related Documentation
12.2
Receiving Notification of Documentation Updates
12.3
Community Resources
12.4
Trademarks
12.5
Electrostatic Discharge Caution
12.6
Glossary
13
Mechanical, Packaging, and Orderable Information
Package Options
Mechanical Data (Package|Pins)
PM|64
MTQF008B
Thermal pad, mechanical data (Package|Pins)
Orderable Information
sbas642a_oa
sbas642a_pm
5
Device Family Comparison Table
PRODUCT
RESOLUTION (Bits)
CHANNELS
SAMPLE RATE (kSPS)
ADS8588S
16
8, single-ended
200
ADS8586S
16
6, single-ended
250
ADS8584S
16
4, single-ended
330
ADS8578S
14
8, single-ended
200