SBASAY5 June   2024 ADS8681W

PRODUCTION DATA  

  1.   1
  2. Features
  3. Applications
  4. Description
  5. Pin Configuration and Functions
  6. Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Electrical Characteristics
    6. 5.6 Timing Requirements
    7. 5.7 Timing Diagrams
    8. 5.8 Typical Characteristics
  7. Detailed Description
    1. 6.1 Overview
    2. 6.2 Functional Block Diagram
    3. 6.3 Feature Description
      1. 6.3.1 Analog Input Structure
      2. 6.3.2 Analog Input Impedance
      3. 6.3.3 Input Protection Circuit
      4. 6.3.4 Programmable Gain Amplifier (PGA)
      5. 6.3.5 Second-Order, Low-Pass Filter (LPF)
      6. 6.3.6 ADC Driver
      7. 6.3.7 Reference
        1. 6.3.7.1 Internal Reference
        2. 6.3.7.2 External Reference
      8. 6.3.8 ADC Transfer Function
      9. 6.3.9 Alarm Features
        1. 6.3.9.1 Input Alarm
        2. 6.3.9.2 AVDD Alarm
    4. 6.4 Device Functional Modes
      1. 6.4.1 Host-to-Device Connection Topologies
        1. 6.4.1.1 Single Device: All multiSPI Options
        2. 6.4.1.2 Single Device: Standard SPI Interface
        3. 6.4.1.3 Multiple Devices: Daisy-Chain Topology
      2. 6.4.2 Device Operational Modes
        1. 6.4.2.1 RESET State
        2. 6.4.2.2 ACQ State
        3. 6.4.2.3 CONV State
    5. 6.5 Programming
      1. 6.5.1 Data Transfer Frame
      2. 6.5.2 Input Command Word and Register Write Operation
      3. 6.5.3 Output Data Word
      4. 6.5.4 Data Transfer Protocols
        1. 6.5.4.1 Protocols for Configuring the Device
        2. 6.5.4.2 Protocols for Reading From the Device
          1. 6.5.4.2.1 Legacy, SPI-Compatible (SYS-xy-S) Protocols With a Single SDO-x
          2. 6.5.4.2.2 Legacy, SPI-Compatible (SYS-xy-S) Protocols With Dual SDO-x
          3. 6.5.4.2.3 Source-Synchronous (SRC) Protocols
            1. 6.5.4.2.3.1 Output Clock Source Options
            2. 6.5.4.2.3.2 Output Bus Width Options
  8. Register Maps
    1. 7.1 Device Configuration and Register Maps
      1. 7.1.1 DEVICE_ID_REG Register (address = 00h)
      2. 7.1.2 RST_PWRCTL_REG Register (address = 04h)
      3. 7.1.3 SDI_CTL_REG Register (address = 08h)
      4. 7.1.4 SDO_CTL_REG Register (address = 0Ch)
      5. 7.1.5 DATAOUT_CTL_REG Register (address = 10h)
      6. 7.1.6 RANGE_SEL_REG Register (address = 14h)
      7. 7.1.7 ALARM_REG Register (address = 20h)
      8. 7.1.8 ALARM_H_TH_REG Register (address = 24h)
      9. 7.1.9 ALARM_L_TH_REG Register (address = 28h)
  9. Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 Alarm Function
      3. 8.2.3 Application Curve
    3. 8.3 Power Supply Recommendations
      1. 8.3.1 Power Supply Decoupling
      2. 8.3.2 Power Saving
        1. 8.3.2.1 NAP Mode
        2. 8.3.2.2 Power-Down (PD) Mode
    4. 8.4 Layout
      1. 8.4.1 Layout Guidelines
      2. 8.4.2 Layout Example
  10. Device and Documentation Support
    1. 9.1 Documentation Support
      1. 9.1.1 Related Documentation
    2. 9.2 Receiving Notification of Documentation Updates
    3. 9.3 Support Resources
    4. 9.4 Trademarks
    5. 9.5 Electrostatic Discharge Caution
    6. 9.6 Glossary
  11. 10Revision History
  12. 11Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

Typical Characteristics

at TA = 25°C, AVDD = 5V, DVDD = 3V, VREF = 4.096V (internal), and maximum throughput (unless otherwise noted)

ADS8681W ADS8685W ADS8689W Input
                        I-V Characteristic Across Input Ranges
 
Figure 5-9 Input I-V Characteristic Across Input Ranges
ADS8681W ADS8685W ADS8689W Input
                        Impedance Drift vs Temperature
 
Figure 5-11 Input Impedance Drift vs Temperature
ADS8681W ADS8685W ADS8689W DC Histogram for Midscale
                        Inputs (±12.288V)
Mean = 32767.5, sigma = 2.87, input = 0V
Figure 5-13 DC Histogram for Midscale Inputs (±12.288V)
ADS8681W ADS8685W ADS8689W DC
                        Histogram for Midscale Inputs (±6.144V)
Mean = 32767.5, sigma = 2.87, input = 0V
Figure 5-15 DC Histogram for Midscale Inputs (±6.144V)
ADS8681W ADS8685W ADS8689W DC
                        Histogram for Midscale Inputs (±2.56V)
Mean = 32769.22, sigma = 2.87, input = 0V
Figure 5-17 DC Histogram for Midscale Inputs (±2.56V)
ADS8681W ADS8685W ADS8689W DC
                        Histogram for Midscale Inputs (0V–10.24V)
Mean = 32768.41, sigma = 3.1, input = 5.12V
Figure 5-19 DC Histogram for Midscale Inputs (0V–10.24V)
ADS8681W ADS8685W ADS8689W DC
                        Histogram for Midscale Inputs (0V–5.12V)
Mean = 32768.32, sigma = 3.16, input = 2.56V
Figure 5-21 DC Histogram for Midscale Inputs (0V–5.12V)
ADS8681W ADS8685W ADS8689W DNL
                        vs Temperature
All input ranges
Figure 5-23 DNL vs Temperature
ADS8681W ADS8685W ADS8689W Typical INL for All Codes (All Unipolar Ranges)
 
Figure 5-25 Typical INL for All Codes (All Unipolar Ranges)
ADS8681W ADS8685W ADS8689W INL
                        vs Temperature (All Unipolar Ranges)
 
Figure 5-27 INL vs Temperature (All Unipolar Ranges)
ADS8681W ADS8685W ADS8689W Typical Histogram for Offset Drift
 
Figure 5-29 Typical Histogram for Offset Drift
ADS8681W ADS8685W ADS8689W Typical Histogram for Gain Error Drift
 
Figure 5-31 Typical Histogram for Gain Error Drift
ADS8681W ADS8685W ADS8689W Typical FFT Plot (All Ranges) for the ADS8681W
Number of points = 500k, fIN = 1kHz
Figure 5-33 Typical FFT Plot (All Ranges) for the ADS8681W
ADS8681W ADS8685W ADS8689W Typical FFT Plot (All Ranges) for the ADS8689W
Number of points = 500k, fIN = 1kHz
Figure 5-35 Typical FFT Plot (All Ranges) for the ADS8689W
ADS8681W ADS8685W ADS8689W SINAD
                        vs Input Frequency
 
Figure 5-37 SINAD vs Input Frequency
ADS8681W ADS8685W ADS8689W AVDD
                        Current vs Temperature
 
Figure 5-39 AVDD Current vs Temperature
ADS8681W ADS8685W ADS8689W AVDD
                        Current vs Temperature (During Sampling)
 
Figure 5-41 AVDD Current vs Temperature (During Sampling)
ADS8681W ADS8685W ADS8689W AVDD
                        Current vs Temperature (Power-Down Mode)
 
Figure 5-43 AVDD Current vs Temperature (Power-Down Mode)
ADS8681W ADS8685W ADS8689W Input I-V Characteristic
                        Across Temperature
Range = ±12.288V
Figure 5-10 Input I-V Characteristic Across Temperature
ADS8681W ADS8685W ADS8689W Typical Distribution of Input Impedance
Number of samples = 3398
Figure 5-12 Typical Distribution of Input Impedance
ADS8681W ADS8685W ADS8689W DC
                        Histogram for Midscale Inputs (±10.24V)
Mean = 32767.24, sigma = 2.87, input = 0V
Figure 5-14 DC Histogram for Midscale Inputs (±10.24V)
ADS8681W ADS8685W ADS8689W DC
                        Histogram for Midscale Inputs (±5.12V)
Mean = 32767.5, sigma = 2.87, input = 0V
Figure 5-16 DC Histogram for Midscale Inputs (±5.12V)
ADS8681W ADS8685W ADS8689W DC
                        Histogram for Midscale Inputs (0V–12.288V)
Mean = 32771.73, sigma = 2.8, input = 6.144V
Figure 5-18 DC Histogram for Midscale Inputs (0V–12.288V)
ADS8681W ADS8685W ADS8689W DC
                        Histogram for Midscale Inputs (0V–6.144V)
Mean = 32768.42, sigma = 3.1, input = 3.072V
Figure 5-20 DC Histogram for Midscale Inputs (0V–6.144V)
ADS8681W ADS8685W ADS8689W Typical DNL for All Codes
All input ranges
Figure 5-22 Typical DNL for All Codes
ADS8681W ADS8685W ADS8689W Typical INL for All Codes (All Bipolar Ranges)
 
Figure 5-24 Typical INL for All Codes (All Bipolar Ranges)
ADS8681W ADS8685W ADS8689W INL
                        vs Temperature (All Bipolar Ranges)
 
Figure 5-26 INL vs Temperature (All Bipolar Ranges)
ADS8681W ADS8685W ADS8689W Offset Error vs Temperature Across Input Ranges
 
Figure 5-28 Offset Error vs Temperature Across Input Ranges
ADS8681W ADS8685W ADS8689W Gain
                        Error vs Temperature Across Input Ranges
 
Figure 5-30 Gain Error vs Temperature Across Input Ranges
ADS8681W ADS8685W ADS8689W Gain
                        Error vs External Resistance (REXT)
 
Figure 5-32 Gain Error vs External Resistance (REXT)
ADS8681W ADS8685W ADS8689W Typical FFT Plot (All Ranges) for the ADS8685W
Number of points = 500k, fIN = 1kHz
Figure 5-34 Typical FFT Plot (All Ranges) for the ADS8685W
ADS8681W ADS8685W ADS8689W SNR
                        vs Input Frequency
 
Figure 5-36 SNR vs Input Frequency
ADS8681W ADS8685W ADS8689W THD
                        vs Input Frequency
 
Figure 5-38 THD vs Input Frequency
ADS8681W ADS8685W ADS8689W AVDD
                        Current vs Throughput
 
Figure 5-40 AVDD Current vs Throughput
ADS8681W ADS8685W ADS8689W AVDD
                        Current vs Temperature (Standby Mode)
 
Figure 5-42 AVDD Current vs Temperature (Standby Mode)