SBAS633E February 2016 – August 2022 ADS8681 , ADS8685 , ADS8689
PRODUCTION DATA
Refer to the PDF data sheet for device specific package drawings
As described in Table 7-8, the host controller can use any of the four legacy, SPI-compatible protocols (SPI-00-S, SPI-01-S, SPI-10-S, or SPI-11-S) to write data into the device.
PROTOCOL | SCLK POLARITY (At CS Falling Edge) |
SCLK PHASE (Capture Edge) |
SDI_CTL_REG | SDO_CTL_REG | DIAGRAM |
---|---|---|---|---|---|
SPI-00-S | Low | Rising | 00h | 00h | Figure 7-30 |
SPI-01-S | Low | Falling | 01h | 00h | Figure 7-30 |
SPI-10-S | High | Falling | 02h | 00h | Figure 7-31 |
SPI-11-S | High | Rising | 03h | 00h | Figure 7-31 |
On power-up or after coming out of any asynchronous reset, the device supports the SPI-00-S protocol for data read and data write operations. To select a different SPI-compatible protocol, program the SDI_MODE[1:0] bits in the SDI_CNTL_REG register. This first write operation must adhere to the SPI-00-S protocol. Any subsequent data transfer frames must adhere to the newly-selected protocol. The SPI protocol selected by the configuration of the SDI_MODE[1:0] is applicable to both read and write operations.
Figure 7-30 and Figure 7-31 detail the four protocols using an optimal data frame; see the Section 6.8 table for associated timing parameters.
As explained in the Section 7.5.1 section, a valid write operation to the device requires a minimum of 32 SCLKs to be provided within a data transfer frame.