SBAS905C November   2019  – July 2020 ADS8686S

PRODUCTION DATA  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1  Absolute Maximum Ratings
    2. 6.2  ESD Ratings
    3. 6.3  Recommended Operating Conditions
    4. 6.4  Thermal Information
    5. 6.5  Electrical Characteristics
    6. 6.6  Timing Requirements
    7. 6.7  Switching Characteristics
    8. 6.8  Timing Diagrams: Universal
    9. 6.9  Timing Diagrams: Parallel Data Read
    10. 6.10 Timing Diagrams: Serial Data Read
    11. 6.11 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1  Analog Inputs
      2. 7.3.2  Analog Input Impedance
      3. 7.3.3  Input Clamp Protection Circuit
      4. 7.3.4  Programmable Gain Amplifier (PGA)
      5. 7.3.5  Second-Order, Programmable, Low-Pass Filter (LPF)
      6. 7.3.6  ADC Driver
      7. 7.3.7  Multiplexer
      8. 7.3.8  Digital Filter and Noise
      9. 7.3.9  Reference
        1. 7.3.9.1 Internal Reference
        2. 7.3.9.2 External Reference
        3. 7.3.9.3 Supplying One VREF to Multiple Devices
      10. 7.3.10 ADC Transfer Function
    4. 7.4 Device Functional Modes
      1. 7.4.1 Device Interface: Pin Description
        1. 7.4.1.1  REFSEL (Input)
        2. 7.4.1.2  RESET (Input)
        3. 7.4.1.3  SEQEN (Input)
        4. 7.4.1.4  HW_RANGESEL[1:0] (Input)
        5. 7.4.1.5  SER/BYTE/PAR (Input)
        6. 7.4.1.6  DB[3:0] (Input/Output)
        7. 7.4.1.7  DB4/SER1W (Input/Output)
        8. 7.4.1.8  DB5/CRCEN (Input/Output)
        9. 7.4.1.9  DB[7:6] (Input/Output)
        10. 7.4.1.10 DB8 (Input/Output)
        11. 7.4.1.11 DB9/BYTESEL (Input/Output)
        12. 7.4.1.12 DB10/SDI (Input/Output)
        13. 7.4.1.13 DB11/SDOB (Input/Output)
        14. 7.4.1.14 DB12/SDOA (Input/Output)
        15. 7.4.1.15 DB13/OS0 (Input/Output)
        16. 7.4.1.16 DB14/OS1 (Input/Output)
        17. 7.4.1.17 DB15/OS2 (Input/Output)
        18. 7.4.1.18 WR/BURST (Input)
        19. 7.4.1.19 SCLK/RD (Input)
        20. 7.4.1.20 CS (Input)
        21. 7.4.1.21 CHSEL[2:0] (Input)
        22. 7.4.1.22 BUSY (Output)
        23. 7.4.1.23 CONVST (Input)
      2. 7.4.2 Device Modes of Operation
        1. 7.4.2.1 Shutdown Mode
        2. 7.4.2.2 Operation Mode
          1. 7.4.2.2.1 Hardware Mode
          2. 7.4.2.2.2 Software Mode
        3. 7.4.2.3 Reset Functionality
        4. 7.4.2.4 Channel Selection
          1. 7.4.2.4.1 Hardware Mode Channel Selection
          2. 7.4.2.4.2 Software Mode Channel Selection
        5. 7.4.2.5 Sequencer
          1. 7.4.2.5.1 Hardware Mode Sequencer
          2. 7.4.2.5.2 Software Mode Sequencer
        6. 7.4.2.6 Burst Sequencer
          1. 7.4.2.6.1 Hardware Mode Burst Sequencer
          2. 7.4.2.6.2 Software Mode Burst Sequencer
        7. 7.4.2.7 Diagnostics
          1. 7.4.2.7.1 Analog Diagnosis
          2. 7.4.2.7.2 Interface Diagnosis: SELF TEST and CRC
    5. 7.5 Programming
      1. 7.5.1 Parallel Interface
        1. 7.5.1.1 Reading Conversion Results
        2. 7.5.1.2 Writing Register Data
        3. 7.5.1.3 Reading Register Data
      2. 7.5.2 Parallel Byte Interface
        1. 7.5.2.1 Reading Conversion Results
        2. 7.5.2.2 Writing Register Data
        3. 7.5.2.3 Reading Register Data
      3. 7.5.3 Serial Interface
        1. 7.5.3.1 Reading Conversion Results
        2. 7.5.3.2 Writing Register Data
        3. 7.5.3.3 Reading Register Data
    6. 7.6 Register Maps
      1. 7.6.1 Page1 Registers
  8. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Applications
      1. 8.2.1 8x2 Channel Data Acquisition System (DAQ) for Power Automation
        1. 8.2.1.1 Design Requirements
        2. 8.2.1.2 Detailed Design Procedure
        3. 8.2.1.3 Application Curve
      2. 8.2.2 Input Protection for Electrical Overstress
  9. 9 Power Supply Recommendations
    1. 9.1 Power Supplies
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Examples
  11. 11Device and Documentation Support
    1. 11.1 Device Support
      1. 11.1.1 Development Support
    2. 11.2 Documentation Support
      1. 11.2.1 Related Documentation
    3. 11.3 Receiving Notification of Documentation Updates
    4. 11.4 Support Resources
    5. 11.5 Trademarks
    6. 11.6 Electrostatic Discharge Caution
    7. 11.7 Glossary

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

6.5 Electrical Characteristics

At AVDD = 5 V, DVDD= 3.3 V, fSAMPLE = 1 MSPS, fIN = 1 kHz, internal or external VREF = 2.5 V, LPF option = 1; minimum and maximum values at TA = –40°C to +125°C;  typical values at TA = +25°C, AVDD = 5 V (unless otherwise noted).
PARAMETER TEST CONDITIONS MIN(1) TYP MAX(1) UNIT
ANALOG INPUTS
RIN Input impedance Input ranges = ±10 V, ±5 V,
±2.5 V, TA = 25°C		 0.85 1 1.15 MΩ
20% overrange setting for ±10 V, ±5 V, ±2.5 V, TA = 25°C 1 1.2 1.4 MΩ
Input impedance temperature drift All input ranges 10 25 ppm/°C
Input capacitance 10 pF
VBias Internal bias voltage for analog front-end Software, hardware selectable range = ±10 V 2.02 2.1 2.16 V
Software, hardware selectable range = ±5 V 1.72 1.8 1.88
Software, hardware selectable range = ±2.5 V 1.37 1.45 1.53
Software selectable range =
±10 V with overrange		 2.36 2.45 2.54
Software selectable range =
±5 V with overrange		 1.81 1.9 1.99
Software selectable range =
±2.5 V with overrange		 1.46 1.55 1.64
IANL(IN) Analog input current All input ranges (VIN – VBIAS) / RIN µA
ANALOG INPUT FILTER
BW(-3 dB) Analog input LPF bandwidth
–3 dB		 Filter option 1, range = ±10 V and overrange 39 kHz
Filter option 1, range = ±5 V,
±2.5 V and overrange		 33
Filter option 2, all input ranges 15
Filter option 3, all input ranges 376
BW(-0.1 dB) Analog input LPF bandwidth
–0.1 dB		 Filter option 1, range = ±10 V and overrange 6.9 kHz
Filter option 1, range = ±5 V,
±2.5 V and overrange		 5.9
Filter option 2, all input ranges 3.1
Filter option 3, all input ranges 60
tGROUP Group delay Filter option 1, range = ±10 V and overrange 5.2 6 µs
Filter option 1, range = ±5 V and overrange 6.2
Filter option 1, range = ± 2.5V and overrange 6.2
Filter option 2, range = ±10 V and overrange 13.2 15.1
Filter option 2, range = ±5 V and overrange 13.2
Filter option 2, range = ±2.5 V and overrange 13.3
Filter option 3, range = ±10 V and overrange 0.9 1.1
Filter option 3, range = ±5 V and overrange 0.9
Filter option 3, range = ±2.5 V and overrange 0.94
Group delay temperature drift Filter option 1, range = ±10 V 0.3 5 ns/°C
Filter option 2, range = ±10 V 0.6 2
Filter option 3, range = ±10 V 0.2 1
Group delay matching Filter option 1, range = ±10 V and overrange 20 131 ns
Filter option 1, range = ±5 V and overrange 24
Filter option 1, range = ±2.5 V and overrange 38
Filter option 2, range = ±10 V and overrange 52 357
Filter option 2, range = ±5 V and overrange 50
Filter option 2, range = ±2.5 V and overrange 56
Filter option 3, range = ±10 V and overrange 10 104
Filter option 3, range = ±5 V and overrange 12
Filter option 3, range = ±2.5 V and overrange 24
DC CHARACTERISTICS
Resolution 16 Bits
NMC No missing codes 16 Bits
DNL Differential nonlinearity All input ranges –0.85 ±0.2 0.85 LSB
Range = ±10 V, TA = 0℃ to 70℃ –0.5 ±0.2 0.5
Range = ±5 V, TA = 0℃ to 70℃ –0.6 ±0.25 0.6
Range = ±2.5 V, TA = 0℃ to 70℃ –0.65 ±0.35 0.65
INL Integral nonlinearity (2) All input ranges –2 ±0.7 2 LSB
Range = ±10 V, TA = 0℃ to 70℃ –1.2 ±0.6 1.2
Range = ±5 V, TA = 0℃ to 70℃ –1.5 ±0.7 1.5
Range = ±2.5 V, TA = 0℃ to 70℃ –1.6 ±0.75 1.6
TUE Total unadjusted error Range = ±10 V with overrange ±3.5 LSB
Range = ±10 V ±3
Range = ±5 V with overrange ±2.5
Range = ±5 V ±2.5
Range = ±2.5 V with overrange ±2
Range = ±2.5 V ±2
EG Gain error(3) 20% overrange setting, external reference –80 ±6 80 LSB
Range = ±10 V, ±5 V, ±2.5 V, external reference –64 ±4 64
Range = ±10 V, internal reference ±3
Gain error matching Range = ±10 V with overrange 20 LSB
Range = ±10 V 5 20
Range = ±5 V with overrange 12
Range = ±5 V 5
Range = ±2.5 V with overrange 12
Range = ±2.5 V 6
Gain error temperature drift All ranges, external reference 1 10 ppm/°C
All ranges, internal reference 8 20
EO Offset error Range = ±10 V with overrange –4 ±0.4 4 mV
Range = ±10 V –2.4 ±0.3 2.4
Range = ±5 V with overrange –1.8 ±0.18 1.8
Range = ±5 V –1.5 ±0.15 1.5
Range = ±2.5 V with overrange –1.4 ±0.24 1.4
Range = ±2.5 V –1.1 ±0.2 1.1
Offset error matching Range = ±10 V with overrange ±0.45 mV
Range = ±10 V –3 ±0.4 3
Range = ±5 V with overrange ±0.3
Range = ±5 V ±0.25
Range = ±2.5 V with overrange ±0.3
Range = ±2.5 V ±0.25
Offset error temperature drift All ranges 0.3 1.5 ppm/°C
AC CHARACTERISTICS
SNR Signal-to-noise ratio,
no oversampling
(–0.5 dBFS input, 1 kHz)		 Filter option 1, range = ±10 V with overrange 89 91.3 dB
Filter option 1, range = ±10 V 89 91
Filter option 1, range = ±5 V with overrange 90.7
Filter option 1, range = ±5 V 88 90.5
Filter option 1, range = ±2.5 V with overrange 88.2
Filter option 1, range = ±2.5 V 85.5 88
Filter option 2, range = ±10 V with overrange 92.2
Filter option 2, range = ±10 V 90.5 91.9
Filter option 2, range = ±5 V with overrange 91.6
Filter option 2, range = ±5 V 89.5 91.4
Filter option 2, range = ±2.5 V with overrange 89.1
Filter option 2, range = ±2.5 V 87.4 88.9
Filter option 3, range = ±10 V with overrange 85
Filter option 3, range = ±10 V 82 85
Filter option 3, range = ±5 V with overrange 82
Filter option 3, range = ±5 V 82
Filter option 3, range = ±2.5 V with overrange 77
Filter option 3, range = ±2.5 V 77
SNROSR Signal-to-noise ratio
(–0.5 dBFS input, 1 kHz)		 Filter option 1, range = ±10 V, OSR = 2 92.5 dB
Filter option 1, range = ±10 V, OSR = 4 93.5
SINAD Signal-to-noise distortion ratio,
no oversampling
(–0.5 dBFS input, 1 kHz)		 Filter option 1, range = ±10 V with overrange 90.8 dB
Filter option 1, range = ±10 V 88.5 90.5
Filter option 1, range = ±5 V with overrange 90.2
Filter option 1, range = ±5 V 87.5 90
Filter option 1, range = ±2.5 V with overrange 87.7
Filter option 1, range = ±2.5 V 85.5 87.5
Filter option 2, range = ±10 V with overrange 91.3
Filter option 2, range = ±10 V 90 91
Filter option 2, range = ±5 V with overrange 90.7
Filter option 2, range = ±5 V 89 90.5
Filter option 2, range = ±2.5 V with overrange 88.2
Filter option 2, range = ±2.5 V 86.5 88
Filter option 3, range = ±10 V with overrange 85
Filter option 3, range = ±10 V 82 85
Filter option 3, range = ±5 V with overrange 82
Filter option 3, range = ±5 V 79 82
Filter option 3, range = ±2.5 V with overrange 78
Filter option 3, range = ±2.5 V 75 78
THD Total harmonic distortion (4) Range = ±10 V with overrange –110 dB
Range = ±10 V –110 –95
Range = ±5 V with overrange –110
Range = ±5 V –110
Range = ±2.5 V with overrange –110
Range = ±2.5 V –110
SFDR Spurious-free dynamic range
(–0.5 dBFS input, 1 kHz)		 All input ranges –108 dB
Isolation crosstalk (5) fIN on unselected channel up to 5 kHz –112 dB
IMD Intermodulation distortion fa = 1 kHz, fb = 1.1 kHz, 2nd-order terms –105 dB
fa = 1 kHz, fb = 1.1 kHz, 3rd-order terms –113
INTERNAL REFERENCE OUTPUT
VREF(6) Voltage on REFIO pin (configured as output) 0.1-µF capacitor on REFIO pin, TA = 25°C 2.4975 2.5 2.5025 V
Reference temperature drift 7 20 ppm/°C
V(REFCAP) Reference buffer output voltage (REFCAP pin) TA = 25°C 3.996 4 4.004 V
tON Reference turn-on time 10-µF capacitor on REFCAP pin 15 ms
EXTERNAL REFERENCE INPUT
REFLKG Reference input leakage current –1 1 µA
POWER-SUPPLY REQUIREMENTS
IAVDD AVDD current with internal reference Static 55 69 mA
Dynamic, fSAMPLE = 1 MSPS 59 72 mA
Power-down 130 µA
AVDD current with external reference Static 54 68 mA
Dynamic, fSAMPLE = 1 MSPS 59 72 mA
Power-down 130 µA
IDVDD DVDD current Static 0.06 0.1 mA
Dynamic, fSAMPLE = 1 MSPS 0.6 1 mA
Power-down 1 µA
DIGITAL INPUTS
VIH High-level input voltage 0.7 x DVDD DVDD + 0.3 V
VIL Low-level input voltage –0.3 0.3 x DVDD V
ILKG Input leakage current 100 nA
Input capacitance 5 pF
DIGITAL OUTPUTS
VOH High-level output voltage IO = 500-µA source 0.8 x DVDD DVDD V
VOL Low-level output voltage IO = 500-µA sink 0 0.2 x DVDD V
Floating state leakage current 1 20 µA
Floating state output capacitance 5 pF
(1) Preliminary Specifications, subject to change based on characterization
(2) This parameter is the endpoint INL, not best-fit INL.
(3) Gain error calculated after adjusting for offset error, which implies that positive full-scale error = negative full-scale error = gain error ÷ 2.
(4) Calculated on the first nine harmonics of the input frequency.
(5) Isolation crosstalk is measured by applying a full-scale sinusoidal signal up to 160 kHz to a channel, not selected in the multiplexing sequence, and measuring the effect on the output of any selected channel.
(6) Does not include the variation in voltage resulting from solder shift effects.